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38#include "ar9170.h"
39#include "cmd.h"
40
41int ar9170_set_dyn_sifs_ack(struct ar9170 *ar)
42{
43 u32 val;
44
45 if (conf_is_ht40(&ar->hw->conf))
46 val = 0x010a;
47 else {
48 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
49 val = 0x105;
50 else
51 val = 0x104;
52 }
53
54 return ar9170_write_reg(ar, AR9170_MAC_REG_DYNAMIC_SIFS_ACK, val);
55}
56
57int ar9170_set_slot_time(struct ar9170 *ar)
58{
59 u32 slottime = 20;
60
61 if (!ar->vif)
62 return 0;
63
64 if ((ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ) ||
65 ar->vif->bss_conf.use_short_slot)
66 slottime = 9;
67
68 return ar9170_write_reg(ar, AR9170_MAC_REG_SLOT_TIME, slottime << 10);
69}
70
71int ar9170_set_basic_rates(struct ar9170 *ar)
72{
73 u8 cck, ofdm;
74
75 if (!ar->vif)
76 return 0;
77
78 ofdm = ar->vif->bss_conf.basic_rates >> 4;
79
80
81 if (ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ)
82 cck = 0;
83 else
84 cck = ar->vif->bss_conf.basic_rates & 0xf;
85
86 return ar9170_write_reg(ar, AR9170_MAC_REG_BASIC_RATE,
87 ofdm << 8 | cck);
88}
89
90int ar9170_set_qos(struct ar9170 *ar)
91{
92 ar9170_regwrite_begin(ar);
93
94 ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
95 (ar->edcf[0].cw_max << 16));
96 ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
97 (ar->edcf[1].cw_max << 16));
98 ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
99 (ar->edcf[2].cw_max << 16));
100 ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
101 (ar->edcf[3].cw_max << 16));
102 ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
103 (ar->edcf[4].cw_max << 16));
104
105 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS,
106 ((ar->edcf[0].aifs * 9 + 10)) |
107 ((ar->edcf[1].aifs * 9 + 10) << 12) |
108 ((ar->edcf[2].aifs * 9 + 10) << 24));
109 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS,
110 ((ar->edcf[2].aifs * 9 + 10) >> 8) |
111 ((ar->edcf[3].aifs * 9 + 10) << 4) |
112 ((ar->edcf[4].aifs * 9 + 10) << 16));
113
114 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
115 ar->edcf[0].txop | ar->edcf[1].txop << 16);
116 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
117 ar->edcf[1].txop | ar->edcf[3].txop << 16);
118
119 ar9170_regwrite_finish();
120
121 return ar9170_regwrite_result();
122}
123
124static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
125{
126 u32 val;
127
128
129 if (mpdudensity > 6)
130 return -EINVAL;
131
132
133 val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
134
135 ar9170_regwrite_begin(ar);
136 ar9170_regwrite(AR9170_MAC_REG_AMPDU_DENSITY, val);
137 ar9170_regwrite_finish();
138
139 return ar9170_regwrite_result();
140}
141
142int ar9170_init_mac(struct ar9170 *ar)
143{
144 ar9170_regwrite_begin(ar);
145
146 ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
147
148 ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0);
149
150
151 ar9170_regwrite(AR9170_MAC_REG_SNIFFER,
152 AR9170_MAC_REG_SNIFFER_DEFAULTS);
153
154 ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
155
156 ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
157 ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
158 ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
159
160
161 ar9170_regwrite(0x1c3b2c, 0x19000000);
162
163
164 ar9170_regwrite(0x1c3b38, 0x201);
165
166
167
168 ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
169
170 ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
171
172
173
174 ar9170_regwrite(0x1c3b9c, 0x10000a);
175
176 ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
177 AR9170_MAC_REG_FTF_DEFAULTS);
178
179
180 ar9170_regwrite(0x1c3c40, 0x1 | 1<<30);
181
182
183 ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
184 ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
185 ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
186
187
188 ar9170_regwrite(0x1c3694, 0x4003C1E);
189
190
191 ar9170_regwrite(0x1c3600, 0x3);
192
193 ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
194
195
196 ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
197
198
199 ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
200
201
202 ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL,
203 AR9170_PWR_CLK_AHB_80_88MHZ |
204 AR9170_PWR_CLK_DAC_160_INV_DLY);
205
206
207 ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
208
209 ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
210 AR9170_MAC_FCS_FIFO_PROT);
211
212
213 ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
214 0x141E0F48);
215
216 ar9170_regwrite_finish();
217
218 return ar9170_regwrite_result();
219}
220
221static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
222{
223 static const u8 zero[ETH_ALEN] = { 0 };
224
225 if (!mac)
226 mac = zero;
227
228 ar9170_regwrite_begin(ar);
229
230 ar9170_regwrite(reg,
231 (mac[3] << 24) | (mac[2] << 16) |
232 (mac[1] << 8) | mac[0]);
233
234 ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]);
235
236 ar9170_regwrite_finish();
237
238 return ar9170_regwrite_result();
239}
240
241int ar9170_update_multicast(struct ar9170 *ar, const u64 mc_hash)
242{
243 int err;
244
245 ar9170_regwrite_begin(ar);
246 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, mc_hash >> 32);
247 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, mc_hash);
248 ar9170_regwrite_finish();
249 err = ar9170_regwrite_result();
250 if (err)
251 return err;
252
253 ar->cur_mc_hash = mc_hash;
254 return 0;
255}
256
257int ar9170_update_frame_filter(struct ar9170 *ar, const u32 filter)
258{
259 int err;
260
261 err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER, filter);
262 if (err)
263 return err;
264
265 ar->cur_filter = filter;
266 return 0;
267}
268
269static int ar9170_set_promiscouous(struct ar9170 *ar)
270{
271 u32 encr_mode, sniffer;
272 int err;
273
274 err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer);
275 if (err)
276 return err;
277
278 err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode);
279 if (err)
280 return err;
281
282 if (ar->sniffer_enabled) {
283 sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
284
285
286
287
288
289
290
291
292
293 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
294 ar->sniffer_enabled = true;
295 } else {
296 sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
297
298 if (ar->rx_software_decryption)
299 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
300 else
301 encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
302 }
303
304 ar9170_regwrite_begin(ar);
305 ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode);
306 ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
307 ar9170_regwrite_finish();
308
309 return ar9170_regwrite_result();
310}
311
312int ar9170_set_operating_mode(struct ar9170 *ar)
313{
314 u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
315 u8 *mac_addr, *bssid;
316 int err;
317
318 if (ar->vif) {
319 mac_addr = ar->mac_addr;
320 bssid = ar->bssid;
321
322 switch (ar->vif->type) {
323 case NL80211_IFTYPE_MESH_POINT:
324 case NL80211_IFTYPE_ADHOC:
325 pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
326 break;
327 case NL80211_IFTYPE_AP:
328 pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
329 break;
330 case NL80211_IFTYPE_WDS:
331 pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
332 break;
333 case NL80211_IFTYPE_MONITOR:
334 ar->sniffer_enabled = true;
335 ar->rx_software_decryption = true;
336 break;
337 default:
338 pm_mode |= AR9170_MAC_REG_POWERMGT_STA;
339 break;
340 }
341 } else {
342 mac_addr = NULL;
343 bssid = NULL;
344 }
345
346 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
347 if (err)
348 return err;
349
350 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
351 if (err)
352 return err;
353
354 err = ar9170_set_promiscouous(ar);
355 if (err)
356 return err;
357
358
359 err = ar9170_set_ampdu_density(ar, 6);
360 if (err)
361 return err;
362
363 ar9170_regwrite_begin(ar);
364
365 ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
366 ar9170_regwrite_finish();
367
368 return ar9170_regwrite_result();
369}
370
371int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry)
372{
373 u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
374
375 return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
376}
377
378int ar9170_set_beacon_timers(struct ar9170 *ar)
379{
380 u32 v = 0;
381 u32 pretbtt = 0;
382
383 if (ar->vif) {
384 v |= ar->vif->bss_conf.beacon_int;
385
386 if (ar->enable_beacon) {
387 switch (ar->vif->type) {
388 case NL80211_IFTYPE_MESH_POINT:
389 case NL80211_IFTYPE_ADHOC:
390 v |= BIT(25);
391 break;
392 case NL80211_IFTYPE_AP:
393 v |= BIT(24);
394 pretbtt = (ar->vif->bss_conf.beacon_int - 6) <<
395 16;
396 break;
397 default:
398 break;
399 }
400 }
401
402 v |= ar->vif->bss_conf.dtim_period << 16;
403 }
404
405 ar9170_regwrite_begin(ar);
406 ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
407 ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
408 ar9170_regwrite_finish();
409 return ar9170_regwrite_result();
410}
411
412int ar9170_update_beacon(struct ar9170 *ar)
413{
414 struct sk_buff *skb;
415 __le32 *data, *old = NULL;
416 u32 word;
417 int i;
418
419 skb = ieee80211_beacon_get(ar->hw, ar->vif);
420 if (!skb)
421 return -ENOMEM;
422
423 data = (__le32 *)skb->data;
424 if (ar->beacon)
425 old = (__le32 *)ar->beacon->data;
426
427 ar9170_regwrite_begin(ar);
428 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
429
430
431
432
433
434 if (old && (data[i] == old[i]))
435 continue;
436
437 word = le32_to_cpu(data[i]);
438 ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word);
439 }
440
441
442 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
443 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
444 ((skb->len + 4) << (3 + 16)) + 0x0400);
445 else
446 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
447 ((skb->len + 4) << 16) + 0x001b);
448
449 ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4);
450 ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS);
451 ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1);
452
453 ar9170_regwrite_finish();
454
455 dev_kfree_skb(ar->beacon);
456 ar->beacon = skb;
457
458 return ar9170_regwrite_result();
459}
460
461void ar9170_new_beacon(struct work_struct *work)
462{
463 struct ar9170 *ar = container_of(work, struct ar9170,
464 beacon_work);
465 struct sk_buff *skb;
466
467 if (unlikely(!IS_STARTED(ar)))
468 return ;
469
470 mutex_lock(&ar->mutex);
471
472 if (!ar->vif)
473 goto out;
474
475 ar9170_update_beacon(ar);
476
477 rcu_read_lock();
478 while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif)))
479 ar9170_op_tx(ar->hw, skb);
480
481 rcu_read_unlock();
482
483 out:
484 mutex_unlock(&ar->mutex);
485}
486
487int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype,
488 u8 keyidx, u8 *keydata, int keylen)
489{
490 __le32 vals[7];
491 static const u8 bcast[ETH_ALEN] =
492 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
493 u8 dummy;
494
495 mac = mac ? : bcast;
496
497 vals[0] = cpu_to_le32((keyidx << 16) + id);
498 vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype);
499 vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 |
500 mac[3] << 8 | mac[2]);
501 memset(&vals[3], 0, 16);
502 if (keydata)
503 memcpy(&vals[3], keydata, keylen);
504
505 return ar->exec_cmd(ar, AR9170_CMD_EKEY,
506 sizeof(vals), (u8 *)vals,
507 1, &dummy);
508}
509
510int ar9170_disable_key(struct ar9170 *ar, u8 id)
511{
512 __le32 val = cpu_to_le32(id);
513 u8 dummy;
514
515 return ar->exec_cmd(ar, AR9170_CMD_EKEY,
516 sizeof(val), (u8 *)&val,
517 1, &dummy);
518}
519