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23#include <linux/netdevice.h>
24#include <linux/etherdevice.h>
25#include <linux/usb.h>
26#include <linux/jiffies.h>
27#include <net/ieee80211_radiotap.h>
28
29#include "zd_def.h"
30#include "zd_chip.h"
31#include "zd_mac.h"
32#include "zd_rf.h"
33
34struct zd_reg_alpha2_map {
35 u32 reg;
36 char alpha2[2];
37};
38
39static struct zd_reg_alpha2_map reg_alpha2_map[] = {
40 { ZD_REGDOMAIN_FCC, "US" },
41 { ZD_REGDOMAIN_IC, "CA" },
42 { ZD_REGDOMAIN_ETSI, "DE" },
43 { ZD_REGDOMAIN_JAPAN, "JP" },
44 { ZD_REGDOMAIN_JAPAN_ADD, "JP" },
45 { ZD_REGDOMAIN_SPAIN, "ES" },
46 { ZD_REGDOMAIN_FRANCE, "FR" },
47};
48
49
50static const struct ieee80211_rate zd_rates[] = {
51 { .bitrate = 10,
52 .hw_value = ZD_CCK_RATE_1M, },
53 { .bitrate = 20,
54 .hw_value = ZD_CCK_RATE_2M,
55 .hw_value_short = ZD_CCK_RATE_2M | ZD_CCK_PREA_SHORT,
56 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
57 { .bitrate = 55,
58 .hw_value = ZD_CCK_RATE_5_5M,
59 .hw_value_short = ZD_CCK_RATE_5_5M | ZD_CCK_PREA_SHORT,
60 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
61 { .bitrate = 110,
62 .hw_value = ZD_CCK_RATE_11M,
63 .hw_value_short = ZD_CCK_RATE_11M | ZD_CCK_PREA_SHORT,
64 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
65 { .bitrate = 60,
66 .hw_value = ZD_OFDM_RATE_6M,
67 .flags = 0 },
68 { .bitrate = 90,
69 .hw_value = ZD_OFDM_RATE_9M,
70 .flags = 0 },
71 { .bitrate = 120,
72 .hw_value = ZD_OFDM_RATE_12M,
73 .flags = 0 },
74 { .bitrate = 180,
75 .hw_value = ZD_OFDM_RATE_18M,
76 .flags = 0 },
77 { .bitrate = 240,
78 .hw_value = ZD_OFDM_RATE_24M,
79 .flags = 0 },
80 { .bitrate = 360,
81 .hw_value = ZD_OFDM_RATE_36M,
82 .flags = 0 },
83 { .bitrate = 480,
84 .hw_value = ZD_OFDM_RATE_48M,
85 .flags = 0 },
86 { .bitrate = 540,
87 .hw_value = ZD_OFDM_RATE_54M,
88 .flags = 0 },
89};
90
91static const struct ieee80211_channel zd_channels[] = {
92 { .center_freq = 2412, .hw_value = 1 },
93 { .center_freq = 2417, .hw_value = 2 },
94 { .center_freq = 2422, .hw_value = 3 },
95 { .center_freq = 2427, .hw_value = 4 },
96 { .center_freq = 2432, .hw_value = 5 },
97 { .center_freq = 2437, .hw_value = 6 },
98 { .center_freq = 2442, .hw_value = 7 },
99 { .center_freq = 2447, .hw_value = 8 },
100 { .center_freq = 2452, .hw_value = 9 },
101 { .center_freq = 2457, .hw_value = 10 },
102 { .center_freq = 2462, .hw_value = 11 },
103 { .center_freq = 2467, .hw_value = 12 },
104 { .center_freq = 2472, .hw_value = 13 },
105 { .center_freq = 2484, .hw_value = 14 },
106};
107
108static void housekeeping_init(struct zd_mac *mac);
109static void housekeeping_enable(struct zd_mac *mac);
110static void housekeeping_disable(struct zd_mac *mac);
111
112static int zd_reg2alpha2(u8 regdomain, char *alpha2)
113{
114 unsigned int i;
115 struct zd_reg_alpha2_map *reg_map;
116 for (i = 0; i < ARRAY_SIZE(reg_alpha2_map); i++) {
117 reg_map = ®_alpha2_map[i];
118 if (regdomain == reg_map->reg) {
119 alpha2[0] = reg_map->alpha2[0];
120 alpha2[1] = reg_map->alpha2[1];
121 return 0;
122 }
123 }
124 return 1;
125}
126
127int zd_mac_preinit_hw(struct ieee80211_hw *hw)
128{
129 int r;
130 u8 addr[ETH_ALEN];
131 struct zd_mac *mac = zd_hw_mac(hw);
132
133 r = zd_chip_read_mac_addr_fw(&mac->chip, addr);
134 if (r)
135 return r;
136
137 SET_IEEE80211_PERM_ADDR(hw, addr);
138
139 return 0;
140}
141
142int zd_mac_init_hw(struct ieee80211_hw *hw)
143{
144 int r;
145 struct zd_mac *mac = zd_hw_mac(hw);
146 struct zd_chip *chip = &mac->chip;
147 char alpha2[2];
148 u8 default_regdomain;
149
150 r = zd_chip_enable_int(chip);
151 if (r)
152 goto out;
153 r = zd_chip_init_hw(chip);
154 if (r)
155 goto disable_int;
156
157 ZD_ASSERT(!irqs_disabled());
158
159 r = zd_read_regdomain(chip, &default_regdomain);
160 if (r)
161 goto disable_int;
162 spin_lock_irq(&mac->lock);
163 mac->regdomain = mac->default_regdomain = default_regdomain;
164 spin_unlock_irq(&mac->lock);
165
166
167
168 r = zd_set_encryption_type(chip, ENC_SNIFFER);
169 if (r)
170 goto disable_int;
171
172 r = zd_reg2alpha2(mac->regdomain, alpha2);
173 if (r)
174 goto disable_int;
175
176 r = regulatory_hint(hw->wiphy, alpha2);
177disable_int:
178 zd_chip_disable_int(chip);
179out:
180 return r;
181}
182
183void zd_mac_clear(struct zd_mac *mac)
184{
185 flush_workqueue(zd_workqueue);
186 zd_chip_clear(&mac->chip);
187 ZD_ASSERT(!spin_is_locked(&mac->lock));
188 ZD_MEMCLEAR(mac, sizeof(struct zd_mac));
189}
190
191static int set_rx_filter(struct zd_mac *mac)
192{
193 unsigned long flags;
194 u32 filter = STA_RX_FILTER;
195
196 spin_lock_irqsave(&mac->lock, flags);
197 if (mac->pass_ctrl)
198 filter |= RX_FILTER_CTRL;
199 spin_unlock_irqrestore(&mac->lock, flags);
200
201 return zd_iowrite32(&mac->chip, CR_RX_FILTER, filter);
202}
203
204static int set_mc_hash(struct zd_mac *mac)
205{
206 struct zd_mc_hash hash;
207 zd_mc_clear(&hash);
208 return zd_chip_set_multicast_hash(&mac->chip, &hash);
209}
210
211static int zd_op_start(struct ieee80211_hw *hw)
212{
213 struct zd_mac *mac = zd_hw_mac(hw);
214 struct zd_chip *chip = &mac->chip;
215 struct zd_usb *usb = &chip->usb;
216 int r;
217
218 if (!usb->initialized) {
219 r = zd_usb_init_hw(usb);
220 if (r)
221 goto out;
222 }
223
224 r = zd_chip_enable_int(chip);
225 if (r < 0)
226 goto out;
227
228 r = zd_chip_set_basic_rates(chip, CR_RATES_80211B | CR_RATES_80211G);
229 if (r < 0)
230 goto disable_int;
231 r = set_rx_filter(mac);
232 if (r)
233 goto disable_int;
234 r = set_mc_hash(mac);
235 if (r)
236 goto disable_int;
237 r = zd_chip_switch_radio_on(chip);
238 if (r < 0)
239 goto disable_int;
240 r = zd_chip_enable_rxtx(chip);
241 if (r < 0)
242 goto disable_radio;
243 r = zd_chip_enable_hwint(chip);
244 if (r < 0)
245 goto disable_rxtx;
246
247 housekeeping_enable(mac);
248 return 0;
249disable_rxtx:
250 zd_chip_disable_rxtx(chip);
251disable_radio:
252 zd_chip_switch_radio_off(chip);
253disable_int:
254 zd_chip_disable_int(chip);
255out:
256 return r;
257}
258
259static void zd_op_stop(struct ieee80211_hw *hw)
260{
261 struct zd_mac *mac = zd_hw_mac(hw);
262 struct zd_chip *chip = &mac->chip;
263 struct sk_buff *skb;
264 struct sk_buff_head *ack_wait_queue = &mac->ack_wait_queue;
265
266
267
268
269
270
271 zd_chip_disable_rxtx(chip);
272 housekeeping_disable(mac);
273 flush_workqueue(zd_workqueue);
274
275 zd_chip_disable_hwint(chip);
276 zd_chip_switch_radio_off(chip);
277 zd_chip_disable_int(chip);
278
279
280 while ((skb = skb_dequeue(ack_wait_queue)))
281 dev_kfree_skb_any(skb);
282}
283
284
285
286
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288
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290
291
292
293
294
295
296
297
298static void tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
299 int ackssi, bool success)
300{
301 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
302
303 ieee80211_tx_info_clear_status(info);
304
305 if (success)
306 info->flags |= IEEE80211_TX_STAT_ACK;
307 info->status.ack_signal = ackssi;
308 ieee80211_tx_status_irqsafe(hw, skb);
309}
310
311
312
313
314
315
316
317
318
319void zd_mac_tx_failed(struct ieee80211_hw *hw)
320{
321 struct sk_buff_head *q = &zd_hw_mac(hw)->ack_wait_queue;
322 struct sk_buff *skb;
323
324 skb = skb_dequeue(q);
325 if (skb == NULL)
326 return;
327
328 tx_status(hw, skb, 0, 0);
329}
330
331
332
333
334
335
336
337
338
339
340
341void zd_mac_tx_to_dev(struct sk_buff *skb, int error)
342{
343 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
344 struct ieee80211_hw *hw = info->rate_driver_data[0];
345
346 skb_pull(skb, sizeof(struct zd_ctrlset));
347 if (unlikely(error ||
348 (info->flags & IEEE80211_TX_CTL_NO_ACK))) {
349 tx_status(hw, skb, 0, !error);
350 } else {
351 struct sk_buff_head *q =
352 &zd_hw_mac(hw)->ack_wait_queue;
353
354 skb_queue_tail(q, skb);
355 while (skb_queue_len(q) > ZD_MAC_MAX_ACK_WAITERS)
356 zd_mac_tx_failed(hw);
357 }
358}
359
360static int zd_calc_tx_length_us(u8 *service, u8 zd_rate, u16 tx_length)
361{
362
363
364
365 static const u8 rate_divisor[] = {
366 [ZD_PURE_RATE(ZD_CCK_RATE_1M)] = 1,
367 [ZD_PURE_RATE(ZD_CCK_RATE_2M)] = 2,
368
369 [ZD_PURE_RATE(ZD_CCK_RATE_5_5M)] = 11,
370 [ZD_PURE_RATE(ZD_CCK_RATE_11M)] = 11,
371 [ZD_PURE_RATE(ZD_OFDM_RATE_6M)] = 6,
372 [ZD_PURE_RATE(ZD_OFDM_RATE_9M)] = 9,
373 [ZD_PURE_RATE(ZD_OFDM_RATE_12M)] = 12,
374 [ZD_PURE_RATE(ZD_OFDM_RATE_18M)] = 18,
375 [ZD_PURE_RATE(ZD_OFDM_RATE_24M)] = 24,
376 [ZD_PURE_RATE(ZD_OFDM_RATE_36M)] = 36,
377 [ZD_PURE_RATE(ZD_OFDM_RATE_48M)] = 48,
378 [ZD_PURE_RATE(ZD_OFDM_RATE_54M)] = 54,
379 };
380
381 u32 bits = (u32)tx_length * 8;
382 u32 divisor;
383
384 divisor = rate_divisor[ZD_PURE_RATE(zd_rate)];
385 if (divisor == 0)
386 return -EINVAL;
387
388 switch (zd_rate) {
389 case ZD_CCK_RATE_5_5M:
390 bits = (2*bits) + 10;
391 break;
392 case ZD_CCK_RATE_11M:
393 if (service) {
394 u32 t = bits % 11;
395 *service &= ~ZD_PLCP_SERVICE_LENGTH_EXTENSION;
396 if (0 < t && t <= 3) {
397 *service |= ZD_PLCP_SERVICE_LENGTH_EXTENSION;
398 }
399 }
400 bits += 10;
401 break;
402 }
403
404 return bits/divisor;
405}
406
407static void cs_set_control(struct zd_mac *mac, struct zd_ctrlset *cs,
408 struct ieee80211_hdr *header,
409 struct ieee80211_tx_info *info)
410{
411
412
413
414
415
416
417 cs->control = 0;
418
419
420 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
421 cs->control |= ZD_CS_NEED_RANDOM_BACKOFF;
422
423
424 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
425 cs->control |= ZD_CS_NO_ACK;
426
427
428 if (ieee80211_is_pspoll(header->frame_control))
429 cs->control |= ZD_CS_PS_POLL_FRAME;
430
431 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
432 cs->control |= ZD_CS_RTS;
433
434 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
435 cs->control |= ZD_CS_SELF_CTS;
436
437
438}
439
440static int zd_mac_config_beacon(struct ieee80211_hw *hw, struct sk_buff *beacon)
441{
442 struct zd_mac *mac = zd_hw_mac(hw);
443 int r;
444 u32 tmp, j = 0;
445
446 u32 full_len = beacon->len + 4;
447
448 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 0);
449 if (r < 0)
450 return r;
451 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp);
452 if (r < 0)
453 return r;
454
455 while (tmp & 0x2) {
456 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp);
457 if (r < 0)
458 return r;
459 if ((++j % 100) == 0) {
460 printk(KERN_ERR "CR_BCN_FIFO_SEMAPHORE not ready\n");
461 if (j >= 500) {
462 printk(KERN_ERR "Giving up beacon config.\n");
463 return -ETIMEDOUT;
464 }
465 }
466 msleep(1);
467 }
468
469 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, full_len - 1);
470 if (r < 0)
471 return r;
472 if (zd_chip_is_zd1211b(&mac->chip)) {
473 r = zd_iowrite32(&mac->chip, CR_BCN_LENGTH, full_len - 1);
474 if (r < 0)
475 return r;
476 }
477
478 for (j = 0 ; j < beacon->len; j++) {
479 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO,
480 *((u8 *)(beacon->data + j)));
481 if (r < 0)
482 return r;
483 }
484
485 for (j = 0; j < 4; j++) {
486 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, 0x0);
487 if (r < 0)
488 return r;
489 }
490
491 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 1);
492 if (r < 0)
493 return r;
494
495
496
497
498
499 return zd_iowrite32(&mac->chip, CR_BCN_PLCP_CFG, 0x00000400 |
500 (full_len << 19));
501}
502
503static int fill_ctrlset(struct zd_mac *mac,
504 struct sk_buff *skb)
505{
506 int r;
507 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
508 unsigned int frag_len = skb->len + FCS_LEN;
509 unsigned int packet_length;
510 struct ieee80211_rate *txrate;
511 struct zd_ctrlset *cs = (struct zd_ctrlset *)
512 skb_push(skb, sizeof(struct zd_ctrlset));
513 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
514
515 ZD_ASSERT(frag_len <= 0xffff);
516
517 txrate = ieee80211_get_tx_rate(mac->hw, info);
518
519 cs->modulation = txrate->hw_value;
520 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
521 cs->modulation = txrate->hw_value_short;
522
523 cs->tx_length = cpu_to_le16(frag_len);
524
525 cs_set_control(mac, cs, hdr, info);
526
527 packet_length = frag_len + sizeof(struct zd_ctrlset) + 10;
528 ZD_ASSERT(packet_length <= 0xffff);
529
530
531
532 cs->packet_length = cpu_to_le16(zd_chip_is_zd1211b(&mac->chip) ?
533 packet_length - frag_len : packet_length);
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548 cs->service = 0;
549 r = zd_calc_tx_length_us(&cs->service, ZD_RATE(cs->modulation),
550 le16_to_cpu(cs->tx_length));
551 if (r < 0)
552 return r;
553 cs->current_length = cpu_to_le16(r);
554 cs->next_frame_length = 0;
555
556 return 0;
557}
558
559
560
561
562
563
564
565
566
567
568
569
570static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
571{
572 struct zd_mac *mac = zd_hw_mac(hw);
573 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
574 int r;
575
576 r = fill_ctrlset(mac, skb);
577 if (r)
578 goto fail;
579
580 info->rate_driver_data[0] = hw;
581
582 r = zd_usb_tx(&mac->chip.usb, skb);
583 if (r)
584 goto fail;
585 return 0;
586
587fail:
588 dev_kfree_skb(skb);
589 return 0;
590}
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr,
607 struct ieee80211_rx_status *stats)
608{
609 struct sk_buff *skb;
610 struct sk_buff_head *q;
611 unsigned long flags;
612
613 if (!ieee80211_is_ack(rx_hdr->frame_control))
614 return 0;
615
616 q = &zd_hw_mac(hw)->ack_wait_queue;
617 spin_lock_irqsave(&q->lock, flags);
618 skb_queue_walk(q, skb) {
619 struct ieee80211_hdr *tx_hdr;
620
621 tx_hdr = (struct ieee80211_hdr *)skb->data;
622 if (likely(!memcmp(tx_hdr->addr2, rx_hdr->addr1, ETH_ALEN)))
623 {
624 __skb_unlink(skb, q);
625 tx_status(hw, skb, stats->signal, 1);
626 goto out;
627 }
628 }
629out:
630 spin_unlock_irqrestore(&q->lock, flags);
631 return 1;
632}
633
634int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
635{
636 struct zd_mac *mac = zd_hw_mac(hw);
637 struct ieee80211_rx_status stats;
638 const struct rx_status *status;
639 struct sk_buff *skb;
640 int bad_frame = 0;
641 __le16 fc;
642 int need_padding;
643 int i;
644 u8 rate;
645
646 if (length < ZD_PLCP_HEADER_SIZE + 10 +
647 FCS_LEN + sizeof(struct rx_status))
648 return -EINVAL;
649
650 memset(&stats, 0, sizeof(stats));
651
652
653
654
655
656
657
658
659
660
661
662 status = (struct rx_status *)
663 (buffer + (length - sizeof(struct rx_status)));
664 if (status->frame_status & ZD_RX_ERROR) {
665 if (mac->pass_failed_fcs &&
666 (status->frame_status & ZD_RX_CRC32_ERROR)) {
667 stats.flag |= RX_FLAG_FAILED_FCS_CRC;
668 bad_frame = 1;
669 } else {
670 return -EINVAL;
671 }
672 }
673
674 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq;
675 stats.band = IEEE80211_BAND_2GHZ;
676 stats.signal = status->signal_strength;
677 stats.qual = zd_rx_qual_percent(buffer,
678 length - sizeof(struct rx_status),
679 status);
680
681 rate = zd_rx_rate(buffer, status);
682
683
684 for (i = 0; i < mac->band.n_bitrates; i++)
685 if (rate == mac->band.bitrates[i].hw_value)
686 stats.rate_idx = i;
687
688 length -= ZD_PLCP_HEADER_SIZE + sizeof(struct rx_status);
689 buffer += ZD_PLCP_HEADER_SIZE;
690
691
692
693
694
695
696 if (!bad_frame &&
697 filter_ack(hw, (struct ieee80211_hdr *)buffer, &stats)
698 && !mac->pass_ctrl)
699 return 0;
700
701 fc = get_unaligned((__le16*)buffer);
702 need_padding = ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc);
703
704 skb = dev_alloc_skb(length + (need_padding ? 2 : 0));
705 if (skb == NULL)
706 return -ENOMEM;
707 if (need_padding) {
708
709 skb_reserve(skb, 2);
710 }
711
712 memcpy(skb_put(skb, length), buffer, length);
713
714 memcpy(IEEE80211_SKB_RXCB(skb), &stats, sizeof(stats));
715 ieee80211_rx_irqsafe(hw, skb);
716 return 0;
717}
718
719static int zd_op_add_interface(struct ieee80211_hw *hw,
720 struct ieee80211_if_init_conf *conf)
721{
722 struct zd_mac *mac = zd_hw_mac(hw);
723
724
725 if (mac->type != NL80211_IFTYPE_UNSPECIFIED)
726 return -EOPNOTSUPP;
727
728 switch (conf->type) {
729 case NL80211_IFTYPE_MONITOR:
730 case NL80211_IFTYPE_MESH_POINT:
731 case NL80211_IFTYPE_STATION:
732 case NL80211_IFTYPE_ADHOC:
733 mac->type = conf->type;
734 break;
735 default:
736 return -EOPNOTSUPP;
737 }
738
739 return zd_write_mac_addr(&mac->chip, conf->mac_addr);
740}
741
742static void zd_op_remove_interface(struct ieee80211_hw *hw,
743 struct ieee80211_if_init_conf *conf)
744{
745 struct zd_mac *mac = zd_hw_mac(hw);
746 mac->type = NL80211_IFTYPE_UNSPECIFIED;
747 zd_set_beacon_interval(&mac->chip, 0);
748 zd_write_mac_addr(&mac->chip, NULL);
749}
750
751static int zd_op_config(struct ieee80211_hw *hw, u32 changed)
752{
753 struct zd_mac *mac = zd_hw_mac(hw);
754 struct ieee80211_conf *conf = &hw->conf;
755
756 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value);
757}
758
759static void zd_process_intr(struct work_struct *work)
760{
761 u16 int_status;
762 struct zd_mac *mac = container_of(work, struct zd_mac, process_intr);
763
764 int_status = le16_to_cpu(*(__le16 *)(mac->intr_buffer+4));
765 if (int_status & INT_CFG_NEXT_BCN)
766 dev_dbg_f_limit(zd_mac_dev(mac), "INT_CFG_NEXT_BCN\n");
767 else
768 dev_dbg_f(zd_mac_dev(mac), "Unsupported interrupt\n");
769
770 zd_chip_enable_hwint(&mac->chip);
771}
772
773
774static void set_multicast_hash_handler(struct work_struct *work)
775{
776 struct zd_mac *mac =
777 container_of(work, struct zd_mac, set_multicast_hash_work);
778 struct zd_mc_hash hash;
779
780 spin_lock_irq(&mac->lock);
781 hash = mac->multicast_hash;
782 spin_unlock_irq(&mac->lock);
783
784 zd_chip_set_multicast_hash(&mac->chip, &hash);
785}
786
787static void set_rx_filter_handler(struct work_struct *work)
788{
789 struct zd_mac *mac =
790 container_of(work, struct zd_mac, set_rx_filter_work);
791 int r;
792
793 dev_dbg_f(zd_mac_dev(mac), "\n");
794 r = set_rx_filter(mac);
795 if (r)
796 dev_err(zd_mac_dev(mac), "set_rx_filter_handler error %d\n", r);
797}
798
799static u64 zd_op_prepare_multicast(struct ieee80211_hw *hw,
800 int mc_count, struct dev_addr_list *mclist)
801{
802 struct zd_mac *mac = zd_hw_mac(hw);
803 struct zd_mc_hash hash;
804 int i;
805
806 zd_mc_clear(&hash);
807
808 for (i = 0; i < mc_count; i++) {
809 if (!mclist)
810 break;
811 dev_dbg_f(zd_mac_dev(mac), "mc addr %pM\n", mclist->dmi_addr);
812 zd_mc_add_addr(&hash, mclist->dmi_addr);
813 mclist = mclist->next;
814 }
815
816 return hash.low | ((u64)hash.high << 32);
817}
818
819#define SUPPORTED_FIF_FLAGS \
820 (FIF_PROMISC_IN_BSS | FIF_ALLMULTI | FIF_FCSFAIL | FIF_CONTROL | \
821 FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)
822static void zd_op_configure_filter(struct ieee80211_hw *hw,
823 unsigned int changed_flags,
824 unsigned int *new_flags,
825 u64 multicast)
826{
827 struct zd_mc_hash hash = {
828 .low = multicast,
829 .high = multicast >> 32,
830 };
831 struct zd_mac *mac = zd_hw_mac(hw);
832 unsigned long flags;
833
834
835 changed_flags &= SUPPORTED_FIF_FLAGS;
836 *new_flags &= SUPPORTED_FIF_FLAGS;
837
838
839
840
841 if (!changed_flags)
842 return;
843
844 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI))
845 zd_mc_add_all(&hash);
846
847 spin_lock_irqsave(&mac->lock, flags);
848 mac->pass_failed_fcs = !!(*new_flags & FIF_FCSFAIL);
849 mac->pass_ctrl = !!(*new_flags & FIF_CONTROL);
850 mac->multicast_hash = hash;
851 spin_unlock_irqrestore(&mac->lock, flags);
852
853
854 queue_work(zd_workqueue, &mac->set_multicast_hash_work);
855
856 if (changed_flags & FIF_CONTROL)
857 queue_work(zd_workqueue, &mac->set_rx_filter_work);
858
859
860
861
862
863
864
865
866
867}
868
869static void set_rts_cts_work(struct work_struct *work)
870{
871 struct zd_mac *mac =
872 container_of(work, struct zd_mac, set_rts_cts_work);
873 unsigned long flags;
874 unsigned int short_preamble;
875
876 mutex_lock(&mac->chip.mutex);
877
878 spin_lock_irqsave(&mac->lock, flags);
879 mac->updating_rts_rate = 0;
880 short_preamble = mac->short_preamble;
881 spin_unlock_irqrestore(&mac->lock, flags);
882
883 zd_chip_set_rts_cts_rate_locked(&mac->chip, short_preamble);
884 mutex_unlock(&mac->chip.mutex);
885}
886
887static void zd_op_bss_info_changed(struct ieee80211_hw *hw,
888 struct ieee80211_vif *vif,
889 struct ieee80211_bss_conf *bss_conf,
890 u32 changes)
891{
892 struct zd_mac *mac = zd_hw_mac(hw);
893 unsigned long flags;
894 int associated;
895
896 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes);
897
898 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
899 mac->type == NL80211_IFTYPE_ADHOC) {
900 associated = true;
901 if (changes & BSS_CHANGED_BEACON) {
902 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
903
904 if (beacon) {
905 zd_mac_config_beacon(hw, beacon);
906 kfree_skb(beacon);
907 }
908 }
909
910 if (changes & BSS_CHANGED_BEACON_ENABLED) {
911 u32 interval;
912
913 if (bss_conf->enable_beacon)
914 interval = BCN_MODE_IBSS |
915 bss_conf->beacon_int;
916 else
917 interval = 0;
918
919 zd_set_beacon_interval(&mac->chip, interval);
920 }
921 } else
922 associated = is_valid_ether_addr(bss_conf->bssid);
923
924 spin_lock_irq(&mac->lock);
925 mac->associated = associated;
926 spin_unlock_irq(&mac->lock);
927
928
929
930 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
931 spin_lock_irqsave(&mac->lock, flags);
932 mac->short_preamble = bss_conf->use_short_preamble;
933 if (!mac->updating_rts_rate) {
934 mac->updating_rts_rate = 1;
935
936
937 queue_work(zd_workqueue, &mac->set_rts_cts_work);
938 }
939 spin_unlock_irqrestore(&mac->lock, flags);
940 }
941}
942
943static u64 zd_op_get_tsf(struct ieee80211_hw *hw)
944{
945 struct zd_mac *mac = zd_hw_mac(hw);
946 return zd_chip_get_tsf(&mac->chip);
947}
948
949static const struct ieee80211_ops zd_ops = {
950 .tx = zd_op_tx,
951 .start = zd_op_start,
952 .stop = zd_op_stop,
953 .add_interface = zd_op_add_interface,
954 .remove_interface = zd_op_remove_interface,
955 .config = zd_op_config,
956 .prepare_multicast = zd_op_prepare_multicast,
957 .configure_filter = zd_op_configure_filter,
958 .bss_info_changed = zd_op_bss_info_changed,
959 .get_tsf = zd_op_get_tsf,
960};
961
962struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf)
963{
964 struct zd_mac *mac;
965 struct ieee80211_hw *hw;
966
967 hw = ieee80211_alloc_hw(sizeof(struct zd_mac), &zd_ops);
968 if (!hw) {
969 dev_dbg_f(&intf->dev, "out of memory\n");
970 return NULL;
971 }
972
973 mac = zd_hw_mac(hw);
974
975 memset(mac, 0, sizeof(*mac));
976 spin_lock_init(&mac->lock);
977 mac->hw = hw;
978
979 mac->type = NL80211_IFTYPE_UNSPECIFIED;
980
981 memcpy(mac->channels, zd_channels, sizeof(zd_channels));
982 memcpy(mac->rates, zd_rates, sizeof(zd_rates));
983 mac->band.n_bitrates = ARRAY_SIZE(zd_rates);
984 mac->band.bitrates = mac->rates;
985 mac->band.n_channels = ARRAY_SIZE(zd_channels);
986 mac->band.channels = mac->channels;
987
988 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band;
989
990 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
991 IEEE80211_HW_SIGNAL_UNSPEC;
992
993 hw->wiphy->interface_modes =
994 BIT(NL80211_IFTYPE_MESH_POINT) |
995 BIT(NL80211_IFTYPE_STATION) |
996 BIT(NL80211_IFTYPE_ADHOC);
997
998 hw->max_signal = 100;
999 hw->queues = 1;
1000 hw->extra_tx_headroom = sizeof(struct zd_ctrlset);
1001
1002 skb_queue_head_init(&mac->ack_wait_queue);
1003
1004 zd_chip_init(&mac->chip, hw, intf);
1005 housekeeping_init(mac);
1006 INIT_WORK(&mac->set_multicast_hash_work, set_multicast_hash_handler);
1007 INIT_WORK(&mac->set_rts_cts_work, set_rts_cts_work);
1008 INIT_WORK(&mac->set_rx_filter_work, set_rx_filter_handler);
1009 INIT_WORK(&mac->process_intr, zd_process_intr);
1010
1011 SET_IEEE80211_DEV(hw, &intf->dev);
1012 return hw;
1013}
1014
1015#define LINK_LED_WORK_DELAY HZ
1016
1017static void link_led_handler(struct work_struct *work)
1018{
1019 struct zd_mac *mac =
1020 container_of(work, struct zd_mac, housekeeping.link_led_work.work);
1021 struct zd_chip *chip = &mac->chip;
1022 int is_associated;
1023 int r;
1024
1025 spin_lock_irq(&mac->lock);
1026 is_associated = mac->associated;
1027 spin_unlock_irq(&mac->lock);
1028
1029 r = zd_chip_control_leds(chip,
1030 is_associated ? ZD_LED_ASSOCIATED : ZD_LED_SCANNING);
1031 if (r)
1032 dev_dbg_f(zd_mac_dev(mac), "zd_chip_control_leds error %d\n", r);
1033
1034 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work,
1035 LINK_LED_WORK_DELAY);
1036}
1037
1038static void housekeeping_init(struct zd_mac *mac)
1039{
1040 INIT_DELAYED_WORK(&mac->housekeeping.link_led_work, link_led_handler);
1041}
1042
1043static void housekeeping_enable(struct zd_mac *mac)
1044{
1045 dev_dbg_f(zd_mac_dev(mac), "\n");
1046 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work,
1047 0);
1048}
1049
1050static void housekeeping_disable(struct zd_mac *mac)
1051{
1052 dev_dbg_f(zd_mac_dev(mac), "\n");
1053 cancel_rearming_delayed_workqueue(zd_workqueue,
1054 &mac->housekeeping.link_led_work);
1055 zd_chip_control_leds(&mac->chip, ZD_LED_OFF);
1056}
1057