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29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/types.h>
32#include <linux/slab.h>
33#include <linux/workqueue.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/wait.h>
37#include <linux/pci.h>
38#include <linux/pci_hotplug.h>
39#include <linux/kthread.h>
40#include "cpqphp.h"
41
42static u32 configure_new_device(struct controller* ctrl, struct pci_func *func,
43 u8 behind_bridge, struct resource_lists *resources);
44static int configure_new_function(struct controller* ctrl, struct pci_func *func,
45 u8 behind_bridge, struct resource_lists *resources);
46static void interrupt_event_handler(struct controller *ctrl);
47
48
49static struct task_struct *cpqhp_event_thread;
50static unsigned long pushbutton_pending;
51
52
53static void long_delay(int delay)
54{
55
56
57
58
59
60
61 msleep_interruptible(jiffies_to_msecs(delay));
62}
63
64
65
66#define WRONG_BUS_FREQUENCY 0x07
67static u8 handle_switch_change(u8 change, struct controller * ctrl)
68{
69 int hp_slot;
70 u8 rc = 0;
71 u16 temp_word;
72 struct pci_func *func;
73 struct event_info *taskInfo;
74
75 if (!change)
76 return 0;
77
78
79 dbg("cpqsbd: Switch interrupt received.\n");
80
81 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
82 if (change & (0x1L << hp_slot)) {
83
84
85
86 func = cpqhp_slot_find(ctrl->bus,
87 (hp_slot + ctrl->slot_device_offset), 0);
88
89
90
91
92 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
93 ctrl->next_event = (ctrl->next_event + 1) % 10;
94 taskInfo->hp_slot = hp_slot;
95
96 rc++;
97
98 temp_word = ctrl->ctrl_int_comp >> 16;
99 func->presence_save = (temp_word >> hp_slot) & 0x01;
100 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
101
102 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
103
104
105
106
107 func->switch_save = 0;
108
109 taskInfo->event_type = INT_SWITCH_OPEN;
110 } else {
111
112
113
114
115 func->switch_save = 0x10;
116
117 taskInfo->event_type = INT_SWITCH_CLOSE;
118 }
119 }
120 }
121
122 return rc;
123}
124
125
126
127
128
129
130static struct slot *cpqhp_find_slot(struct controller *ctrl, u8 device)
131{
132 struct slot *slot = ctrl->slot;
133
134 while (slot && (slot->device != device))
135 slot = slot->next;
136
137 return slot;
138}
139
140
141static u8 handle_presence_change(u16 change, struct controller * ctrl)
142{
143 int hp_slot;
144 u8 rc = 0;
145 u8 temp_byte;
146 u16 temp_word;
147 struct pci_func *func;
148 struct event_info *taskInfo;
149 struct slot *p_slot;
150
151 if (!change)
152 return 0;
153
154
155
156
157 dbg("cpqsbd: Presence/Notify input change.\n");
158 dbg(" Changed bits are 0x%4.4x\n", change );
159
160 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
161 if (change & (0x0101 << hp_slot)) {
162
163
164
165 func = cpqhp_slot_find(ctrl->bus,
166 (hp_slot + ctrl->slot_device_offset), 0);
167
168 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
169 ctrl->next_event = (ctrl->next_event + 1) % 10;
170 taskInfo->hp_slot = hp_slot;
171
172 rc++;
173
174 p_slot = cpqhp_find_slot(ctrl, hp_slot + (readb(ctrl->hpc_reg + SLOT_MASK) >> 4));
175 if (!p_slot)
176 return 0;
177
178
179
180
181 if (func->switch_save && (ctrl->push_button == 1)) {
182 temp_word = ctrl->ctrl_int_comp >> 16;
183 temp_byte = (temp_word >> hp_slot) & 0x01;
184 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
185
186 if (temp_byte != func->presence_save) {
187
188
189
190 dbg("hp_slot %d button pressed\n", hp_slot);
191 taskInfo->event_type = INT_BUTTON_PRESS;
192 } else {
193
194
195
196 dbg("hp_slot %d button released\n", hp_slot);
197 taskInfo->event_type = INT_BUTTON_RELEASE;
198
199
200 if ((p_slot->state == BLINKINGON_STATE)
201 || (p_slot->state == BLINKINGOFF_STATE)) {
202 taskInfo->event_type = INT_BUTTON_CANCEL;
203 dbg("hp_slot %d button cancel\n", hp_slot);
204 } else if ((p_slot->state == POWERON_STATE)
205 || (p_slot->state == POWEROFF_STATE)) {
206
207 taskInfo->event_type = INT_BUTTON_IGNORE;
208 dbg("hp_slot %d button ignore\n", hp_slot);
209 }
210 }
211 } else {
212
213
214
215 temp_word = ctrl->ctrl_int_comp >> 16;
216 func->presence_save = (temp_word >> hp_slot) & 0x01;
217 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
218
219 if ((!(ctrl->ctrl_int_comp & (0x010000 << hp_slot))) ||
220 (!(ctrl->ctrl_int_comp & (0x01000000 << hp_slot)))) {
221
222 taskInfo->event_type = INT_PRESENCE_ON;
223 } else {
224
225 taskInfo->event_type = INT_PRESENCE_OFF;
226 }
227 }
228 }
229 }
230
231 return rc;
232}
233
234
235static u8 handle_power_fault(u8 change, struct controller * ctrl)
236{
237 int hp_slot;
238 u8 rc = 0;
239 struct pci_func *func;
240 struct event_info *taskInfo;
241
242 if (!change)
243 return 0;
244
245
246
247
248
249 info("power fault interrupt\n");
250
251 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
252 if (change & (0x01 << hp_slot)) {
253
254
255
256 func = cpqhp_slot_find(ctrl->bus,
257 (hp_slot + ctrl->slot_device_offset), 0);
258
259 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
260 ctrl->next_event = (ctrl->next_event + 1) % 10;
261 taskInfo->hp_slot = hp_slot;
262
263 rc++;
264
265 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
266
267
268
269 func->status = 0x00;
270
271 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
272 } else {
273
274
275
276 taskInfo->event_type = INT_POWER_FAULT;
277
278 if (ctrl->rev < 4) {
279 amber_LED_on (ctrl, hp_slot);
280 green_LED_off (ctrl, hp_slot);
281 set_SOGO (ctrl);
282
283
284
285
286
287
288
289
290
291
292
293
294
295 } else {
296
297 func->status = 0xFF;
298 info("power fault bit %x set\n", hp_slot);
299 }
300 }
301 }
302 }
303
304 return rc;
305}
306
307
308
309
310
311
312static int sort_by_size(struct pci_resource **head)
313{
314 struct pci_resource *current_res;
315 struct pci_resource *next_res;
316 int out_of_order = 1;
317
318 if (!(*head))
319 return 1;
320
321 if (!((*head)->next))
322 return 0;
323
324 while (out_of_order) {
325 out_of_order = 0;
326
327
328 if (((*head)->next) &&
329 ((*head)->length > (*head)->next->length)) {
330 out_of_order++;
331 current_res = *head;
332 *head = (*head)->next;
333 current_res->next = (*head)->next;
334 (*head)->next = current_res;
335 }
336
337 current_res = *head;
338
339 while (current_res->next && current_res->next->next) {
340 if (current_res->next->length > current_res->next->next->length) {
341 out_of_order++;
342 next_res = current_res->next;
343 current_res->next = current_res->next->next;
344 current_res = current_res->next;
345 next_res->next = current_res->next;
346 current_res->next = next_res;
347 } else
348 current_res = current_res->next;
349 }
350 }
351
352 return 0;
353}
354
355
356
357
358
359
360static int sort_by_max_size(struct pci_resource **head)
361{
362 struct pci_resource *current_res;
363 struct pci_resource *next_res;
364 int out_of_order = 1;
365
366 if (!(*head))
367 return 1;
368
369 if (!((*head)->next))
370 return 0;
371
372 while (out_of_order) {
373 out_of_order = 0;
374
375
376 if (((*head)->next) &&
377 ((*head)->length < (*head)->next->length)) {
378 out_of_order++;
379 current_res = *head;
380 *head = (*head)->next;
381 current_res->next = (*head)->next;
382 (*head)->next = current_res;
383 }
384
385 current_res = *head;
386
387 while (current_res->next && current_res->next->next) {
388 if (current_res->next->length < current_res->next->next->length) {
389 out_of_order++;
390 next_res = current_res->next;
391 current_res->next = current_res->next->next;
392 current_res = current_res->next;
393 next_res->next = current_res->next;
394 current_res->next = next_res;
395 } else
396 current_res = current_res->next;
397 }
398 }
399
400 return 0;
401}
402
403
404
405
406
407
408
409
410static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **head,
411 struct pci_resource **orig_head, u32 alignment)
412{
413 struct pci_resource *prevnode = NULL;
414 struct pci_resource *node;
415 struct pci_resource *split_node;
416 u32 rc;
417 u32 temp_dword;
418 dbg("do_pre_bridge_resource_split\n");
419
420 if (!(*head) || !(*orig_head))
421 return NULL;
422
423 rc = cpqhp_resource_sort_and_combine(head);
424
425 if (rc)
426 return NULL;
427
428 if ((*head)->base != (*orig_head)->base)
429 return NULL;
430
431 if ((*head)->length == (*orig_head)->length)
432 return NULL;
433
434
435
436
437
438
439 node = *head;
440
441 if (node->length & (alignment -1)) {
442
443
444
445 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
446
447 if (!split_node)
448 return NULL;
449
450 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
451
452 split_node->base = node->base;
453 split_node->length = temp_dword;
454
455 node->length -= temp_dword;
456 node->base += split_node->length;
457
458
459 *head = split_node;
460 split_node->next = node;
461 }
462
463 if (node->length < alignment)
464 return NULL;
465
466
467 if (*head == node) {
468 *head = node->next;
469 } else {
470 prevnode = *head;
471 while (prevnode->next != node)
472 prevnode = prevnode->next;
473
474 prevnode->next = node->next;
475 }
476 node->next = NULL;
477
478 return node;
479}
480
481
482
483
484
485
486
487static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, u32 alignment)
488{
489 struct pci_resource *prevnode = NULL;
490 struct pci_resource *node;
491 u32 rc;
492 u32 temp_dword;
493
494 rc = cpqhp_resource_sort_and_combine(head);
495
496 if (rc)
497 return NULL;
498
499 node = *head;
500
501 while (node->next) {
502 prevnode = node;
503 node = node->next;
504 kfree(prevnode);
505 }
506
507 if (node->length < alignment)
508 goto error;
509
510 if (node->base & (alignment - 1)) {
511
512 temp_dword = (node->base | (alignment-1)) + 1;
513 if ((node->length - (temp_dword - node->base)) < alignment)
514 goto error;
515
516 node->length -= (temp_dword - node->base);
517 node->base = temp_dword;
518 }
519
520 if (node->length & (alignment - 1))
521
522 goto error;
523
524 return node;
525error:
526 kfree(node);
527 return NULL;
528}
529
530
531
532
533
534
535
536
537
538
539
540static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
541{
542 struct pci_resource *prevnode;
543 struct pci_resource *node;
544 struct pci_resource *split_node;
545 u32 temp_dword;
546
547 if (!(*head))
548 return NULL;
549
550 if (cpqhp_resource_sort_and_combine(head))
551 return NULL;
552
553 if (sort_by_size(head))
554 return NULL;
555
556 for (node = *head; node; node = node->next) {
557 if (node->length < size)
558 continue;
559
560 if (node->base & (size - 1)) {
561
562
563
564 temp_dword = (node->base | (size-1)) + 1;
565
566
567 if ((node->length - (temp_dword - node->base)) < size)
568 continue;
569
570 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
571
572 if (!split_node)
573 return NULL;
574
575 split_node->base = node->base;
576 split_node->length = temp_dword - node->base;
577 node->base = temp_dword;
578 node->length -= split_node->length;
579
580
581 split_node->next = node->next;
582 node->next = split_node;
583 }
584
585
586 if (node->length > size) {
587
588
589
590 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
591
592 if (!split_node)
593 return NULL;
594
595 split_node->base = node->base + size;
596 split_node->length = node->length - size;
597 node->length = size;
598
599
600 split_node->next = node->next;
601 node->next = split_node;
602 }
603
604
605 if (node->base & 0x300L)
606 continue;
607
608
609
610
611 if (*head == node) {
612 *head = node->next;
613 } else {
614 prevnode = *head;
615 while (prevnode->next != node)
616 prevnode = prevnode->next;
617
618 prevnode->next = node->next;
619 }
620 node->next = NULL;
621 break;
622 }
623
624 return node;
625}
626
627
628
629
630
631
632
633
634
635
636
637static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
638{
639 struct pci_resource *max;
640 struct pci_resource *temp;
641 struct pci_resource *split_node;
642 u32 temp_dword;
643
644 if (cpqhp_resource_sort_and_combine(head))
645 return NULL;
646
647 if (sort_by_max_size(head))
648 return NULL;
649
650 for (max = *head; max; max = max->next) {
651
652
653
654 if (max->length < size)
655 continue;
656
657 if (max->base & (size - 1)) {
658
659
660
661 temp_dword = (max->base | (size-1)) + 1;
662
663
664 if ((max->length - (temp_dword - max->base)) < size)
665 continue;
666
667 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
668
669 if (!split_node)
670 return NULL;
671
672 split_node->base = max->base;
673 split_node->length = temp_dword - max->base;
674 max->base = temp_dword;
675 max->length -= split_node->length;
676
677 split_node->next = max->next;
678 max->next = split_node;
679 }
680
681 if ((max->base + max->length) & (size - 1)) {
682
683
684
685 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
686
687 if (!split_node)
688 return NULL;
689 temp_dword = ((max->base + max->length) & ~(size - 1));
690 split_node->base = temp_dword;
691 split_node->length = max->length + max->base
692 - split_node->base;
693 max->length -= split_node->length;
694
695 split_node->next = max->next;
696 max->next = split_node;
697 }
698
699
700 if (max->length < size)
701 continue;
702
703
704 temp = *head;
705 if (temp == max) {
706 *head = max->next;
707 } else {
708 while (temp && temp->next != max) {
709 temp = temp->next;
710 }
711
712 temp->next = max->next;
713 }
714
715 max->next = NULL;
716 break;
717 }
718
719 return max;
720}
721
722
723
724
725
726
727
728
729
730
731
732
733
734static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
735{
736 struct pci_resource *prevnode;
737 struct pci_resource *node;
738 struct pci_resource *split_node;
739 u32 temp_dword;
740
741 if (cpqhp_resource_sort_and_combine(head))
742 return NULL;
743
744 if (sort_by_size(head))
745 return NULL;
746
747 for (node = *head; node; node = node->next) {
748 dbg("%s: req_size =%x node=%p, base=%x, length=%x\n",
749 __func__, size, node, node->base, node->length);
750 if (node->length < size)
751 continue;
752
753 if (node->base & (size - 1)) {
754 dbg("%s: not aligned\n", __func__);
755
756
757
758 temp_dword = (node->base | (size-1)) + 1;
759
760
761 if ((node->length - (temp_dword - node->base)) < size)
762 continue;
763
764 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
765
766 if (!split_node)
767 return NULL;
768
769 split_node->base = node->base;
770 split_node->length = temp_dword - node->base;
771 node->base = temp_dword;
772 node->length -= split_node->length;
773
774 split_node->next = node->next;
775 node->next = split_node;
776 }
777
778
779 if (node->length > size) {
780 dbg("%s: too big\n", __func__);
781
782
783
784 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
785
786 if (!split_node)
787 return NULL;
788
789 split_node->base = node->base + size;
790 split_node->length = node->length - size;
791 node->length = size;
792
793
794 split_node->next = node->next;
795 node->next = split_node;
796 }
797
798 dbg("%s: got one!!!\n", __func__);
799
800
801 if (*head == node) {
802 *head = node->next;
803 } else {
804 prevnode = *head;
805 while (prevnode->next != node)
806 prevnode = prevnode->next;
807
808 prevnode->next = node->next;
809 }
810 node->next = NULL;
811 break;
812 }
813 return node;
814}
815
816
817
818
819
820
821
822
823
824
825
826
827int cpqhp_resource_sort_and_combine(struct pci_resource **head)
828{
829 struct pci_resource *node1;
830 struct pci_resource *node2;
831 int out_of_order = 1;
832
833 dbg("%s: head = %p, *head = %p\n", __func__, head, *head);
834
835 if (!(*head))
836 return 1;
837
838 dbg("*head->next = %p\n",(*head)->next);
839
840 if (!(*head)->next)
841 return 0;
842
843 dbg("*head->base = 0x%x\n",(*head)->base);
844 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
845 while (out_of_order) {
846 out_of_order = 0;
847
848
849 if (((*head)->next) &&
850 ((*head)->base > (*head)->next->base)) {
851 node1 = *head;
852 (*head) = (*head)->next;
853 node1->next = (*head)->next;
854 (*head)->next = node1;
855 out_of_order++;
856 }
857
858 node1 = (*head);
859
860 while (node1->next && node1->next->next) {
861 if (node1->next->base > node1->next->next->base) {
862 out_of_order++;
863 node2 = node1->next;
864 node1->next = node1->next->next;
865 node1 = node1->next;
866 node2->next = node1->next;
867 node1->next = node2;
868 } else
869 node1 = node1->next;
870 }
871 }
872
873 node1 = *head;
874
875 while (node1 && node1->next) {
876 if ((node1->base + node1->length) == node1->next->base) {
877
878 dbg("8..\n");
879 node1->length += node1->next->length;
880 node2 = node1->next;
881 node1->next = node1->next->next;
882 kfree(node2);
883 } else
884 node1 = node1->next;
885 }
886
887 return 0;
888}
889
890
891irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
892{
893 struct controller *ctrl = data;
894 u8 schedule_flag = 0;
895 u8 reset;
896 u16 misc;
897 u32 Diff;
898 u32 temp_dword;
899
900
901 misc = readw(ctrl->hpc_reg + MISC);
902
903
904
905 if (!(misc & 0x000C)) {
906 return IRQ_NONE;
907 }
908
909 if (misc & 0x0004) {
910
911
912
913
914
915 misc |= 0x0004;
916 writew(misc, ctrl->hpc_reg + MISC);
917
918
919 misc = readw(ctrl->hpc_reg + MISC);
920
921 dbg ("%s - waking up\n", __func__);
922 wake_up_interruptible(&ctrl->queue);
923 }
924
925 if (misc & 0x0008) {
926
927 Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
928
929 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
930
931
932 writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
933
934
935 temp_dword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
936
937 if (!Diff)
938
939 writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
940
941 schedule_flag += handle_switch_change((u8)(Diff & 0xFFL), ctrl);
942 schedule_flag += handle_presence_change((u16)((Diff & 0xFFFF0000L) >> 16), ctrl);
943 schedule_flag += handle_power_fault((u8)((Diff & 0xFF00L) >> 8), ctrl);
944 }
945
946 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
947 if (reset & 0x40) {
948
949 reset &= 0xCF;
950 writeb(reset, ctrl->hpc_reg + RESET_FREQ_MODE);
951 reset = readb(ctrl->hpc_reg + RESET_FREQ_MODE);
952 wake_up_interruptible(&ctrl->queue);
953 }
954
955 if (schedule_flag) {
956 wake_up_process(cpqhp_event_thread);
957 dbg("Waking even thread");
958 }
959 return IRQ_HANDLED;
960}
961
962
963
964
965
966
967
968
969struct pci_func *cpqhp_slot_create(u8 busnumber)
970{
971 struct pci_func *new_slot;
972 struct pci_func *next;
973
974 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
975 if (new_slot == NULL)
976 return new_slot;
977
978 new_slot->next = NULL;
979 new_slot->configured = 1;
980
981 if (cpqhp_slot_list[busnumber] == NULL) {
982 cpqhp_slot_list[busnumber] = new_slot;
983 } else {
984 next = cpqhp_slot_list[busnumber];
985 while (next->next != NULL)
986 next = next->next;
987 next->next = new_slot;
988 }
989 return new_slot;
990}
991
992
993
994
995
996
997
998
999static int slot_remove(struct pci_func * old_slot)
1000{
1001 struct pci_func *next;
1002
1003 if (old_slot == NULL)
1004 return 1;
1005
1006 next = cpqhp_slot_list[old_slot->bus];
1007 if (next == NULL)
1008 return 1;
1009
1010 if (next == old_slot) {
1011 cpqhp_slot_list[old_slot->bus] = old_slot->next;
1012 cpqhp_destroy_board_resources(old_slot);
1013 kfree(old_slot);
1014 return 0;
1015 }
1016
1017 while ((next->next != old_slot) && (next->next != NULL))
1018 next = next->next;
1019
1020 if (next->next == old_slot) {
1021 next->next = old_slot->next;
1022 cpqhp_destroy_board_resources(old_slot);
1023 kfree(old_slot);
1024 return 0;
1025 } else
1026 return 2;
1027}
1028
1029
1030
1031
1032
1033
1034
1035
1036static int bridge_slot_remove(struct pci_func *bridge)
1037{
1038 u8 subordinateBus, secondaryBus;
1039 u8 tempBus;
1040 struct pci_func *next;
1041
1042 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
1043 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
1044
1045 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
1046 next = cpqhp_slot_list[tempBus];
1047
1048 while (!slot_remove(next))
1049 next = cpqhp_slot_list[tempBus];
1050 }
1051
1052 next = cpqhp_slot_list[bridge->bus];
1053
1054 if (next == NULL)
1055 return 1;
1056
1057 if (next == bridge) {
1058 cpqhp_slot_list[bridge->bus] = bridge->next;
1059 goto out;
1060 }
1061
1062 while ((next->next != bridge) && (next->next != NULL))
1063 next = next->next;
1064
1065 if (next->next != bridge)
1066 return 2;
1067 next->next = bridge->next;
1068out:
1069 kfree(bridge);
1070 return 0;
1071}
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082struct pci_func *cpqhp_slot_find(u8 bus, u8 device, u8 index)
1083{
1084 int found = -1;
1085 struct pci_func *func;
1086
1087 func = cpqhp_slot_list[bus];
1088
1089 if ((func == NULL) || ((func->device == device) && (index == 0)))
1090 return func;
1091
1092 if (func->device == device)
1093 found++;
1094
1095 while (func->next != NULL) {
1096 func = func->next;
1097
1098 if (func->device == device)
1099 found++;
1100
1101 if (found == index)
1102 return func;
1103 }
1104
1105 return NULL;
1106}
1107
1108
1109
1110
1111static int is_bridge(struct pci_func * func)
1112{
1113
1114 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1115 return 1;
1116 else
1117 return 0;
1118}
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
1131{
1132 struct slot *slot;
1133 u8 reg;
1134 u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
1135 u16 reg16;
1136 u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
1137
1138 if (ctrl->speed == adapter_speed)
1139 return 0;
1140
1141
1142
1143
1144 for(slot = ctrl->slot; slot; slot = slot->next) {
1145 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1146 continue;
1147 if (!slot->hotplug_slot || !slot->hotplug_slot->info)
1148 continue;
1149 if (slot->hotplug_slot->info->adapter_status == 0)
1150 continue;
1151
1152
1153
1154
1155 if (ctrl->speed < adapter_speed)
1156 return 0;
1157
1158 return 1;
1159 }
1160
1161
1162
1163
1164 if ((ctrl->speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1165 return 1;
1166
1167
1168 if ((ctrl->speed < adapter_speed) && (!ctrl->pcix_speed_capability))
1169 return 0;
1170
1171
1172
1173
1174 if (ctrl->speed_capability < adapter_speed) {
1175 if (ctrl->speed == ctrl->speed_capability)
1176 return 0;
1177 adapter_speed = ctrl->speed_capability;
1178 }
1179
1180 writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
1181 writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
1182
1183 set_SOGO(ctrl);
1184 wait_for_ctrl_irq(ctrl);
1185
1186 if (adapter_speed != PCI_SPEED_133MHz_PCIX)
1187 reg = 0xF5;
1188 else
1189 reg = 0xF4;
1190 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1191
1192 reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
1193 reg16 &= ~0x000F;
1194 switch(adapter_speed) {
1195 case(PCI_SPEED_133MHz_PCIX):
1196 reg = 0x75;
1197 reg16 |= 0xB;
1198 break;
1199 case(PCI_SPEED_100MHz_PCIX):
1200 reg = 0x74;
1201 reg16 |= 0xA;
1202 break;
1203 case(PCI_SPEED_66MHz_PCIX):
1204 reg = 0x73;
1205 reg16 |= 0x9;
1206 break;
1207 case(PCI_SPEED_66MHz):
1208 reg = 0x73;
1209 reg16 |= 0x1;
1210 break;
1211 default:
1212 reg = 0x71;
1213 break;
1214
1215 }
1216 reg16 |= 0xB << 12;
1217 writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
1218
1219 mdelay(5);
1220
1221
1222 writel(0, ctrl->hpc_reg + INT_MASK);
1223
1224 pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
1225
1226
1227 reg = ~0xF;
1228 pci_read_config_byte(ctrl->pci_dev, 0x43, ®);
1229 pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
1230
1231
1232 if (((ctrl->speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
1233 ((ctrl->speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
1234 set_SOGO(ctrl);
1235
1236 wait_for_ctrl_irq(ctrl);
1237 mdelay(1100);
1238
1239
1240 writel(leds, ctrl->hpc_reg + LED_CONTROL);
1241 writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
1242
1243 set_SOGO(ctrl);
1244 wait_for_ctrl_irq(ctrl);
1245
1246 ctrl->speed = adapter_speed;
1247 slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1248
1249 info("Successfully changed frequency/mode for adapter in slot %d\n",
1250 slot->number);
1251 return 0;
1252}
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1271{
1272 u8 hp_slot;
1273 u8 temp_byte;
1274 u8 adapter_speed;
1275 u32 rc = 0;
1276
1277 hp_slot = func->device - ctrl->slot_device_offset;
1278
1279
1280
1281
1282 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
1283 rc = INTERLOCK_OPEN;
1284
1285
1286
1287 else if (is_slot_enabled (ctrl, hp_slot))
1288 rc = CARD_FUNCTIONING;
1289 else {
1290 mutex_lock(&ctrl->crit_sect);
1291
1292
1293 enable_slot_power (ctrl, hp_slot);
1294
1295 set_SOGO(ctrl);
1296
1297
1298 wait_for_ctrl_irq (ctrl);
1299
1300
1301
1302 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1303 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1304 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1305
1306 set_SOGO(ctrl);
1307
1308
1309 wait_for_ctrl_irq (ctrl);
1310
1311 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1312 if (ctrl->speed != adapter_speed)
1313 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1314 rc = WRONG_BUS_FREQUENCY;
1315
1316
1317 disable_slot_power (ctrl, hp_slot);
1318
1319 set_SOGO(ctrl);
1320
1321
1322 wait_for_ctrl_irq (ctrl);
1323
1324 mutex_unlock(&ctrl->crit_sect);
1325
1326 if (rc)
1327 return rc;
1328
1329 mutex_lock(&ctrl->crit_sect);
1330
1331 slot_enable (ctrl, hp_slot);
1332 green_LED_blink (ctrl, hp_slot);
1333
1334 amber_LED_off (ctrl, hp_slot);
1335
1336 set_SOGO(ctrl);
1337
1338
1339 wait_for_ctrl_irq (ctrl);
1340
1341 mutex_unlock(&ctrl->crit_sect);
1342
1343
1344 long_delay(1*HZ);
1345
1346
1347 if (func->status == 0xFF) {
1348
1349 rc = POWER_FAILURE;
1350 func->status = 0;
1351 } else
1352 rc = cpqhp_valid_replace(ctrl, func);
1353
1354 if (!rc) {
1355
1356
1357 rc = cpqhp_configure_board(ctrl, func);
1358
1359
1360
1361
1362
1363
1364
1365
1366 mutex_lock(&ctrl->crit_sect);
1367
1368 amber_LED_on (ctrl, hp_slot);
1369 green_LED_off (ctrl, hp_slot);
1370 slot_disable (ctrl, hp_slot);
1371
1372 set_SOGO(ctrl);
1373
1374
1375 wait_for_ctrl_irq (ctrl);
1376
1377 mutex_unlock(&ctrl->crit_sect);
1378
1379 if (rc)
1380 return rc;
1381 else
1382 return 1;
1383
1384 } else {
1385
1386
1387
1388
1389
1390
1391
1392 mutex_lock(&ctrl->crit_sect);
1393
1394 amber_LED_on (ctrl, hp_slot);
1395 green_LED_off (ctrl, hp_slot);
1396 slot_disable (ctrl, hp_slot);
1397
1398 set_SOGO(ctrl);
1399
1400
1401 wait_for_ctrl_irq (ctrl);
1402
1403 mutex_unlock(&ctrl->crit_sect);
1404 }
1405
1406 }
1407 return rc;
1408
1409}
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420static u32 board_added(struct pci_func *func, struct controller *ctrl)
1421{
1422 u8 hp_slot;
1423 u8 temp_byte;
1424 u8 adapter_speed;
1425 int index;
1426 u32 temp_register = 0xFFFFFFFF;
1427 u32 rc = 0;
1428 struct pci_func *new_slot = NULL;
1429 struct slot *p_slot;
1430 struct resource_lists res_lists;
1431
1432 hp_slot = func->device - ctrl->slot_device_offset;
1433 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1434 __func__, func->device, ctrl->slot_device_offset, hp_slot);
1435
1436 mutex_lock(&ctrl->crit_sect);
1437
1438
1439 enable_slot_power(ctrl, hp_slot);
1440
1441 set_SOGO(ctrl);
1442
1443
1444 wait_for_ctrl_irq (ctrl);
1445
1446
1447
1448
1449 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1450 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1451 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1452
1453 set_SOGO(ctrl);
1454
1455
1456 wait_for_ctrl_irq (ctrl);
1457
1458 adapter_speed = get_adapter_speed(ctrl, hp_slot);
1459 if (ctrl->speed != adapter_speed)
1460 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
1461 rc = WRONG_BUS_FREQUENCY;
1462
1463
1464 disable_slot_power (ctrl, hp_slot);
1465
1466 set_SOGO(ctrl);
1467
1468
1469 wait_for_ctrl_irq(ctrl);
1470
1471 mutex_unlock(&ctrl->crit_sect);
1472
1473 if (rc)
1474 return rc;
1475
1476 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1477
1478
1479
1480 dbg("%s: before down\n", __func__);
1481 mutex_lock(&ctrl->crit_sect);
1482 dbg("%s: after down\n", __func__);
1483
1484 dbg("%s: before slot_enable\n", __func__);
1485 slot_enable (ctrl, hp_slot);
1486
1487 dbg("%s: before green_LED_blink\n", __func__);
1488 green_LED_blink (ctrl, hp_slot);
1489
1490 dbg("%s: before amber_LED_blink\n", __func__);
1491 amber_LED_off (ctrl, hp_slot);
1492
1493 dbg("%s: before set_SOGO\n", __func__);
1494 set_SOGO(ctrl);
1495
1496
1497 dbg("%s: before wait_for_ctrl_irq\n", __func__);
1498 wait_for_ctrl_irq (ctrl);
1499 dbg("%s: after wait_for_ctrl_irq\n", __func__);
1500
1501 dbg("%s: before up\n", __func__);
1502 mutex_unlock(&ctrl->crit_sect);
1503 dbg("%s: after up\n", __func__);
1504
1505
1506 dbg("%s: before long_delay\n", __func__);
1507 long_delay(1*HZ);
1508 dbg("%s: after long_delay\n", __func__);
1509
1510 dbg("%s: func status = %x\n", __func__, func->status);
1511
1512 if (func->status == 0xFF) {
1513
1514 temp_register = 0xFFFFFFFF;
1515 dbg("%s: temp register set to %x by power fault\n", __func__, temp_register);
1516 rc = POWER_FAILURE;
1517 func->status = 0;
1518 } else {
1519
1520 ctrl->pci_bus->number = func->bus;
1521 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1522 dbg("%s: pci_read_config_dword returns %d\n", __func__, rc);
1523 dbg("%s: temp_register is %x\n", __func__, temp_register);
1524
1525 if (rc != 0) {
1526
1527 temp_register = 0xFFFFFFFF;
1528 dbg("%s: temp register set to %x by error\n", __func__, temp_register);
1529 }
1530
1531 rc = NO_ADAPTER_PRESENT;
1532 }
1533
1534
1535 if (temp_register != 0xFFFFFFFF) {
1536 res_lists.io_head = ctrl->io_head;
1537 res_lists.mem_head = ctrl->mem_head;
1538 res_lists.p_mem_head = ctrl->p_mem_head;
1539 res_lists.bus_head = ctrl->bus_head;
1540 res_lists.irqs = NULL;
1541
1542 rc = configure_new_device(ctrl, func, 0, &res_lists);
1543
1544 dbg("%s: back from configure_new_device\n", __func__);
1545 ctrl->io_head = res_lists.io_head;
1546 ctrl->mem_head = res_lists.mem_head;
1547 ctrl->p_mem_head = res_lists.p_mem_head;
1548 ctrl->bus_head = res_lists.bus_head;
1549
1550 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1551 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1552 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1553 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1554
1555 if (rc) {
1556 mutex_lock(&ctrl->crit_sect);
1557
1558 amber_LED_on (ctrl, hp_slot);
1559 green_LED_off (ctrl, hp_slot);
1560 slot_disable (ctrl, hp_slot);
1561
1562 set_SOGO(ctrl);
1563
1564
1565 wait_for_ctrl_irq (ctrl);
1566
1567 mutex_unlock(&ctrl->crit_sect);
1568 return rc;
1569 } else {
1570 cpqhp_save_slot_config(ctrl, func);
1571 }
1572
1573
1574 func->status = 0;
1575 func->switch_save = 0x10;
1576 func->is_a_board = 0x01;
1577
1578
1579
1580 dbg("%s: configure linux pci_dev structure\n", __func__);
1581 index = 0;
1582 do {
1583 new_slot = cpqhp_slot_find(ctrl->bus, func->device, index++);
1584 if (new_slot && !new_slot->pci_dev)
1585 cpqhp_configure_device(ctrl, new_slot);
1586 } while (new_slot);
1587
1588 mutex_lock(&ctrl->crit_sect);
1589
1590 green_LED_on (ctrl, hp_slot);
1591
1592 set_SOGO(ctrl);
1593
1594
1595 wait_for_ctrl_irq (ctrl);
1596
1597 mutex_unlock(&ctrl->crit_sect);
1598 } else {
1599 mutex_lock(&ctrl->crit_sect);
1600
1601 amber_LED_on (ctrl, hp_slot);
1602 green_LED_off (ctrl, hp_slot);
1603 slot_disable (ctrl, hp_slot);
1604
1605 set_SOGO(ctrl);
1606
1607
1608 wait_for_ctrl_irq (ctrl);
1609
1610 mutex_unlock(&ctrl->crit_sect);
1611
1612 return rc;
1613 }
1614 return 0;
1615}
1616
1617
1618
1619
1620
1621
1622
1623
1624static u32 remove_board(struct pci_func * func, u32 replace_flag, struct controller * ctrl)
1625{
1626 int index;
1627 u8 skip = 0;
1628 u8 device;
1629 u8 hp_slot;
1630 u8 temp_byte;
1631 u32 rc;
1632 struct resource_lists res_lists;
1633 struct pci_func *temp_func;
1634
1635 if (cpqhp_unconfigure_device(func))
1636 return 1;
1637
1638 device = func->device;
1639
1640 hp_slot = func->device - ctrl->slot_device_offset;
1641 dbg("In %s, hp_slot = %d\n", __func__, hp_slot);
1642
1643
1644
1645 if (replace_flag || !ctrl->add_support)
1646 rc = cpqhp_save_base_addr_length(ctrl, func);
1647 else if (!func->bus_head && !func->mem_head &&
1648 !func->p_mem_head && !func->io_head) {
1649
1650
1651
1652 index = 0;
1653 temp_func = cpqhp_slot_find(func->bus, func->device, index++);
1654 while (temp_func) {
1655 if (temp_func->bus_head || temp_func->mem_head
1656 || temp_func->p_mem_head || temp_func->io_head) {
1657 skip = 1;
1658 break;
1659 }
1660 temp_func = cpqhp_slot_find(temp_func->bus, temp_func->device, index++);
1661 }
1662
1663 if (!skip)
1664 rc = cpqhp_save_used_resources(ctrl, func);
1665 }
1666
1667 if (func->is_a_board)
1668 func->status = 0x01;
1669 func->configured = 0;
1670
1671 mutex_lock(&ctrl->crit_sect);
1672
1673 green_LED_off (ctrl, hp_slot);
1674 slot_disable (ctrl, hp_slot);
1675
1676 set_SOGO(ctrl);
1677
1678
1679 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1680 temp_byte &= ~(0x01 << hp_slot);
1681 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
1682
1683
1684 wait_for_ctrl_irq (ctrl);
1685
1686 mutex_unlock(&ctrl->crit_sect);
1687
1688 if (!replace_flag && ctrl->add_support) {
1689 while (func) {
1690 res_lists.io_head = ctrl->io_head;
1691 res_lists.mem_head = ctrl->mem_head;
1692 res_lists.p_mem_head = ctrl->p_mem_head;
1693 res_lists.bus_head = ctrl->bus_head;
1694
1695 cpqhp_return_board_resources(func, &res_lists);
1696
1697 ctrl->io_head = res_lists.io_head;
1698 ctrl->mem_head = res_lists.mem_head;
1699 ctrl->p_mem_head = res_lists.p_mem_head;
1700 ctrl->bus_head = res_lists.bus_head;
1701
1702 cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1703 cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1704 cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1705 cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1706
1707 if (is_bridge(func)) {
1708 bridge_slot_remove(func);
1709 } else
1710 slot_remove(func);
1711
1712 func = cpqhp_slot_find(ctrl->bus, device, 0);
1713 }
1714
1715
1716 func = cpqhp_slot_create(ctrl->bus);
1717
1718 if (func == NULL)
1719 return 1;
1720
1721 func->bus = ctrl->bus;
1722 func->device = device;
1723 func->function = 0;
1724 func->configured = 0;
1725 func->switch_save = 0x10;
1726 func->is_a_board = 0;
1727 func->p_task_event = NULL;
1728 }
1729
1730 return 0;
1731}
1732
1733static void pushbutton_helper_thread(unsigned long data)
1734{
1735 pushbutton_pending = data;
1736 wake_up_process(cpqhp_event_thread);
1737}
1738
1739
1740
1741static int event_thread(void* data)
1742{
1743 struct controller *ctrl;
1744
1745 while (1) {
1746 dbg("!!!!event_thread sleeping\n");
1747 set_current_state(TASK_INTERRUPTIBLE);
1748 schedule();
1749
1750 if (kthread_should_stop())
1751 break;
1752
1753 if (pushbutton_pending)
1754 cpqhp_pushbutton_thread(pushbutton_pending);
1755 else
1756 for (ctrl = cpqhp_ctrl_list; ctrl; ctrl=ctrl->next)
1757 interrupt_event_handler(ctrl);
1758 }
1759 dbg("event_thread signals exit\n");
1760 return 0;
1761}
1762
1763int cpqhp_event_start_thread(void)
1764{
1765 cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
1766 if (IS_ERR(cpqhp_event_thread)) {
1767 err ("Can't start up our event thread\n");
1768 return PTR_ERR(cpqhp_event_thread);
1769 }
1770
1771 return 0;
1772}
1773
1774
1775void cpqhp_event_stop_thread(void)
1776{
1777 kthread_stop(cpqhp_event_thread);
1778}
1779
1780
1781static int update_slot_info(struct controller *ctrl, struct slot *slot)
1782{
1783 struct hotplug_slot_info *info;
1784 int result;
1785
1786 info = kmalloc(sizeof(*info), GFP_KERNEL);
1787 if (!info)
1788 return -ENOMEM;
1789
1790 info->power_status = get_slot_enabled(ctrl, slot);
1791 info->attention_status = cpq_get_attention_status(ctrl, slot);
1792 info->latch_status = cpq_get_latch_status(ctrl, slot);
1793 info->adapter_status = get_presence_status(ctrl, slot);
1794 result = pci_hp_change_slot_info(slot->hotplug_slot, info);
1795 kfree (info);
1796 return result;
1797}
1798
1799static void interrupt_event_handler(struct controller *ctrl)
1800{
1801 int loop = 0;
1802 int change = 1;
1803 struct pci_func *func;
1804 u8 hp_slot;
1805 struct slot *p_slot;
1806
1807 while (change) {
1808 change = 0;
1809
1810 for (loop = 0; loop < 10; loop++) {
1811
1812 if (ctrl->event_queue[loop].event_type != 0) {
1813 hp_slot = ctrl->event_queue[loop].hp_slot;
1814
1815 func = cpqhp_slot_find(ctrl->bus, (hp_slot + ctrl->slot_device_offset), 0);
1816 if (!func)
1817 return;
1818
1819 p_slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1820 if (!p_slot)
1821 return;
1822
1823 dbg("hp_slot %d, func %p, p_slot %p\n",
1824 hp_slot, func, p_slot);
1825
1826 if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1827 dbg("button pressed\n");
1828 } else if (ctrl->event_queue[loop].event_type ==
1829 INT_BUTTON_CANCEL) {
1830 dbg("button cancel\n");
1831 del_timer(&p_slot->task_event);
1832
1833 mutex_lock(&ctrl->crit_sect);
1834
1835 if (p_slot->state == BLINKINGOFF_STATE) {
1836
1837 dbg("turn on green LED\n");
1838 green_LED_on (ctrl, hp_slot);
1839 } else if (p_slot->state == BLINKINGON_STATE) {
1840
1841 dbg("turn off green LED\n");
1842 green_LED_off (ctrl, hp_slot);
1843 }
1844
1845 info(msg_button_cancel, p_slot->number);
1846
1847 p_slot->state = STATIC_STATE;
1848
1849 amber_LED_off (ctrl, hp_slot);
1850
1851 set_SOGO(ctrl);
1852
1853
1854 wait_for_ctrl_irq (ctrl);
1855
1856 mutex_unlock(&ctrl->crit_sect);
1857 }
1858
1859 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_RELEASE) {
1860 dbg("button release\n");
1861
1862 if (is_slot_enabled (ctrl, hp_slot)) {
1863 dbg("slot is on\n");
1864 p_slot->state = BLINKINGOFF_STATE;
1865 info(msg_button_off, p_slot->number);
1866 } else {
1867 dbg("slot is off\n");
1868 p_slot->state = BLINKINGON_STATE;
1869 info(msg_button_on, p_slot->number);
1870 }
1871 mutex_lock(&ctrl->crit_sect);
1872
1873 dbg("blink green LED and turn off amber\n");
1874
1875 amber_LED_off (ctrl, hp_slot);
1876 green_LED_blink (ctrl, hp_slot);
1877
1878 set_SOGO(ctrl);
1879
1880
1881 wait_for_ctrl_irq (ctrl);
1882
1883 mutex_unlock(&ctrl->crit_sect);
1884 init_timer(&p_slot->task_event);
1885 p_slot->hp_slot = hp_slot;
1886 p_slot->ctrl = ctrl;
1887
1888 p_slot->task_event.expires = jiffies + 5 * HZ;
1889 p_slot->task_event.function = pushbutton_helper_thread;
1890 p_slot->task_event.data = (u32) p_slot;
1891
1892 dbg("add_timer p_slot = %p\n", p_slot);
1893 add_timer(&p_slot->task_event);
1894 }
1895
1896 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1897 dbg("power fault\n");
1898 } else {
1899
1900 if (p_slot)
1901 update_slot_info(ctrl, p_slot);
1902 }
1903
1904 ctrl->event_queue[loop].event_type = 0;
1905
1906 change = 1;
1907 }
1908 }
1909 }
1910
1911 return;
1912}
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922void cpqhp_pushbutton_thread(unsigned long slot)
1923{
1924 u8 hp_slot;
1925 u8 device;
1926 struct pci_func *func;
1927 struct slot *p_slot = (struct slot *) slot;
1928 struct controller *ctrl = (struct controller *) p_slot->ctrl;
1929
1930 pushbutton_pending = 0;
1931 hp_slot = p_slot->hp_slot;
1932
1933 device = p_slot->device;
1934
1935 if (is_slot_enabled(ctrl, hp_slot)) {
1936 p_slot->state = POWEROFF_STATE;
1937
1938 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1939 dbg("In power_down_board, func = %p, ctrl = %p\n", func, ctrl);
1940 if (!func) {
1941 dbg("Error! func NULL in %s\n", __func__);
1942 return ;
1943 }
1944
1945 if (cpqhp_process_SS(ctrl, func) != 0) {
1946 amber_LED_on(ctrl, hp_slot);
1947 green_LED_on(ctrl, hp_slot);
1948
1949 set_SOGO(ctrl);
1950
1951
1952 wait_for_ctrl_irq(ctrl);
1953 }
1954
1955 p_slot->state = STATIC_STATE;
1956 } else {
1957 p_slot->state = POWERON_STATE;
1958
1959
1960 func = cpqhp_slot_find(p_slot->bus, p_slot->device, 0);
1961 dbg("In add_board, func = %p, ctrl = %p\n", func, ctrl);
1962 if (!func) {
1963 dbg("Error! func NULL in %s\n", __func__);
1964 return ;
1965 }
1966
1967 if (ctrl != NULL) {
1968 if (cpqhp_process_SI(ctrl, func) != 0) {
1969 amber_LED_on(ctrl, hp_slot);
1970 green_LED_off(ctrl, hp_slot);
1971
1972 set_SOGO(ctrl);
1973
1974
1975 wait_for_ctrl_irq (ctrl);
1976 }
1977 }
1978
1979 p_slot->state = STATIC_STATE;
1980 }
1981
1982 return;
1983}
1984
1985
1986int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func)
1987{
1988 u8 device, hp_slot;
1989 u16 temp_word;
1990 u32 tempdword;
1991 int rc;
1992 struct slot* p_slot;
1993 int physical_slot = 0;
1994
1995 tempdword = 0;
1996
1997 device = func->device;
1998 hp_slot = device - ctrl->slot_device_offset;
1999 p_slot = cpqhp_find_slot(ctrl, device);
2000 if (p_slot)
2001 physical_slot = p_slot->number;
2002
2003
2004 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
2005
2006 if (tempdword & (0x01 << hp_slot)) {
2007 return 1;
2008 }
2009
2010 if (func->is_a_board) {
2011 rc = board_replaced(func, ctrl);
2012 } else {
2013
2014 slot_remove(func);
2015
2016 func = cpqhp_slot_create(ctrl->bus);
2017 if (func == NULL)
2018 return 1;
2019
2020 func->bus = ctrl->bus;
2021 func->device = device;
2022 func->function = 0;
2023 func->configured = 0;
2024 func->is_a_board = 1;
2025
2026
2027 temp_word = ctrl->ctrl_int_comp >> 16;
2028 func->presence_save = (temp_word >> hp_slot) & 0x01;
2029 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
2030
2031 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2032 func->switch_save = 0;
2033 } else {
2034 func->switch_save = 0x10;
2035 }
2036
2037 rc = board_added(func, ctrl);
2038 if (rc) {
2039 if (is_bridge(func)) {
2040 bridge_slot_remove(func);
2041 } else
2042 slot_remove(func);
2043
2044
2045 func = cpqhp_slot_create(ctrl->bus);
2046
2047 if (func == NULL)
2048 return 1;
2049
2050 func->bus = ctrl->bus;
2051 func->device = device;
2052 func->function = 0;
2053 func->configured = 0;
2054 func->is_a_board = 0;
2055
2056
2057 temp_word = ctrl->ctrl_int_comp >> 16;
2058 func->presence_save = (temp_word >> hp_slot) & 0x01;
2059 func->presence_save |=
2060 (temp_word >> (hp_slot + 7)) & 0x02;
2061
2062 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
2063 func->switch_save = 0;
2064 } else {
2065 func->switch_save = 0x10;
2066 }
2067 }
2068 }
2069
2070 if (rc) {
2071 dbg("%s: rc = %d\n", __func__, rc);
2072 }
2073
2074 if (p_slot)
2075 update_slot_info(ctrl, p_slot);
2076
2077 return rc;
2078}
2079
2080
2081int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
2082{
2083 u8 device, class_code, header_type, BCR;
2084 u8 index = 0;
2085 u8 replace_flag;
2086 u32 rc = 0;
2087 unsigned int devfn;
2088 struct slot* p_slot;
2089 struct pci_bus *pci_bus = ctrl->pci_bus;
2090 int physical_slot=0;
2091
2092 device = func->device;
2093 func = cpqhp_slot_find(ctrl->bus, device, index++);
2094 p_slot = cpqhp_find_slot(ctrl, device);
2095 if (p_slot) {
2096 physical_slot = p_slot->number;
2097 }
2098
2099
2100 while (func && !rc) {
2101 pci_bus->number = func->bus;
2102 devfn = PCI_DEVFN(func->device, func->function);
2103
2104
2105 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2106 if (rc)
2107 return rc;
2108
2109 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2110
2111 rc = REMOVE_NOT_SUPPORTED;
2112 } else {
2113
2114 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2115 if (rc)
2116 return rc;
2117
2118
2119 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2120 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2121 if (rc)
2122 return rc;
2123
2124
2125
2126 if (BCR & PCI_BRIDGE_CTL_VGA)
2127 rc = REMOVE_NOT_SUPPORTED;
2128 }
2129 }
2130
2131 func = cpqhp_slot_find(ctrl->bus, device, index++);
2132 }
2133
2134 func = cpqhp_slot_find(ctrl->bus, device, 0);
2135 if ((func != NULL) && !rc) {
2136
2137 replace_flag = !(ctrl->add_support);
2138 rc = remove_board(func, replace_flag, ctrl);
2139 } else if (!rc) {
2140 rc = 1;
2141 }
2142
2143 if (p_slot)
2144 update_slot_info(ctrl, p_slot);
2145
2146 return rc;
2147}
2148
2149
2150
2151
2152
2153
2154
2155
2156static void switch_leds(struct controller *ctrl, const int num_of_slots,
2157 u32 *work_LED, const int direction)
2158{
2159 int loop;
2160
2161 for (loop = 0; loop < num_of_slots; loop++) {
2162 if (direction)
2163 *work_LED = *work_LED >> 1;
2164 else
2165 *work_LED = *work_LED << 1;
2166 writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
2167
2168 set_SOGO(ctrl);
2169
2170
2171 wait_for_ctrl_irq(ctrl);
2172
2173
2174 long_delay((2*HZ)/10);
2175 }
2176}
2177
2178
2179
2180
2181
2182
2183
2184
2185int cpqhp_hardware_test(struct controller *ctrl, int test_num)
2186{
2187 u32 save_LED;
2188 u32 work_LED;
2189 int loop;
2190 int num_of_slots;
2191
2192 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0f;
2193
2194 switch (test_num) {
2195 case 1:
2196
2197
2198
2199
2200 save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
2201 work_LED = 0x01010101;
2202 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2203 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2204 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2205 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2206
2207 work_LED = 0x01010000;
2208 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2209 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2210 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2211 work_LED = 0x00000101;
2212 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2213 switch_leds(ctrl, num_of_slots, &work_LED, 0);
2214 switch_leds(ctrl, num_of_slots, &work_LED, 1);
2215
2216 work_LED = 0x01010000;
2217 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2218 for (loop = 0; loop < num_of_slots; loop++) {
2219 set_SOGO(ctrl);
2220
2221
2222 wait_for_ctrl_irq (ctrl);
2223
2224
2225 long_delay((3*HZ)/10);
2226 work_LED = work_LED >> 16;
2227 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2228
2229 set_SOGO(ctrl);
2230
2231
2232 wait_for_ctrl_irq (ctrl);
2233
2234
2235 long_delay((3*HZ)/10);
2236 work_LED = work_LED << 16;
2237 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2238 work_LED = work_LED << 1;
2239 writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
2240 }
2241
2242
2243 writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
2244
2245 set_SOGO(ctrl);
2246
2247
2248 wait_for_ctrl_irq (ctrl);
2249 break;
2250 case 2:
2251
2252 break;
2253 case 3:
2254
2255 break;
2256 }
2257 return 0;
2258}
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
2271 u8 behind_bridge, struct resource_lists * resources)
2272{
2273 u8 temp_byte, function, max_functions, stop_it;
2274 int rc;
2275 u32 ID;
2276 struct pci_func *new_slot;
2277 int index;
2278
2279 new_slot = func;
2280
2281 dbg("%s\n", __func__);
2282
2283 ctrl->pci_bus->number = func->bus;
2284 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2285 if (rc) {
2286 dbg("%s: rc = %d\n", __func__, rc);
2287 return rc;
2288 }
2289
2290 if (temp_byte & 0x80)
2291 max_functions = 8;
2292 else
2293 max_functions = 1;
2294
2295 function = 0;
2296
2297 do {
2298 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources);
2299
2300 if (rc) {
2301 dbg("configure_new_function failed %d\n",rc);
2302 index = 0;
2303
2304 while (new_slot) {
2305 new_slot = cpqhp_slot_find(new_slot->bus, new_slot->device, index++);
2306
2307 if (new_slot)
2308 cpqhp_return_board_resources(new_slot, resources);
2309 }
2310
2311 return rc;
2312 }
2313
2314 function++;
2315
2316 stop_it = 0;
2317
2318
2319
2320
2321 while ((function < max_functions) && (!stop_it)) {
2322 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2323
2324 if (ID == 0xFFFFFFFF) {
2325 function++;
2326 } else {
2327
2328 new_slot = cpqhp_slot_create(func->bus);
2329
2330 if (new_slot == NULL)
2331 return 1;
2332
2333 new_slot->bus = func->bus;
2334 new_slot->device = func->device;
2335 new_slot->function = function;
2336 new_slot->is_a_board = 1;
2337 new_slot->status = 0;
2338
2339 stop_it++;
2340 }
2341 }
2342
2343 } while (function < max_functions);
2344 dbg("returning from configure_new_device\n");
2345
2346 return 0;
2347}
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366static int configure_new_function(struct controller *ctrl, struct pci_func *func,
2367 u8 behind_bridge,
2368 struct resource_lists *resources)
2369{
2370 int cloop;
2371 u8 IRQ = 0;
2372 u8 temp_byte;
2373 u8 device;
2374 u8 class_code;
2375 u16 command;
2376 u16 temp_word;
2377 u32 temp_dword;
2378 u32 rc;
2379 u32 temp_register;
2380 u32 base;
2381 u32 ID;
2382 unsigned int devfn;
2383 struct pci_resource *mem_node;
2384 struct pci_resource *p_mem_node;
2385 struct pci_resource *io_node;
2386 struct pci_resource *bus_node;
2387 struct pci_resource *hold_mem_node;
2388 struct pci_resource *hold_p_mem_node;
2389 struct pci_resource *hold_IO_node;
2390 struct pci_resource *hold_bus_node;
2391 struct irq_mapping irqs;
2392 struct pci_func *new_slot;
2393 struct pci_bus *pci_bus;
2394 struct resource_lists temp_resources;
2395
2396 pci_bus = ctrl->pci_bus;
2397 pci_bus->number = func->bus;
2398 devfn = PCI_DEVFN(func->device, func->function);
2399
2400
2401 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2402 if (rc)
2403 return rc;
2404
2405 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2406
2407 dbg("set Primary bus = %d\n", func->bus);
2408 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2409 if (rc)
2410 return rc;
2411
2412
2413 dbg("find ranges of buses to use\n");
2414 bus_node = get_max_resource(&(resources->bus_head), 1);
2415
2416
2417 if (!bus_node)
2418 return -ENOMEM;
2419
2420
2421 temp_byte = bus_node->base;
2422 dbg("set Secondary bus = %d\n", bus_node->base);
2423 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2424 if (rc)
2425 return rc;
2426
2427
2428 temp_byte = bus_node->base + bus_node->length - 1;
2429 dbg("set subordinate bus = %d\n", bus_node->base + bus_node->length - 1);
2430 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2431 if (rc)
2432 return rc;
2433
2434
2435 temp_byte = 0x40;
2436 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2437 if (rc)
2438 return rc;
2439 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2440 if (rc)
2441 return rc;
2442
2443
2444 temp_byte = 0x08;
2445 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2446 if (rc)
2447 return rc;
2448
2449
2450 io_node = get_max_resource(&(resources->io_head), 0x1000);
2451 if (!io_node)
2452 return -ENOMEM;
2453 mem_node = get_max_resource(&(resources->mem_head), 0x100000);
2454 if (!mem_node)
2455 return -ENOMEM;
2456 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000);
2457 if (!p_mem_node)
2458 return -ENOMEM;
2459 dbg("Setup the IO, memory, and prefetchable windows\n");
2460 dbg("io_node\n");
2461 dbg("(base, len, next) (%x, %x, %p)\n", io_node->base,
2462 io_node->length, io_node->next);
2463 dbg("mem_node\n");
2464 dbg("(base, len, next) (%x, %x, %p)\n", mem_node->base,
2465 mem_node->length, mem_node->next);
2466 dbg("p_mem_node\n");
2467 dbg("(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2468 p_mem_node->length, p_mem_node->next);
2469
2470
2471 if (!resources->irqs) {
2472 irqs.barber_pole = 0;
2473 irqs.interrupt[0] = 0;
2474 irqs.interrupt[1] = 0;
2475 irqs.interrupt[2] = 0;
2476 irqs.interrupt[3] = 0;
2477 irqs.valid_INT = 0;
2478 } else {
2479 irqs.barber_pole = resources->irqs->barber_pole;
2480 irqs.interrupt[0] = resources->irqs->interrupt[0];
2481 irqs.interrupt[1] = resources->irqs->interrupt[1];
2482 irqs.interrupt[2] = resources->irqs->interrupt[2];
2483 irqs.interrupt[3] = resources->irqs->interrupt[3];
2484 irqs.valid_INT = resources->irqs->valid_INT;
2485 }
2486
2487
2488
2489 temp_resources.bus_head = bus_node;
2490 temp_resources.io_head = io_node;
2491 temp_resources.mem_head = mem_node;
2492 temp_resources.p_mem_head = p_mem_node;
2493 temp_resources.irqs = &irqs;
2494
2495
2496
2497
2498 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2499 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2500 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2501 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2502
2503 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2504 kfree(hold_bus_node);
2505 kfree(hold_IO_node);
2506 kfree(hold_mem_node);
2507 kfree(hold_p_mem_node);
2508
2509 return 1;
2510 }
2511
2512 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2513
2514 bus_node->base += 1;
2515 bus_node->length -= 1;
2516 bus_node->next = NULL;
2517
2518
2519
2520 if (io_node) {
2521 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2522 io_node->next = NULL;
2523
2524
2525 temp_byte = io_node->base >> 8;
2526 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2527
2528 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2529 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2530 } else {
2531 kfree(hold_IO_node);
2532 hold_IO_node = NULL;
2533 }
2534
2535
2536
2537
2538 if (mem_node) {
2539 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2540 mem_node->next = NULL;
2541
2542
2543 temp_word = mem_node->base >> 16;
2544 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2545
2546 temp_word = (mem_node->base + mem_node->length - 1) >> 16;
2547 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2548 } else {
2549 temp_word = 0xFFFF;
2550 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2551
2552 temp_word = 0x0000;
2553 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2554
2555 kfree(hold_mem_node);
2556 hold_mem_node = NULL;
2557 }
2558
2559 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2560 p_mem_node->next = NULL;
2561
2562
2563 temp_word = p_mem_node->base >> 16;
2564 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2565
2566 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2567 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2568
2569
2570
2571 irqs.barber_pole--;
2572
2573 rc = 0;
2574
2575
2576 for (device = 0; (device <= 0x1F) && !rc; device++) {
2577 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2578
2579 ID = 0xFFFFFFFF;
2580 pci_bus->number = hold_bus_node->base;
2581 pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), 0x00, &ID);
2582 pci_bus->number = func->bus;
2583
2584 if (ID != 0xFFFFFFFF) {
2585
2586 new_slot = cpqhp_slot_create(hold_bus_node->base);
2587
2588 if (new_slot == NULL) {
2589 rc = -ENOMEM;
2590 continue;
2591 }
2592
2593 new_slot->bus = hold_bus_node->base;
2594 new_slot->device = device;
2595 new_slot->function = 0;
2596 new_slot->is_a_board = 1;
2597 new_slot->status = 0;
2598
2599 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources);
2600 dbg("configure_new_device rc=0x%x\n",rc);
2601 }
2602 }
2603
2604 if (rc)
2605 goto free_and_out;
2606
2607 if (resources->irqs) {
2608 resources->irqs->interrupt[0] = irqs.interrupt[0];
2609 resources->irqs->interrupt[1] = irqs.interrupt[1];
2610 resources->irqs->interrupt[2] = irqs.interrupt[2];
2611 resources->irqs->interrupt[3] = irqs.interrupt[3];
2612 resources->irqs->valid_INT = irqs.valid_INT;
2613 } else if (!behind_bridge) {
2614
2615 for (cloop = 0; cloop < 4; cloop++) {
2616 if (irqs.valid_INT & (0x01 << cloop)) {
2617 rc = cpqhp_set_irq(func->bus, func->device,
2618 cloop + 1, irqs.interrupt[cloop]);
2619 if (rc)
2620 goto free_and_out;
2621 }
2622 }
2623 }
2624
2625
2626
2627 if (hold_bus_node && bus_node && temp_resources.bus_head) {
2628 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2629
2630 hold_bus_node->next = func->bus_head;
2631 func->bus_head = hold_bus_node;
2632
2633 temp_byte = temp_resources.bus_head->base - 1;
2634
2635
2636 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2637
2638 if (temp_resources.bus_head->length == 0) {
2639 kfree(temp_resources.bus_head);
2640 temp_resources.bus_head = NULL;
2641 } else {
2642 return_resource(&(resources->bus_head), temp_resources.bus_head);
2643 }
2644 }
2645
2646
2647
2648 if (hold_IO_node && temp_resources.io_head) {
2649 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2650 &hold_IO_node, 0x1000);
2651
2652
2653 if (io_node) {
2654 hold_IO_node->base = io_node->base + io_node->length;
2655
2656 temp_byte = (hold_IO_node->base) >> 8;
2657 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2658
2659 return_resource(&(resources->io_head), io_node);
2660 }
2661
2662 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2663
2664
2665 if (io_node) {
2666
2667
2668 hold_IO_node->length = io_node->base - hold_IO_node->base;
2669
2670
2671 if (hold_IO_node->length) {
2672 hold_IO_node->next = func->io_head;
2673 func->io_head = hold_IO_node;
2674
2675 temp_byte = (io_node->base - 1) >> 8;
2676 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2677
2678 return_resource(&(resources->io_head), io_node);
2679 } else {
2680
2681 temp_word = 0x0000;
2682 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_LIMIT, temp_word);
2683
2684 return_resource(&(resources->io_head), io_node);
2685 kfree(hold_IO_node);
2686 }
2687 } else {
2688
2689 hold_IO_node->next = func->io_head;
2690 func->io_head = hold_IO_node;
2691 }
2692 } else if (hold_IO_node) {
2693
2694 hold_IO_node->next = func->io_head;
2695 func->io_head = hold_IO_node;
2696 }
2697
2698
2699 if (hold_mem_node && temp_resources.mem_head) {
2700 mem_node = do_pre_bridge_resource_split(&(temp_resources. mem_head),
2701 &hold_mem_node, 0x100000);
2702
2703
2704 if (mem_node) {
2705 hold_mem_node->base = mem_node->base + mem_node->length;
2706
2707 temp_word = (hold_mem_node->base) >> 16;
2708 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2709
2710 return_resource(&(resources->mem_head), mem_node);
2711 }
2712
2713 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000);
2714
2715
2716 if (mem_node) {
2717
2718
2719 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2720
2721 if (hold_mem_node->length) {
2722 hold_mem_node->next = func->mem_head;
2723 func->mem_head = hold_mem_node;
2724
2725
2726 temp_word = (mem_node->base - 1) >> 16;
2727 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2728
2729
2730 return_resource(&(resources->mem_head), mem_node);
2731 } else {
2732
2733 temp_word = 0x0000;
2734 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2735
2736 return_resource(&(resources->mem_head), mem_node);
2737 kfree(hold_mem_node);
2738 }
2739 } else {
2740
2741 hold_mem_node->next = func->mem_head;
2742 func->mem_head = hold_mem_node;
2743 }
2744 } else if (hold_mem_node) {
2745
2746 hold_mem_node->next = func->mem_head;
2747 func->mem_head = hold_mem_node;
2748 }
2749
2750
2751 if (hold_p_mem_node && temp_resources.p_mem_head) {
2752 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2753 &hold_p_mem_node, 0x100000);
2754
2755
2756 if (p_mem_node) {
2757 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2758
2759 temp_word = (hold_p_mem_node->base) >> 16;
2760 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2761
2762 return_resource(&(resources->p_mem_head), p_mem_node);
2763 }
2764
2765 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000);
2766
2767
2768 if (p_mem_node) {
2769
2770
2771 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2772
2773
2774 if (hold_p_mem_node->length) {
2775 hold_p_mem_node->next = func->p_mem_head;
2776 func->p_mem_head = hold_p_mem_node;
2777
2778 temp_word = (p_mem_node->base - 1) >> 16;
2779 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2780
2781 return_resource(&(resources->p_mem_head), p_mem_node);
2782 } else {
2783
2784 temp_word = 0x0000;
2785 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2786
2787 return_resource(&(resources->p_mem_head), p_mem_node);
2788 kfree(hold_p_mem_node);
2789 }
2790 } else {
2791
2792 hold_p_mem_node->next = func->p_mem_head;
2793 func->p_mem_head = hold_p_mem_node;
2794 }
2795 } else if (hold_p_mem_node) {
2796
2797 hold_p_mem_node->next = func->p_mem_head;
2798 func->p_mem_head = hold_p_mem_node;
2799 }
2800
2801
2802
2803
2804
2805 command = 0x0157;
2806
2807
2808
2809
2810
2811 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_COMMAND, command);
2812
2813
2814 command = 0x07;
2815
2816
2817 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
2818 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2819
2820 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2821
2822 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2823
2824 return DEVICE_TYPE_NOT_SUPPORTED;
2825 }
2826
2827 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
2828 temp_register = 0xFFFFFFFF;
2829
2830 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop);
2831 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2832
2833 rc = pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp_register);
2834 dbg("CND: base = 0x%x\n", temp_register);
2835
2836 if (temp_register) {
2837 if ((temp_register & 0x03L) == 0x01) {
2838
2839
2840
2841 base = temp_register & 0xFFFFFFFC;
2842 base = ~base + 1;
2843
2844 dbg("CND: length = 0x%x\n", base);
2845 io_node = get_io_resource(&(resources->io_head), base);
2846 dbg("Got io_node start = %8.8x, length = %8.8x next (%p)\n",
2847 io_node->base, io_node->length, io_node->next);
2848 dbg("func (%p) io_head (%p)\n", func, func->io_head);
2849
2850
2851 if (io_node) {
2852 base = io_node->base;
2853
2854 io_node->next = func->io_head;
2855 func->io_head = io_node;
2856 } else
2857 return -ENOMEM;
2858 } else if ((temp_register & 0x0BL) == 0x08) {
2859
2860 base = temp_register & 0xFFFFFFF0;
2861 base = ~base + 1;
2862
2863 dbg("CND: length = 0x%x\n", base);
2864 p_mem_node = get_resource(&(resources->p_mem_head), base);
2865
2866
2867 if (p_mem_node) {
2868 base = p_mem_node->base;
2869
2870 p_mem_node->next = func->p_mem_head;
2871 func->p_mem_head = p_mem_node;
2872 } else
2873 return -ENOMEM;
2874 } else if ((temp_register & 0x0BL) == 0x00) {
2875
2876 base = temp_register & 0xFFFFFFF0;
2877 base = ~base + 1;
2878
2879 dbg("CND: length = 0x%x\n", base);
2880 mem_node = get_resource(&(resources->mem_head), base);
2881
2882
2883 if (mem_node) {
2884 base = mem_node->base;
2885
2886 mem_node->next = func->mem_head;
2887 func->mem_head = mem_node;
2888 } else
2889 return -ENOMEM;
2890 } else if ((temp_register & 0x0BL) == 0x04) {
2891
2892 base = temp_register & 0xFFFFFFF0;
2893 base = ~base + 1;
2894
2895 dbg("CND: length = 0x%x\n", base);
2896 mem_node = get_resource(&(resources->mem_head), base);
2897
2898
2899 if (mem_node) {
2900 base = mem_node->base;
2901
2902 mem_node->next = func->mem_head;
2903 func->mem_head = mem_node;
2904 } else
2905 return -ENOMEM;
2906 } else if ((temp_register & 0x0BL) == 0x06) {
2907
2908 return 1;
2909 } else {
2910
2911 return NOT_ENOUGH_RESOURCES;
2912 }
2913
2914 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2915
2916
2917 if ((temp_register & 0x07L) == 0x04) {
2918 cloop += 4;
2919
2920
2921
2922
2923
2924 base = 0;
2925 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2926 }
2927 }
2928 }
2929 if (cpqhp_legacy_mode) {
2930
2931 rc = pci_bus_read_config_byte (pci_bus, devfn,
2932 PCI_INTERRUPT_PIN, &temp_byte);
2933
2934
2935
2936
2937 if (temp_byte && resources->irqs &&
2938 (resources->irqs->valid_INT &
2939 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2940
2941 IRQ = resources->irqs->interrupt[(temp_byte +
2942 resources->irqs->barber_pole - 1) & 0x03];
2943 } else {
2944
2945 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2946
2947 if (class_code == PCI_BASE_CLASS_STORAGE)
2948 IRQ = cpqhp_disk_irq;
2949 else
2950 IRQ = cpqhp_nic_irq;
2951 }
2952
2953
2954 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2955 }
2956
2957 if (!behind_bridge) {
2958 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2959 if (rc)
2960 return 1;
2961 } else {
2962
2963
2964 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2965 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2966 }
2967
2968
2969 temp_byte = 0x40;
2970 rc = pci_bus_write_config_byte(pci_bus, devfn,
2971 PCI_LATENCY_TIMER, temp_byte);
2972
2973
2974 temp_byte = 0x08;
2975 rc = pci_bus_write_config_byte(pci_bus, devfn,
2976 PCI_CACHE_LINE_SIZE, temp_byte);
2977
2978
2979 temp_dword = 0x00L;
2980 rc = pci_bus_write_config_word(pci_bus, devfn,
2981 PCI_ROM_ADDRESS, temp_dword);
2982
2983
2984 temp_word = 0x0157;
2985
2986
2987
2988
2989
2990 rc = pci_bus_write_config_word (pci_bus, devfn,
2991 PCI_COMMAND, temp_word);
2992 } else {
2993
2994 return DEVICE_TYPE_NOT_SUPPORTED;
2995 }
2996
2997 func->configured = 1;
2998
2999 return 0;
3000free_and_out:
3001 cpqhp_destroy_resource_list (&temp_resources);
3002
3003 return_resource(&(resources-> bus_head), hold_bus_node);
3004 return_resource(&(resources-> io_head), hold_IO_node);
3005 return_resource(&(resources-> mem_head), hold_mem_node);
3006 return_resource(&(resources-> p_mem_head), hold_p_mem_node);
3007 return rc;
3008}
3009