LXR linux/drivers/pcmcia/au1000

   1/*
   2 * Alchemy Semi Au1000 pcmcia driver include file
   3 *
   4 * Copyright 2001 MontaVista Software Inc.
   5 * Author: MontaVista Software, Inc.
   6 *              ppopov@mvista.com or source@mvista.com
   7 *
   8 *  This program is free software; you can distribute it and/or modify it
   9 *  under the terms of the GNU General Public License (Version 2) as
  10 *  published by the Free Software Foundation.
  11 *
  12 *  This program is distributed in the hope it will be useful, but WITHOUT
  13 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 *  for more details.
  16 *
  17 *  You should have received a copy of the GNU General Public License along
  18 *  with this program; if not, write to the Free Software Foundation, Inc.,
  19 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  20 */
  21#ifndef __ASM_AU1000_PCMCIA_H
  22#define __ASM_AU1000_PCMCIA_H
  23
  24/* include the world */
  25
  26#include <pcmcia/cs_types.h>
  27#include <pcmcia/cs.h>
  28#include <pcmcia/ss.h>
  29#include <pcmcia/cistpl.h>
  30#include "cs_internal.h"
  31
  32#define AU1000_PCMCIA_POLL_PERIOD    (2*HZ)
  33#define AU1000_PCMCIA_IO_SPEED       (255)
  34#define AU1000_PCMCIA_MEM_SPEED      (300)
  35
  36#define AU1X_SOCK0_IO        0xF00000000ULL
  37#define AU1X_SOCK0_PHYS_ATTR 0xF40000000ULL
  38#define AU1X_SOCK0_PHYS_MEM  0xF80000000ULL
  39/* pseudo 32 bit phys addresses, which get fixed up to the
  40 * real 36 bit address in fixup_bigphys_addr() */
  41#define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
  42#define AU1X_SOCK0_PSEUDO_PHYS_MEM  0xF8000000
  43
  44/* pcmcia socket 1 needs external glue logic so the memory map
  45 * differs from board to board.
  46 */
  47#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || \
  48    defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || \
  49    defined(CONFIG_MIPS_PB1200)
  50#define AU1X_SOCK1_IO        0xF08000000ULL
  51#define AU1X_SOCK1_PHYS_ATTR 0xF48000000ULL
  52#define AU1X_SOCK1_PHYS_MEM  0xF88000000ULL
  53#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
  54#define AU1X_SOCK1_PSEUDO_PHYS_MEM  0xF8800000
  55#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \
  56      defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || \
  57      defined(CONFIG_MIPS_DB1200)
  58#define AU1X_SOCK1_IO        0xF04000000ULL
  59#define AU1X_SOCK1_PHYS_ATTR 0xF44000000ULL
  60#define AU1X_SOCK1_PHYS_MEM  0xF84000000ULL
  61#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
  62#define AU1X_SOCK1_PSEUDO_PHYS_MEM  0xF8400000
  63#endif
  64
  65struct pcmcia_state {
  66  unsigned detect: 1,
  67            ready: 1,
  68           wrprot: 1,
  69             bvd1: 1,
  70             bvd2: 1,
  71            vs_3v: 1,
  72            vs_Xv: 1;
  73};
  74
  75struct pcmcia_configure {
  76  unsigned sock: 8,
  77            vcc: 8,
  78            vpp: 8,
  79         output: 1,
  80        speaker: 1,
  81          reset: 1;
  82};
  83
  84struct pcmcia_irqs {
  85        int sock;
  86        int irq;
  87        const char *str;
  88};
  89
  90
  91struct au1000_pcmcia_socket {
  92        struct pcmcia_socket socket;
  93
  94        /*
  95         * Info from low level handler
  96         */
  97        struct device           *dev;
  98        unsigned int            nr;
  99        unsigned int            irq;
 100
 101        /*
 102         * Core PCMCIA state
 103         */
 104        struct pcmcia_low_level *ops;
 105
 106        unsigned int            status;
 107        socket_state_t          cs_state;
 108
 109        unsigned short          spd_io[MAX_IO_WIN];
 110        unsigned short          spd_mem[MAX_WIN];
 111        unsigned short          spd_attr[MAX_WIN];
 112
 113        struct resource         res_skt;
 114        struct resource         res_io;
 115        struct resource         res_mem;
 116        struct resource         res_attr;
 117
 118        void *                  virt_io;
 119        unsigned int            phys_io;
 120        unsigned int            phys_attr;
 121        unsigned int            phys_mem;
 122        unsigned short          speed_io, speed_attr, speed_mem;
 123
 124        unsigned int            irq_state;
 125
 126        struct timer_list       poll_timer;
 127};
 128
 129struct pcmcia_low_level {
 130        struct module *owner;
 131
 132        int (*hw_init)(struct au1000_pcmcia_socket *);
 133        void (*hw_shutdown)(struct au1000_pcmcia_socket *);
 134
 135        void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *);
 136        int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *);
 137
 138        /*
 139         * Enable card status IRQs on (re-)initialisation.  This can
 140         * be called at initialisation, power management event, or
 141         * pcmcia event.
 142         */
 143        void (*socket_init)(struct au1000_pcmcia_socket *);
 144
 145        /*
 146         * Disable card status IRQs and PCMCIA bus on suspend.
 147         */
 148        void (*socket_suspend)(struct au1000_pcmcia_socket *);
 149};
 150
 151extern int au1x_board_init(struct device *dev);
 152
 153#endif /* __ASM_AU1000_PCMCIA_H */
 154