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10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/init.h>
13#include <linux/types.h>
14#include <linux/fcntl.h>
15#include <linux/string.h>
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/timer.h>
19#include <linux/slab.h>
20#include <linux/ioport.h>
21#include <linux/delay.h>
22#include <linux/workqueue.h>
23#include <linux/interrupt.h>
24#include <linux/platform_device.h>
25#include <linux/bitops.h>
26#include <asm/irq.h>
27#include <asm/io.h>
28#include <asm/system.h>
29#include <asm/addrspace.h>
30
31#include <pcmcia/cs_types.h>
32#include <pcmcia/ss.h>
33#include <pcmcia/cs.h>
34
35
36#define PCC0_IRQ 24
37#define PCC1_IRQ 25
38
39#include "m32r_pcc.h"
40
41#define CHAOS_PCC_DEBUG
42#ifdef CHAOS_PCC_DEBUG
43 static volatile u_short dummy_readbuf;
44#endif
45
46#define PCC_DEBUG_DBEX
47
48#ifdef CONFIG_PCMCIA_DEBUG
49static int m32r_pcc_debug;
50module_param(m32r_pcc_debug, int, 0644);
51#define debug(lvl, fmt, arg...) do { \
52 if (m32r_pcc_debug > (lvl)) \
53 printk(KERN_DEBUG "m32r_pcc: " fmt , ## arg); \
54} while (0)
55#else
56#define debug(n, args...) do { } while (0)
57#endif
58
59
60static int poll_interval = 0;
61
62typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
63
64typedef struct pcc_socket {
65 u_short type, flags;
66 struct pcmcia_socket socket;
67 unsigned int number;
68 unsigned int ioaddr;
69 u_long mapaddr;
70 u_long base;
71 u_char cs_irq, intr;
72 pccard_io_map io_map[MAX_IO_WIN];
73 pccard_mem_map mem_map[MAX_WIN];
74 u_char io_win;
75 u_char mem_win;
76 pcc_as_t current_space;
77 u_char last_iodbex;
78#ifdef CHAOS_PCC_DEBUG
79 u_char last_iosize;
80#endif
81#ifdef CONFIG_PROC_FS
82 struct proc_dir_entry *proc;
83#endif
84} pcc_socket_t;
85
86static int pcc_sockets = 0;
87static pcc_socket_t socket[M32R_MAX_PCC] = {
88 { 0, },
89};
90
91
92
93static unsigned int pcc_get(u_short, unsigned int);
94static void pcc_set(u_short, unsigned int , unsigned int );
95
96static DEFINE_SPINLOCK(pcc_lock);
97
98void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
99{
100 u_long addr;
101 u_long flags;
102 int need_ex;
103#ifdef PCC_DEBUG_DBEX
104 int _dbex;
105#endif
106 pcc_socket_t *t = &socket[sock];
107#ifdef CHAOS_PCC_DEBUG
108 int map_changed = 0;
109#endif
110
111
112 spin_lock_irqsave(&pcc_lock, flags);
113
114
115
116
117 need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
118#ifdef PCC_DEBUG_DBEX
119 _dbex = need_ex;
120 need_ex = 0;
121#endif
122
123
124
125
126 addr = t->mapaddr + port - t->ioaddr + KSEG1;
127
128
129
130
131 if (t->current_space != as_io || t->last_iodbex != need_ex) {
132
133 u_long cbsz;
134
135
136
137
138 pcc_set(sock, PCCR, 0);
139
140
141
142
143 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
144 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
145 pcc_set(sock, PCADR, addr & 0x1ff00000);
146
147
148
149
150 pcc_set(sock, PCCR, 1);
151
152#ifdef CHAOS_PCC_DEBUG
153#if 0
154 map_changed = (t->current_space == as_attr && size == 2);
155#else
156 map_changed = 1;
157#endif
158#endif
159 t->current_space = as_io;
160 }
161
162
163
164
165 if (size == 1) {
166
167 unsigned char *bp = (unsigned char *)buf;
168
169#ifdef CHAOS_DEBUG
170 if (map_changed) {
171 dummy_readbuf = readb(addr);
172 }
173#endif
174 if (wr) {
175
176 while (nmemb--) {
177 writeb(*bp++, addr);
178 }
179 } else {
180
181 while (nmemb--) {
182 *bp++ = readb(addr);
183 }
184 }
185 } else {
186
187 unsigned short *bp = (unsigned short *)buf;
188
189#ifdef CHAOS_PCC_DEBUG
190 if (map_changed) {
191 dummy_readbuf = readw(addr);
192 }
193#endif
194 if (wr) {
195
196 while (nmemb--) {
197#ifdef PCC_DEBUG_DBEX
198 if (_dbex) {
199 unsigned char *cp = (unsigned char *)bp;
200 unsigned short tmp;
201 tmp = cp[1] << 8 | cp[0];
202 writew(tmp, addr);
203 bp++;
204 } else
205#endif
206 writew(*bp++, addr);
207 }
208 } else {
209
210 while (nmemb--) {
211#ifdef PCC_DEBUG_DBEX
212 if (_dbex) {
213 unsigned char *cp = (unsigned char *)bp;
214 unsigned short tmp;
215 tmp = readw(addr);
216 cp[0] = tmp & 0xff;
217 cp[1] = (tmp >> 8) & 0xff;
218 bp++;
219 } else
220#endif
221 *bp++ = readw(addr);
222 }
223 }
224 }
225
226#if 1
227
228 if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
229 printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
230 port, size * 8);
231 pcc_set(sock, PCIRC, addr);
232 }
233#endif
234
235
236
237 t->last_iosize = size;
238 t->last_iodbex = need_ex;
239
240
241
242 spin_unlock_irqrestore(&pcc_lock,flags);
243
244 return;
245}
246
247void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
248 pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
249}
250
251void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
252 pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
253}
254
255
256
257#define IS_REGISTERED 0x2000
258#define IS_ALIVE 0x8000
259
260typedef struct pcc_t {
261 char *name;
262 u_short flags;
263} pcc_t;
264
265static pcc_t pcc[] = {
266 { "xnux2", 0 }, { "xnux2", 0 },
267};
268
269static irqreturn_t pcc_interrupt(int, void *);
270
271
272
273static struct timer_list poll_timer;
274
275static unsigned int pcc_get(u_short sock, unsigned int reg)
276{
277 return inl(socket[sock].base + reg);
278}
279
280
281static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
282{
283 outl(data, socket[sock].base + reg);
284}
285
286
287
288
289
290
291
292
293
294
295static int __init is_alive(u_short sock)
296{
297 unsigned int stat;
298 unsigned int f;
299
300 stat = pcc_get(sock, PCIRC);
301 f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
302 if(!f){
303 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
304 return 0;
305 }
306 if(f!=3)
307 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
308 else
309 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
310 return 0;
311}
312
313static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
314 unsigned int ioaddr)
315{
316 pcc_socket_t *t = &socket[pcc_sockets];
317
318
319 t->ioaddr = ioaddr;
320 t->mapaddr = mapaddr;
321 t->base = base;
322#ifdef CHAOS_PCC_DEBUG
323 t->flags = MAP_16BIT;
324#else
325 t->flags = 0;
326#endif
327 if (is_alive(pcc_sockets))
328 t->flags |= IS_ALIVE;
329
330
331 if (t->base > 0) {
332 request_region(t->base, 0x20, "m32r-pcc");
333 }
334
335 printk(KERN_INFO " %s ", pcc[pcc_sockets].name);
336 printk("pcc at 0x%08lx\n", t->base);
337
338
339 t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
340 t->socket.map_size = M32R_PCC_MAPSIZE;
341 t->socket.io_offset = ioaddr;
342 t->socket.irq_mask = 0;
343 t->socket.pci_irq = 2 + pcc_sockets;
344
345 request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
346
347 pcc_sockets++;
348
349 return;
350}
351
352
353
354
355static irqreturn_t pcc_interrupt(int irq, void *dev)
356{
357 int i, j, irc;
358 u_int events, active;
359 int handled = 0;
360
361 debug(4, "m32r: pcc_interrupt(%d)\n", irq);
362
363 for (j = 0; j < 20; j++) {
364 active = 0;
365 for (i = 0; i < pcc_sockets; i++) {
366 if ((socket[i].cs_irq != irq) &&
367 (socket[i].socket.pci_irq != irq))
368 continue;
369 handled = 1;
370 irc = pcc_get(i, PCIRC);
371 irc >>=16;
372 debug(2, "m32r-pcc:interrupt: socket %d pcirc 0x%02x ", i, irc);
373 if (!irc)
374 continue;
375
376 events = (irc) ? SS_DETECT : 0;
377 events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
378 debug(2, " event 0x%02x\n", events);
379
380 if (events)
381 pcmcia_parse_events(&socket[i].socket, events);
382
383 active |= events;
384 active = 0;
385 }
386 if (!active) break;
387 }
388 if (j == 20)
389 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
390
391 debug(4, "m32r-pcc: interrupt done\n");
392
393 return IRQ_RETVAL(handled);
394}
395
396static void pcc_interrupt_wrapper(u_long data)
397{
398 pcc_interrupt(0, NULL);
399 init_timer(&poll_timer);
400 poll_timer.expires = jiffies + poll_interval;
401 add_timer(&poll_timer);
402}
403
404
405
406static int _pcc_get_status(u_short sock, u_int *value)
407{
408 u_int status;
409
410 status = pcc_get(sock,PCIRC);
411 *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
412 ? SS_DETECT : 0;
413
414 status = pcc_get(sock,PCCR);
415
416#if 0
417 *value |= (status & PCCR_PCEN) ? SS_READY : 0;
418#else
419 *value |= SS_READY;
420#endif
421
422 status = pcc_get(sock,PCCSIGCR);
423 *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
424
425 debug(3, "m32r-pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
426 return 0;
427}
428
429
430
431static int _pcc_set_socket(u_short sock, socket_state_t *state)
432{
433 u_long reg = 0;
434
435 debug(3, "m32r-pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
436 "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
437 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
438
439 if (state->Vcc) {
440
441
442
443 if (state->Vcc == 50) {
444 reg |= PCCSIGCR_VEN;
445 } else {
446 return -EINVAL;
447 }
448 }
449
450 if (state->flags & SS_RESET) {
451 debug(3, ":RESET\n");
452 reg |= PCCSIGCR_CRST;
453 }
454 if (state->flags & SS_OUTPUT_ENA){
455 debug(3, ":OUTPUT_ENA\n");
456
457 } else {
458 reg |= PCCSIGCR_SEN;
459 }
460
461 pcc_set(sock,PCCSIGCR,reg);
462
463#ifdef CONFIG_PCMCIA_DEBUG
464 if(state->flags & SS_IOCARD){
465 debug(3, ":IOCARD");
466 }
467 if (state->flags & SS_PWR_AUTO) {
468 debug(3, ":PWR_AUTO");
469 }
470 if (state->csc_mask & SS_DETECT)
471 debug(3, ":csc-SS_DETECT");
472 if (state->flags & SS_IOCARD) {
473 if (state->csc_mask & SS_STSCHG)
474 debug(3, ":STSCHG");
475 } else {
476 if (state->csc_mask & SS_BATDEAD)
477 debug(3, ":BATDEAD");
478 if (state->csc_mask & SS_BATWARN)
479 debug(3, ":BATWARN");
480 if (state->csc_mask & SS_READY)
481 debug(3, ":READY");
482 }
483 debug(3, "\n");
484#endif
485 return 0;
486}
487
488
489
490static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
491{
492 u_char map;
493
494 debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
495 "%#llx-%#llx)\n", sock, io->map, io->flags,
496 io->speed, (unsigned long long)io->start,
497 (unsigned long long)io->stop);
498 map = io->map;
499
500 return 0;
501}
502
503
504
505static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
506{
507
508 u_char map = mem->map;
509 u_long mode;
510 u_long addr;
511 pcc_socket_t *t = &socket[sock];
512#ifdef CHAOS_PCC_DEBUG
513#if 0
514 pcc_as_t last = t->current_space;
515#endif
516#endif
517
518 debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
519 "%#llx, %#x)\n", sock, map, mem->flags,
520 mem->speed, (unsigned long long)mem->static_start,
521 mem->card_start);
522
523
524
525
526 if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
527 return -EINVAL;
528 }
529
530
531
532
533 if ((mem->flags & MAP_ACTIVE) == 0) {
534 t->current_space = as_none;
535 return 0;
536 }
537
538
539
540
541 pcc_set(sock, PCCR, 0);
542
543
544
545
546 if (mem->flags & MAP_ATTRIB) {
547 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
548 t->current_space = as_attr;
549 } else {
550 mode = 0;
551 t->current_space = as_comm;
552 }
553 pcc_set(sock, PCMOD, mode);
554
555
556
557
558 addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
559 pcc_set(sock, PCADR, addr);
560
561 mem->static_start = addr + mem->card_start;
562
563
564
565
566 pcc_set(sock, PCCR, 1);
567
568#ifdef CHAOS_PCC_DEBUG
569#if 0
570 if (last != as_attr) {
571#else
572 if (1) {
573#endif
574 dummy_readbuf = *(u_char *)(addr + KSEG1);
575 }
576#endif
577
578 return 0;
579
580}
581
582#if 0
583
584
585
586
587
588
589
590static ssize_t show_info(struct class_device *class_dev, char *buf)
591{
592 pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
593 socket.dev);
594
595 return sprintf(buf, "type: %s\nbase addr: 0x%08lx\n",
596 pcc[s->type].name, s->base);
597}
598
599static ssize_t show_exca(struct class_device *class_dev, char *buf)
600{
601
602
603 return 0;
604}
605
606static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
607static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
608#endif
609
610
611
612
613
614#define LOCKED(x) do { \
615 int retval; \
616 unsigned long flags; \
617 spin_lock_irqsave(&pcc_lock, flags); \
618 retval = x; \
619 spin_unlock_irqrestore(&pcc_lock, flags); \
620 return retval; \
621} while (0)
622
623
624static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
625{
626 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
627
628 if (socket[sock].flags & IS_ALIVE) {
629 *value = 0;
630 return -EINVAL;
631 }
632 LOCKED(_pcc_get_status(sock, value));
633}
634
635static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
636{
637 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
638
639 if (socket[sock].flags & IS_ALIVE)
640 return -EINVAL;
641
642 LOCKED(_pcc_set_socket(sock, state));
643}
644
645static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
646{
647 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
648
649 if (socket[sock].flags & IS_ALIVE)
650 return -EINVAL;
651 LOCKED(_pcc_set_io_map(sock, io));
652}
653
654static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
655{
656 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
657
658 if (socket[sock].flags & IS_ALIVE)
659 return -EINVAL;
660 LOCKED(_pcc_set_mem_map(sock, mem));
661}
662
663static int pcc_init(struct pcmcia_socket *s)
664{
665 debug(4, "m32r-pcc: init call\n");
666 return 0;
667}
668
669static struct pccard_operations pcc_operations = {
670 .init = pcc_init,
671 .get_status = pcc_get_status,
672 .set_socket = pcc_set_socket,
673 .set_io_map = pcc_set_io_map,
674 .set_mem_map = pcc_set_mem_map,
675};
676
677static int pcc_drv_pcmcia_suspend(struct platform_device *dev,
678 pm_message_t state)
679{
680 return pcmcia_socket_dev_suspend(&dev->dev);
681}
682
683static int pcc_drv_pcmcia_resume(struct platform_device *dev)
684{
685 return pcmcia_socket_dev_resume(&dev->dev);
686}
687
688
689static struct platform_driver pcc_driver = {
690 .driver = {
691 .name = "pcc",
692 .owner = THIS_MODULE,
693 },
694 .suspend = pcc_drv_pcmcia_suspend,
695 .resume = pcc_drv_pcmcia_resume,
696};
697
698static struct platform_device pcc_device = {
699 .name = "pcc",
700 .id = 0,
701};
702
703
704
705static int __init init_m32r_pcc(void)
706{
707 int i, ret;
708
709 ret = platform_driver_register(&pcc_driver);
710 if (ret)
711 return ret;
712
713 ret = platform_device_register(&pcc_device);
714 if (ret){
715 platform_driver_unregister(&pcc_driver);
716 return ret;
717 }
718
719 printk(KERN_INFO "m32r PCC probe:\n");
720
721 pcc_sockets = 0;
722
723 add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE, 0x1000);
724
725#ifdef CONFIG_M32RPCC_SLOT2
726 add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE, 0x2000);
727#endif
728
729 if (pcc_sockets == 0) {
730 printk("socket is not found.\n");
731 platform_device_unregister(&pcc_device);
732 platform_driver_unregister(&pcc_driver);
733 return -ENODEV;
734 }
735
736
737
738 for (i = 0 ; i < pcc_sockets ; i++) {
739 socket[i].socket.dev.parent = &pcc_device.dev;
740 socket[i].socket.ops = &pcc_operations;
741 socket[i].socket.resource_ops = &pccard_static_ops;
742 socket[i].socket.owner = THIS_MODULE;
743 socket[i].number = i;
744 ret = pcmcia_register_socket(&socket[i].socket);
745 if (!ret)
746 socket[i].flags |= IS_REGISTERED;
747
748#if 0
749 class_device_create_file(&socket[i].socket.dev,
750 &class_device_attr_info);
751 class_device_create_file(&socket[i].socket.dev,
752 &class_device_attr_exca);
753#endif
754 }
755
756
757 if (poll_interval != 0) {
758 poll_timer.function = pcc_interrupt_wrapper;
759 poll_timer.data = 0;
760 init_timer(&poll_timer);
761 poll_timer.expires = jiffies + poll_interval;
762 add_timer(&poll_timer);
763 }
764
765 return 0;
766}
767
768static void __exit exit_m32r_pcc(void)
769{
770 int i;
771
772 for (i = 0; i < pcc_sockets; i++)
773 if (socket[i].flags & IS_REGISTERED)
774 pcmcia_unregister_socket(&socket[i].socket);
775
776 platform_device_unregister(&pcc_device);
777 if (poll_interval != 0)
778 del_timer_sync(&poll_timer);
779
780 platform_driver_unregister(&pcc_driver);
781}
782
783module_init(init_m32r_pcc);
784module_exit(exit_m32r_pcc);
785MODULE_LICENSE("Dual MPL/GPL");
786
787