linux/drivers/pcmcia/pxa2xx_base.c
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   1/*======================================================================
   2
   3  Device driver for the PCMCIA control functionality of PXA2xx
   4  microprocessors.
   5
   6    The contents of this file may be used under the
   7    terms of the GNU Public License version 2 (the "GPL")
   8
   9    (c) Ian Molton (spyro@f2s.com) 2003
  10    (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
  11
  12    derived from sa11xx_base.c
  13
  14     Portions created by John G. Dorsey are
  15     Copyright (C) 1999 John G. Dorsey.
  16
  17  ======================================================================*/
  18
  19#include <linux/module.h>
  20#include <linux/init.h>
  21#include <linux/cpufreq.h>
  22#include <linux/ioport.h>
  23#include <linux/kernel.h>
  24#include <linux/spinlock.h>
  25#include <linux/platform_device.h>
  26
  27#include <mach/hardware.h>
  28#include <asm/io.h>
  29#include <asm/irq.h>
  30#include <asm/system.h>
  31#include <mach/pxa2xx-regs.h>
  32#include <asm/mach-types.h>
  33
  34#include <pcmcia/cs_types.h>
  35#include <pcmcia/ss.h>
  36#include <pcmcia/cistpl.h>
  37
  38#include "soc_common.h"
  39#include "pxa2xx_base.h"
  40
  41/*
  42 * Personal Computer Memory Card International Association (PCMCIA) sockets
  43 */
  44
  45#define PCMCIAPrtSp     0x04000000      /* PCMCIA Partition Space [byte]   */
  46#define PCMCIASp        (4*PCMCIAPrtSp) /* PCMCIA Space [byte]             */
  47#define PCMCIAIOSp      PCMCIAPrtSp     /* PCMCIA I/O Space [byte]         */
  48#define PCMCIAAttrSp    PCMCIAPrtSp     /* PCMCIA Attribute Space [byte]   */
  49#define PCMCIAMemSp     PCMCIAPrtSp     /* PCMCIA Memory Space [byte]      */
  50
  51#define PCMCIA0Sp       PCMCIASp        /* PCMCIA 0 Space [byte]           */
  52#define PCMCIA0IOSp     PCMCIAIOSp      /* PCMCIA 0 I/O Space [byte]       */
  53#define PCMCIA0AttrSp   PCMCIAAttrSp    /* PCMCIA 0 Attribute Space [byte] */
  54#define PCMCIA0MemSp    PCMCIAMemSp     /* PCMCIA 0 Memory Space [byte]    */
  55
  56#define PCMCIA1Sp       PCMCIASp        /* PCMCIA 1 Space [byte]           */
  57#define PCMCIA1IOSp     PCMCIAIOSp      /* PCMCIA 1 I/O Space [byte]       */
  58#define PCMCIA1AttrSp   PCMCIAAttrSp    /* PCMCIA 1 Attribute Space [byte] */
  59#define PCMCIA1MemSp    PCMCIAMemSp     /* PCMCIA 1 Memory Space [byte]    */
  60
  61#define _PCMCIA(Nb)                     /* PCMCIA [0..1]                   */ \
  62                        (0x20000000 + (Nb) * PCMCIASp)
  63#define _PCMCIAIO(Nb)   _PCMCIA(Nb)     /* PCMCIA I/O [0..1]               */
  64#define _PCMCIAAttr(Nb)                 /* PCMCIA Attribute [0..1]         */ \
  65                        (_PCMCIA(Nb) + 2 * PCMCIAPrtSp)
  66#define _PCMCIAMem(Nb)                  /* PCMCIA Memory [0..1]            */ \
  67                        (_PCMCIA(Nb) + 3 * PCMCIAPrtSp)
  68
  69#define _PCMCIA0        _PCMCIA(0)      /* PCMCIA 0                        */
  70#define _PCMCIA0IO      _PCMCIAIO(0)    /* PCMCIA 0 I/O                    */
  71#define _PCMCIA0Attr    _PCMCIAAttr(0)  /* PCMCIA 0 Attribute              */
  72#define _PCMCIA0Mem     _PCMCIAMem(0)   /* PCMCIA 0 Memory                 */
  73
  74#define _PCMCIA1        _PCMCIA(1)      /* PCMCIA 1                        */
  75#define _PCMCIA1IO      _PCMCIAIO(1)    /* PCMCIA 1 I/O                    */
  76#define _PCMCIA1Attr    _PCMCIAAttr(1)  /* PCMCIA 1 Attribute              */
  77#define _PCMCIA1Mem     _PCMCIAMem(1)   /* PCMCIA 1 Memory                 */
  78
  79
  80#define MCXX_SETUP_MASK     (0x7f)
  81#define MCXX_ASST_MASK      (0x1f)
  82#define MCXX_HOLD_MASK      (0x3f)
  83#define MCXX_SETUP_SHIFT    (0)
  84#define MCXX_ASST_SHIFT     (7)
  85#define MCXX_HOLD_SHIFT     (14)
  86
  87static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
  88                                     u_int mem_clk_10khz)
  89{
  90        u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  91        return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  92}
  93
  94static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
  95                                     u_int mem_clk_10khz)
  96{
  97        u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  98        return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
  99}
 100
 101static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
 102                                      u_int mem_clk_10khz)
 103{
 104        u_int code = pcmcia_cycle_ns * mem_clk_10khz;
 105        return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
 106}
 107
 108/* This function returns the (approximate) command assertion period, in
 109 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
 110 */
 111static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
 112                                           u_int pcmcia_mcxx_asst)
 113{
 114        return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
 115}
 116
 117static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
 118{
 119        MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
 120                & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
 121                | ((pxa2xx_mcxx_asst(speed, clock)
 122                & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
 123                | ((pxa2xx_mcxx_hold(speed, clock)
 124                & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
 125
 126        return 0;
 127}
 128
 129static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
 130{
 131        MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
 132                & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
 133                | ((pxa2xx_mcxx_asst(speed, clock)
 134                & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
 135                | ((pxa2xx_mcxx_hold(speed, clock)
 136                & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
 137
 138        return 0;
 139}
 140
 141static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
 142{
 143        MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
 144                & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
 145                | ((pxa2xx_mcxx_asst(speed, clock)
 146                & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
 147                | ((pxa2xx_mcxx_hold(speed, clock)
 148                & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
 149
 150        return 0;
 151}
 152
 153static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
 154{
 155        struct soc_pcmcia_timing timing;
 156        int sock = skt->nr;
 157
 158        soc_common_pcmcia_get_timing(skt, &timing);
 159
 160        pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
 161        pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
 162        pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
 163
 164        return 0;
 165}
 166
 167static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
 168{
 169        unsigned int clk = get_memclk_frequency_10khz();
 170        return pxa2xx_pcmcia_set_mcxx(skt, clk);
 171}
 172
 173#ifdef CONFIG_CPU_FREQ
 174
 175static int
 176pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
 177                               unsigned long val,
 178                               struct cpufreq_freqs *freqs)
 179{
 180#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
 181        switch (val) {
 182        case CPUFREQ_PRECHANGE:
 183                if (freqs->new > freqs->old) {
 184                        debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
 185                               "pre-updating\n",
 186                               freqs->new / 1000, (freqs->new / 100) % 10,
 187                               freqs->old / 1000, (freqs->old / 100) % 10);
 188                        pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
 189                }
 190                break;
 191
 192        case CPUFREQ_POSTCHANGE:
 193                if (freqs->new < freqs->old) {
 194                        debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
 195                               "post-updating\n",
 196                               freqs->new / 1000, (freqs->new / 100) % 10,
 197                               freqs->old / 1000, (freqs->old / 100) % 10);
 198                        pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
 199                }
 200                break;
 201        }
 202        return 0;
 203}
 204#endif
 205
 206static void pxa2xx_configure_sockets(struct device *dev)
 207{
 208        struct pcmcia_low_level *ops = dev->platform_data;
 209
 210        /*
 211         * We have at least one socket, so set MECR:CIT
 212         * (Card Is There)
 213         */
 214        MECR |= MECR_CIT;
 215
 216        /* Set MECR:NOS (Number Of Sockets) */
 217        if ((ops->first + ops->nr) > 1 || machine_is_viper())
 218                MECR |= MECR_NOS;
 219        else
 220                MECR &= ~MECR_NOS;
 221}
 222
 223static const char *skt_names[] = {
 224        "PCMCIA socket 0",
 225        "PCMCIA socket 1",
 226};
 227
 228#define SKT_DEV_INFO_SIZE(n) \
 229        (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
 230
 231int __pxa2xx_drv_pcmcia_probe(struct device *dev)
 232{
 233        int i, ret;
 234        struct pcmcia_low_level *ops;
 235        struct skt_dev_info *sinfo;
 236        struct soc_pcmcia_socket *skt;
 237
 238        if (!dev || !dev->platform_data)
 239                return -ENODEV;
 240
 241        ops = (struct pcmcia_low_level *)dev->platform_data;
 242
 243        sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
 244        if (!sinfo)
 245                return -ENOMEM;
 246
 247        sinfo->nskt = ops->nr;
 248
 249        /* Initialize processor specific parameters */
 250        for (i = 0; i < ops->nr; i++) {
 251                skt = &sinfo->skt[i];
 252
 253                skt->nr         = ops->first + i;
 254                skt->irq        = NO_IRQ;
 255
 256                skt->res_skt.start      = _PCMCIA(skt->nr);
 257                skt->res_skt.end        = _PCMCIA(skt->nr) + PCMCIASp - 1;
 258                skt->res_skt.name       = skt_names[skt->nr];
 259                skt->res_skt.flags      = IORESOURCE_MEM;
 260
 261                skt->res_io.start       = _PCMCIAIO(skt->nr);
 262                skt->res_io.end         = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
 263                skt->res_io.name        = "io";
 264                skt->res_io.flags       = IORESOURCE_MEM | IORESOURCE_BUSY;
 265
 266                skt->res_mem.start      = _PCMCIAMem(skt->nr);
 267                skt->res_mem.end        = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
 268                skt->res_mem.name       = "memory";
 269                skt->res_mem.flags      = IORESOURCE_MEM;
 270
 271                skt->res_attr.start     = _PCMCIAAttr(skt->nr);
 272                skt->res_attr.end       = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
 273                skt->res_attr.name      = "attribute";
 274                skt->res_attr.flags     = IORESOURCE_MEM;
 275        }
 276
 277        /* Provide our PXA2xx specific timing routines. */
 278        ops->set_timing  = pxa2xx_pcmcia_set_timing;
 279#ifdef CONFIG_CPU_FREQ
 280        ops->frequency_change = pxa2xx_pcmcia_frequency_change;
 281#endif
 282
 283        ret = soc_common_drv_pcmcia_probe(dev, ops, sinfo);
 284
 285        if (!ret)
 286                pxa2xx_configure_sockets(dev);
 287
 288        return ret;
 289}
 290EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);
 291
 292
 293static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
 294{
 295        return __pxa2xx_drv_pcmcia_probe(&dev->dev);
 296}
 297
 298static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
 299{
 300        return soc_common_drv_pcmcia_remove(&dev->dev);
 301}
 302
 303static int pxa2xx_drv_pcmcia_suspend(struct device *dev)
 304{
 305        return pcmcia_socket_dev_suspend(dev);
 306}
 307
 308static int pxa2xx_drv_pcmcia_resume(struct device *dev)
 309{
 310        pxa2xx_configure_sockets(dev);
 311        return pcmcia_socket_dev_resume(dev);
 312}
 313
 314static struct dev_pm_ops  pxa2xx_drv_pcmcia_pm_ops = {
 315        .suspend        = pxa2xx_drv_pcmcia_suspend,
 316        .resume         = pxa2xx_drv_pcmcia_resume,
 317};
 318
 319static struct platform_driver pxa2xx_pcmcia_driver = {
 320        .probe          = pxa2xx_drv_pcmcia_probe,
 321        .remove         = pxa2xx_drv_pcmcia_remove,
 322        .driver         = {
 323                .name   = "pxa2xx-pcmcia",
 324                .owner  = THIS_MODULE,
 325                .pm     = &pxa2xx_drv_pcmcia_pm_ops,
 326        },
 327};
 328
 329static int __init pxa2xx_pcmcia_init(void)
 330{
 331        return platform_driver_register(&pxa2xx_pcmcia_driver);
 332}
 333
 334static void __exit pxa2xx_pcmcia_exit(void)
 335{
 336        platform_driver_unregister(&pxa2xx_pcmcia_driver);
 337}
 338
 339fs_initcall(pxa2xx_pcmcia_init);
 340module_exit(pxa2xx_pcmcia_exit);
 341
 342MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
 343MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
 344MODULE_LICENSE("GPL");
 345MODULE_ALIAS("platform:pxa2xx-pcmcia");
 346