LXR linux/drivers/pcmcia/soc

   1/*
   2 * linux/drivers/pcmcia/soc_common.h
   3 *
   4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
   5 *
   6 * This file contains definitions for the PCMCIA support code common to
   7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
   8 */
   9#ifndef _ASM_ARCH_PCMCIA
  10#define _ASM_ARCH_PCMCIA
  11
  12/* include the world */
  13#include <linux/cpufreq.h>
  14#include <pcmcia/cs_types.h>
  15#include <pcmcia/cs.h>
  16#include <pcmcia/ss.h>
  17#include <pcmcia/cistpl.h>
  18
  19
  20struct device;
  21struct pcmcia_low_level;
  22
  23/*
  24 * This structure encapsulates per-socket state which we might need to
  25 * use when responding to a Card Services query of some kind.
  26 */
  27struct soc_pcmcia_socket {
  28        struct pcmcia_socket    socket;
  29
  30        /*
  31         * Info from low level handler
  32         */
  33        struct device           *dev;
  34        unsigned int            nr;
  35        unsigned int            irq;
  36
  37        /*
  38         * Core PCMCIA state
  39         */
  40        struct pcmcia_low_level *ops;
  41
  42        unsigned int            status;
  43        socket_state_t          cs_state;
  44
  45        unsigned short          spd_io[MAX_IO_WIN];
  46        unsigned short          spd_mem[MAX_WIN];
  47        unsigned short          spd_attr[MAX_WIN];
  48
  49        struct resource         res_skt;
  50        struct resource         res_io;
  51        struct resource         res_mem;
  52        struct resource         res_attr;
  53        void __iomem            *virt_io;
  54
  55        unsigned int            irq_state;
  56
  57        struct timer_list       poll_timer;
  58        struct list_head        node;
  59};
  60
  61struct skt_dev_info {
  62        int nskt;
  63        struct soc_pcmcia_socket skt[0];
  64};
  65
  66struct pcmcia_state {
  67  unsigned detect: 1,
  68            ready: 1,
  69             bvd1: 1,
  70             bvd2: 1,
  71           wrprot: 1,
  72            vs_3v: 1,
  73            vs_Xv: 1;
  74};
  75
  76struct pcmcia_low_level {
  77        struct module *owner;
  78
  79        /* first socket in system */
  80        int first;
  81        /* nr of sockets */
  82        int nr;
  83
  84        int (*hw_init)(struct soc_pcmcia_socket *);
  85        void (*hw_shutdown)(struct soc_pcmcia_socket *);
  86
  87        void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  88        int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  89
  90        /*
  91         * Enable card status IRQs on (re-)initialisation.  This can
  92         * be called at initialisation, power management event, or
  93         * pcmcia event.
  94         */
  95        void (*socket_init)(struct soc_pcmcia_socket *);
  96
  97        /*
  98         * Disable card status IRQs and PCMCIA bus on suspend.
  99         */
 100        void (*socket_suspend)(struct soc_pcmcia_socket *);
 101
 102        /*
 103         * Hardware specific timing routines.
 104         * If provided, the get_timing routine overrides the SOC default.
 105         */
 106        unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
 107        int (*set_timing)(struct soc_pcmcia_socket *);
 108        int (*show_timing)(struct soc_pcmcia_socket *, char *);
 109
 110#ifdef CONFIG_CPU_FREQ
 111        /*
 112         * CPUFREQ support.
 113         */
 114        int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
 115#endif
 116};
 117
 118
 119struct pcmcia_irqs {
 120        int sock;
 121        int irq;
 122        const char *str;
 123};
 124
 125struct soc_pcmcia_timing {
 126        unsigned short io;
 127        unsigned short mem;
 128        unsigned short attr;
 129};
 130
 131extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
 132extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
 133extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
 134extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
 135extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
 136
 137
 138extern struct list_head soc_pcmcia_sockets;
 139
 140extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, struct skt_dev_info *sinfo);
 141extern int soc_common_drv_pcmcia_remove(struct device *dev);
 142
 143
 144#ifdef CONFIG_PCMCIA_DEBUG
 145
 146extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
 147                             int lvl, const char *fmt, ...);
 148
 149#define debug(skt, lvl, fmt, arg...) \
 150        soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
 151
 152#else
 153#define debug(skt, lvl, fmt, arg...) do { } while (0)
 154#endif
 155
 156
 157/*
 158 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
 159 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
 160 * a minimum value of 165ns, as well. Section 4.7.2 (describing
 161 * common and attribute memory write timing) says that twWE has a
 162 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
 163 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
 164 * operation, also section 4.7.4). Section 4.7.3 says that taOE
 165 * has a maximum value of 150ns for a 300ns cycle time (for 5V
 166 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
 167 *
 168 * When configuring memory maps, Card Services appears to adopt the policy
 169 * that a memory access time of "0" means "use the default." The default
 170 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
 171 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
 172 * memory command width time is 300ns.
 173 */
 174#define SOC_PCMCIA_IO_ACCESS            (165)
 175#define SOC_PCMCIA_5V_MEM_ACCESS        (150)
 176#define SOC_PCMCIA_3V_MEM_ACCESS        (300)
 177#define SOC_PCMCIA_ATTR_MEM_ACCESS      (300)
 178
 179/*
 180 * The socket driver actually works nicely in interrupt-driven form,
 181 * so the (relatively infrequent) polling is "just to be sure."
 182 */
 183#define SOC_PCMCIA_POLL_PERIOD    (2*HZ)
 184
 185
 186/* I/O pins replacing memory pins
 187 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
 188 *
 189 * These signals change meaning when going from memory-only to
 190 * memory-or-I/O interface:
 191 */
 192#define iostschg bvd1
 193#define iospkr   bvd2
 194
 195#endif
 196