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11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/bcd.h>
14#include <linux/rtc.h>
15#include <linux/workqueue.h>
16
17#include <linux/spi/spi.h>
18#include <linux/spi/ds1305.h>
19
20
21
22
23
24
25#define DS1305_WRITE 0x80
26
27
28
29
30
31
32
33#define DS1305_RTC_LEN 7
34
35#define DS1305_SEC 0x00
36#define DS1305_MIN 0x01
37#define DS1305_HOUR 0x02
38# define DS1305_HR_12 0x40
39# define DS1305_HR_PM 0x20
40#define DS1305_WDAY 0x03
41#define DS1305_MDAY 0x04
42#define DS1305_MON 0x05
43#define DS1305_YEAR 0x06
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58#define DS1305_ALM_LEN 4
59#define DS1305_ALM_DISABLE 0x80
60
61#define DS1305_ALM0(r) (0x07 + (r))
62#define DS1305_ALM1(r) (0x0b + (r))
63
64
65
66#define DS1305_CONTROL_LEN 3
67
68#define DS1305_CONTROL 0x0f
69# define DS1305_nEOSC 0x80
70# define DS1305_WP 0x40
71# define DS1305_INTCN 0x04
72# define DS1306_1HZ 0x04
73# define DS1305_AEI1 0x02
74# define DS1305_AEI0 0x01
75#define DS1305_STATUS 0x10
76
77#define DS1305_TRICKLE 0x11
78
79
80
81#define DS1305_NVRAM_LEN 96
82
83#define DS1305_NVRAM 0x20
84
85
86struct ds1305 {
87 struct spi_device *spi;
88 struct rtc_device *rtc;
89
90 struct work_struct work;
91
92 unsigned long flags;
93#define FLAG_EXITING 0
94
95 bool hr12;
96 u8 ctrl[DS1305_CONTROL_LEN];
97};
98
99
100
101
102
103
104
105
106
107static unsigned bcd2hour(u8 bcd)
108{
109 if (bcd & DS1305_HR_12) {
110 unsigned hour = 0;
111
112 bcd &= ~DS1305_HR_12;
113 if (bcd & DS1305_HR_PM) {
114 hour = 12;
115 bcd &= ~DS1305_HR_PM;
116 }
117 hour += bcd2bin(bcd);
118 return hour - 1;
119 }
120 return bcd2bin(bcd);
121}
122
123static u8 hour2bcd(bool hr12, int hour)
124{
125 if (hr12) {
126 hour++;
127 if (hour <= 12)
128 return DS1305_HR_12 | bin2bcd(hour);
129 hour -= 12;
130 return DS1305_HR_12 | DS1305_HR_PM | bin2bcd(hour);
131 }
132 return bin2bcd(hour);
133}
134
135
136
137
138
139
140
141#ifdef CONFIG_RTC_INTF_DEV
142
143
144
145
146static int ds1305_ioctl(struct device *dev, unsigned cmd, unsigned long arg)
147{
148 struct ds1305 *ds1305 = dev_get_drvdata(dev);
149 u8 buf[2];
150 int status = -ENOIOCTLCMD;
151
152 buf[0] = DS1305_WRITE | DS1305_CONTROL;
153 buf[1] = ds1305->ctrl[0];
154
155 switch (cmd) {
156 case RTC_AIE_OFF:
157 status = 0;
158 if (!(buf[1] & DS1305_AEI0))
159 goto done;
160 buf[1] &= ~DS1305_AEI0;
161 break;
162
163 case RTC_AIE_ON:
164 status = 0;
165 if (ds1305->ctrl[0] & DS1305_AEI0)
166 goto done;
167 buf[1] |= DS1305_AEI0;
168 break;
169 }
170 if (status == 0) {
171 status = spi_write_then_read(ds1305->spi, buf, sizeof buf,
172 NULL, 0);
173 if (status >= 0)
174 ds1305->ctrl[0] = buf[1];
175 }
176
177done:
178 return status;
179}
180
181#else
182#define ds1305_ioctl NULL
183#endif
184
185
186
187
188
189static int ds1305_get_time(struct device *dev, struct rtc_time *time)
190{
191 struct ds1305 *ds1305 = dev_get_drvdata(dev);
192 u8 addr = DS1305_SEC;
193 u8 buf[DS1305_RTC_LEN];
194 int status;
195
196
197
198
199 status = spi_write_then_read(ds1305->spi, &addr, sizeof addr,
200 buf, sizeof buf);
201 if (status < 0)
202 return status;
203
204 dev_vdbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
205 "read", buf[0], buf[1], buf[2], buf[3],
206 buf[4], buf[5], buf[6]);
207
208
209 time->tm_sec = bcd2bin(buf[DS1305_SEC]);
210 time->tm_min = bcd2bin(buf[DS1305_MIN]);
211 time->tm_hour = bcd2hour(buf[DS1305_HOUR]);
212 time->tm_wday = buf[DS1305_WDAY] - 1;
213 time->tm_mday = bcd2bin(buf[DS1305_MDAY]);
214 time->tm_mon = bcd2bin(buf[DS1305_MON]) - 1;
215 time->tm_year = bcd2bin(buf[DS1305_YEAR]) + 100;
216
217 dev_vdbg(dev, "%s secs=%d, mins=%d, "
218 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
219 "read", time->tm_sec, time->tm_min,
220 time->tm_hour, time->tm_mday,
221 time->tm_mon, time->tm_year, time->tm_wday);
222
223
224 return rtc_valid_tm(time);
225}
226
227static int ds1305_set_time(struct device *dev, struct rtc_time *time)
228{
229 struct ds1305 *ds1305 = dev_get_drvdata(dev);
230 u8 buf[1 + DS1305_RTC_LEN];
231 u8 *bp = buf;
232
233 dev_vdbg(dev, "%s secs=%d, mins=%d, "
234 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
235 "write", time->tm_sec, time->tm_min,
236 time->tm_hour, time->tm_mday,
237 time->tm_mon, time->tm_year, time->tm_wday);
238
239
240 *bp++ = DS1305_WRITE | DS1305_SEC;
241
242 *bp++ = bin2bcd(time->tm_sec);
243 *bp++ = bin2bcd(time->tm_min);
244 *bp++ = hour2bcd(ds1305->hr12, time->tm_hour);
245 *bp++ = (time->tm_wday < 7) ? (time->tm_wday + 1) : 1;
246 *bp++ = bin2bcd(time->tm_mday);
247 *bp++ = bin2bcd(time->tm_mon + 1);
248 *bp++ = bin2bcd(time->tm_year - 100);
249
250 dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
251 "write", buf[1], buf[2], buf[3],
252 buf[4], buf[5], buf[6], buf[7]);
253
254
255 return spi_write_then_read(ds1305->spi, buf, sizeof buf,
256 NULL, 0);
257}
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289
290static int ds1305_get_alarm(struct device *dev, struct rtc_wkalrm *alm)
291{
292 struct ds1305 *ds1305 = dev_get_drvdata(dev);
293 struct spi_device *spi = ds1305->spi;
294 u8 addr;
295 int status;
296 u8 buf[DS1305_ALM_LEN];
297
298
299
300
301
302
303 addr = DS1305_CONTROL;
304 status = spi_write_then_read(spi, &addr, sizeof addr,
305 ds1305->ctrl, sizeof ds1305->ctrl);
306 if (status < 0)
307 return status;
308
309 alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0);
310 alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0);
311
312
313 addr = DS1305_ALM0(DS1305_SEC);
314 status = spi_write_then_read(spi, &addr, sizeof addr,
315 buf, sizeof buf);
316 if (status < 0)
317 return status;
318
319 dev_vdbg(dev, "%s: %02x %02x %02x %02x\n",
320 "alm0 read", buf[DS1305_SEC], buf[DS1305_MIN],
321 buf[DS1305_HOUR], buf[DS1305_WDAY]);
322
323 if ((DS1305_ALM_DISABLE & buf[DS1305_SEC])
324 || (DS1305_ALM_DISABLE & buf[DS1305_MIN])
325 || (DS1305_ALM_DISABLE & buf[DS1305_HOUR]))
326 return -EIO;
327
328
329
330
331
332 alm->time.tm_sec = bcd2bin(buf[DS1305_SEC]);
333 alm->time.tm_min = bcd2bin(buf[DS1305_MIN]);
334 alm->time.tm_hour = bcd2hour(buf[DS1305_HOUR]);
335 alm->time.tm_mday = -1;
336 alm->time.tm_mon = -1;
337 alm->time.tm_year = -1;
338
339 alm->time.tm_wday = -1;
340 alm->time.tm_mday = -1;
341 alm->time.tm_isdst = -1;
342
343 return 0;
344}
345
346
347
348
349static int ds1305_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
350{
351 struct ds1305 *ds1305 = dev_get_drvdata(dev);
352 struct spi_device *spi = ds1305->spi;
353 unsigned long now, later;
354 struct rtc_time tm;
355 int status;
356 u8 buf[1 + DS1305_ALM_LEN];
357
358
359 status = rtc_tm_to_time(&alm->time, &later);
360 if (status < 0)
361 return status;
362
363
364 status = ds1305_get_time(dev, &tm);
365 if (status < 0)
366 return status;
367 status = rtc_tm_to_time(&tm, &now);
368 if (status < 0)
369 return status;
370
371
372 if (later <= now)
373 return -EINVAL;
374 if ((later - now) > 24 * 60 * 60)
375 return -EDOM;
376
377
378 if (ds1305->ctrl[0] & DS1305_AEI0) {
379 ds1305->ctrl[0] &= ~DS1305_AEI0;
380
381 buf[0] = DS1305_WRITE | DS1305_CONTROL;
382 buf[1] = ds1305->ctrl[0];
383 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
384 if (status < 0)
385 return status;
386 }
387
388
389 buf[0] = DS1305_WRITE | DS1305_ALM0(DS1305_SEC);
390 buf[1 + DS1305_SEC] = bin2bcd(alm->time.tm_sec);
391 buf[1 + DS1305_MIN] = bin2bcd(alm->time.tm_min);
392 buf[1 + DS1305_HOUR] = hour2bcd(ds1305->hr12, alm->time.tm_hour);
393 buf[1 + DS1305_WDAY] = DS1305_ALM_DISABLE;
394
395 dev_dbg(dev, "%s: %02x %02x %02x %02x\n",
396 "alm0 write", buf[1 + DS1305_SEC], buf[1 + DS1305_MIN],
397 buf[1 + DS1305_HOUR], buf[1 + DS1305_WDAY]);
398
399 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
400 if (status < 0)
401 return status;
402
403
404 if (alm->enabled) {
405 ds1305->ctrl[0] |= DS1305_AEI0;
406
407 buf[0] = DS1305_WRITE | DS1305_CONTROL;
408 buf[1] = ds1305->ctrl[0];
409 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
410 }
411
412 return status;
413}
414
415#ifdef CONFIG_PROC_FS
416
417static int ds1305_proc(struct device *dev, struct seq_file *seq)
418{
419 struct ds1305 *ds1305 = dev_get_drvdata(dev);
420 char *diodes = "no";
421 char *resistors = "";
422
423
424 if ((ds1305->ctrl[2] & 0xf0) == DS1305_TRICKLE_MAGIC) {
425 switch (ds1305->ctrl[2] & 0x0c) {
426 case DS1305_TRICKLE_DS2:
427 diodes = "2 diodes, ";
428 break;
429 case DS1305_TRICKLE_DS1:
430 diodes = "1 diode, ";
431 break;
432 default:
433 goto done;
434 }
435 switch (ds1305->ctrl[2] & 0x03) {
436 case DS1305_TRICKLE_2K:
437 resistors = "2k Ohm";
438 break;
439 case DS1305_TRICKLE_4K:
440 resistors = "4k Ohm";
441 break;
442 case DS1305_TRICKLE_8K:
443 resistors = "8k Ohm";
444 break;
445 default:
446 diodes = "no";
447 break;
448 }
449 }
450
451done:
452 return seq_printf(seq,
453 "trickle_charge\t: %s%s\n",
454 diodes, resistors);
455}
456
457#else
458#define ds1305_proc NULL
459#endif
460
461static const struct rtc_class_ops ds1305_ops = {
462 .ioctl = ds1305_ioctl,
463 .read_time = ds1305_get_time,
464 .set_time = ds1305_set_time,
465 .read_alarm = ds1305_get_alarm,
466 .set_alarm = ds1305_set_alarm,
467 .proc = ds1305_proc,
468};
469
470static void ds1305_work(struct work_struct *work)
471{
472 struct ds1305 *ds1305 = container_of(work, struct ds1305, work);
473 struct mutex *lock = &ds1305->rtc->ops_lock;
474 struct spi_device *spi = ds1305->spi;
475 u8 buf[3];
476 int status;
477
478
479 mutex_lock(lock);
480
481
482
483
484
485 ds1305->ctrl[0] &= ~(DS1305_AEI1 | DS1305_AEI0);
486 ds1305->ctrl[1] = 0;
487
488 buf[0] = DS1305_WRITE | DS1305_CONTROL;
489 buf[1] = ds1305->ctrl[0];
490 buf[2] = 0;
491
492 status = spi_write_then_read(spi, buf, sizeof buf,
493 NULL, 0);
494 if (status < 0)
495 dev_dbg(&spi->dev, "clear irq --> %d\n", status);
496
497 mutex_unlock(lock);
498
499 if (!test_bit(FLAG_EXITING, &ds1305->flags))
500 enable_irq(spi->irq);
501
502 rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
503}
504
505
506
507
508
509
510static irqreturn_t ds1305_irq(int irq, void *p)
511{
512 struct ds1305 *ds1305 = p;
513
514 disable_irq(irq);
515 schedule_work(&ds1305->work);
516 return IRQ_HANDLED;
517}
518
519
520
521
522
523
524
525static void msg_init(struct spi_message *m, struct spi_transfer *x,
526 u8 *addr, size_t count, char *tx, char *rx)
527{
528 spi_message_init(m);
529 memset(x, 0, 2 * sizeof(*x));
530
531 x->tx_buf = addr;
532 x->len = 1;
533 spi_message_add_tail(x, m);
534
535 x++;
536
537 x->tx_buf = tx;
538 x->rx_buf = rx;
539 x->len = count;
540 spi_message_add_tail(x, m);
541}
542
543static ssize_t
544ds1305_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
545 char *buf, loff_t off, size_t count)
546{
547 struct spi_device *spi;
548 u8 addr;
549 struct spi_message m;
550 struct spi_transfer x[2];
551 int status;
552
553 spi = container_of(kobj, struct spi_device, dev.kobj);
554
555 if (unlikely(off >= DS1305_NVRAM_LEN))
556 return 0;
557 if (count >= DS1305_NVRAM_LEN)
558 count = DS1305_NVRAM_LEN;
559 if ((off + count) > DS1305_NVRAM_LEN)
560 count = DS1305_NVRAM_LEN - off;
561 if (unlikely(!count))
562 return count;
563
564 addr = DS1305_NVRAM + off;
565 msg_init(&m, x, &addr, count, NULL, buf);
566
567 status = spi_sync(spi, &m);
568 if (status < 0)
569 dev_err(&spi->dev, "nvram %s error %d\n", "read", status);
570 return (status < 0) ? status : count;
571}
572
573static ssize_t
574ds1305_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
575 char *buf, loff_t off, size_t count)
576{
577 struct spi_device *spi;
578 u8 addr;
579 struct spi_message m;
580 struct spi_transfer x[2];
581 int status;
582
583 spi = container_of(kobj, struct spi_device, dev.kobj);
584
585 if (unlikely(off >= DS1305_NVRAM_LEN))
586 return -EFBIG;
587 if (count >= DS1305_NVRAM_LEN)
588 count = DS1305_NVRAM_LEN;
589 if ((off + count) > DS1305_NVRAM_LEN)
590 count = DS1305_NVRAM_LEN - off;
591 if (unlikely(!count))
592 return count;
593
594 addr = (DS1305_WRITE | DS1305_NVRAM) + off;
595 msg_init(&m, x, &addr, count, buf, NULL);
596
597 status = spi_sync(spi, &m);
598 if (status < 0)
599 dev_err(&spi->dev, "nvram %s error %d\n", "write", status);
600 return (status < 0) ? status : count;
601}
602
603static struct bin_attribute nvram = {
604 .attr.name = "nvram",
605 .attr.mode = S_IRUGO | S_IWUSR,
606 .read = ds1305_nvram_read,
607 .write = ds1305_nvram_write,
608 .size = DS1305_NVRAM_LEN,
609};
610
611
612
613
614
615
616
617static int __devinit ds1305_probe(struct spi_device *spi)
618{
619 struct ds1305 *ds1305;
620 struct rtc_device *rtc;
621 int status;
622 u8 addr, value;
623 struct ds1305_platform_data *pdata = spi->dev.platform_data;
624 bool write_ctrl = false;
625
626
627
628
629
630 if ((spi->bits_per_word && spi->bits_per_word != 8)
631 || (spi->max_speed_hz > 2000000)
632 || !(spi->mode & SPI_CPHA))
633 return -EINVAL;
634
635
636 ds1305 = kzalloc(sizeof *ds1305, GFP_KERNEL);
637 if (!ds1305)
638 return -ENOMEM;
639 ds1305->spi = spi;
640 spi_set_drvdata(spi, ds1305);
641
642
643 addr = DS1305_CONTROL;
644 status = spi_write_then_read(spi, &addr, sizeof addr,
645 ds1305->ctrl, sizeof ds1305->ctrl);
646 if (status < 0) {
647 dev_dbg(&spi->dev, "can't %s, %d\n",
648 "read", status);
649 goto fail0;
650 }
651
652 dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
653 "read", ds1305->ctrl[0],
654 ds1305->ctrl[1], ds1305->ctrl[2]);
655
656
657
658
659
660
661 if ((ds1305->ctrl[0] & 0x38) != 0 || (ds1305->ctrl[1] & 0xfc) != 0) {
662 dev_dbg(&spi->dev, "RTC chip is not present\n");
663 status = -ENODEV;
664 goto fail0;
665 }
666 if (ds1305->ctrl[2] == 0)
667 dev_dbg(&spi->dev, "chip may not be present\n");
668
669
670
671
672 if (ds1305->ctrl[0] & DS1305_WP) {
673 u8 buf[2];
674
675 ds1305->ctrl[0] &= ~DS1305_WP;
676
677 buf[0] = DS1305_WRITE | DS1305_CONTROL;
678 buf[1] = ds1305->ctrl[0];
679 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
680
681 dev_dbg(&spi->dev, "clear WP --> %d\n", status);
682 if (status < 0)
683 goto fail0;
684 }
685
686
687
688
689 if (ds1305->ctrl[0] & DS1305_nEOSC) {
690 ds1305->ctrl[0] &= ~DS1305_nEOSC;
691 write_ctrl = true;
692 dev_warn(&spi->dev, "SET TIME!\n");
693 }
694
695
696 if (ds1305->ctrl[1]) {
697 ds1305->ctrl[1] = 0;
698 write_ctrl = true;
699 }
700
701
702 if (pdata) {
703
704 if (((ds1305->ctrl[2] & 0xf0) != DS1305_TRICKLE_MAGIC)) {
705 ds1305->ctrl[2] = DS1305_TRICKLE_MAGIC
706 | pdata->trickle;
707 write_ctrl = true;
708 }
709
710
711 if (pdata->is_ds1306) {
712 if (pdata->en_1hz) {
713 if (!(ds1305->ctrl[0] & DS1306_1HZ)) {
714 ds1305->ctrl[0] |= DS1306_1HZ;
715 write_ctrl = true;
716 }
717 } else {
718 if (ds1305->ctrl[0] & DS1306_1HZ) {
719 ds1305->ctrl[0] &= ~DS1306_1HZ;
720 write_ctrl = true;
721 }
722 }
723 }
724 }
725
726 if (write_ctrl) {
727 u8 buf[4];
728
729 buf[0] = DS1305_WRITE | DS1305_CONTROL;
730 buf[1] = ds1305->ctrl[0];
731 buf[2] = ds1305->ctrl[1];
732 buf[3] = ds1305->ctrl[2];
733 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
734 if (status < 0) {
735 dev_dbg(&spi->dev, "can't %s, %d\n",
736 "write", status);
737 goto fail0;
738 }
739
740 dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
741 "write", ds1305->ctrl[0],
742 ds1305->ctrl[1], ds1305->ctrl[2]);
743 }
744
745
746 addr = DS1305_HOUR;
747 status = spi_write_then_read(spi, &addr, sizeof addr,
748 &value, sizeof value);
749 if (status < 0) {
750 dev_dbg(&spi->dev, "read HOUR --> %d\n", status);
751 goto fail0;
752 }
753
754 ds1305->hr12 = (DS1305_HR_12 & value) != 0;
755 if (ds1305->hr12)
756 dev_dbg(&spi->dev, "AM/PM\n");
757
758
759 rtc = rtc_device_register("ds1305", &spi->dev,
760 &ds1305_ops, THIS_MODULE);
761 if (IS_ERR(rtc)) {
762 status = PTR_ERR(rtc);
763 dev_dbg(&spi->dev, "register rtc --> %d\n", status);
764 goto fail0;
765 }
766 ds1305->rtc = rtc;
767
768
769
770
771
772
773
774 if (spi->irq) {
775 INIT_WORK(&ds1305->work, ds1305_work);
776 status = request_irq(spi->irq, ds1305_irq,
777 0, dev_name(&rtc->dev), ds1305);
778 if (status < 0) {
779 dev_dbg(&spi->dev, "request_irq %d --> %d\n",
780 spi->irq, status);
781 goto fail1;
782 }
783 }
784
785
786 status = sysfs_create_bin_file(&spi->dev.kobj, &nvram);
787 if (status < 0) {
788 dev_dbg(&spi->dev, "register nvram --> %d\n", status);
789 goto fail2;
790 }
791
792 return 0;
793
794fail2:
795 free_irq(spi->irq, ds1305);
796fail1:
797 rtc_device_unregister(rtc);
798fail0:
799 kfree(ds1305);
800 return status;
801}
802
803static int __devexit ds1305_remove(struct spi_device *spi)
804{
805 struct ds1305 *ds1305 = spi_get_drvdata(spi);
806
807 sysfs_remove_bin_file(&spi->dev.kobj, &nvram);
808
809
810 if (spi->irq) {
811 set_bit(FLAG_EXITING, &ds1305->flags);
812 free_irq(spi->irq, ds1305);
813 flush_scheduled_work();
814 }
815
816 rtc_device_unregister(ds1305->rtc);
817 spi_set_drvdata(spi, NULL);
818 kfree(ds1305);
819 return 0;
820}
821
822static struct spi_driver ds1305_driver = {
823 .driver.name = "rtc-ds1305",
824 .driver.owner = THIS_MODULE,
825 .probe = ds1305_probe,
826 .remove = __devexit_p(ds1305_remove),
827
828};
829
830static int __init ds1305_init(void)
831{
832 return spi_register_driver(&ds1305_driver);
833}
834module_init(ds1305_init);
835
836static void __exit ds1305_exit(void)
837{
838 spi_unregister_driver(&ds1305_driver);
839}
840module_exit(ds1305_exit);
841
842MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
843MODULE_LICENSE("GPL");
844MODULE_ALIAS("spi:rtc-ds1305");
845