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8#ifndef _CIO_QDIO_H
9#define _CIO_QDIO_H
10
11#include <asm/page.h>
12#include <asm/schid.h>
13#include <asm/debug.h>
14#include "chsc.h"
15
16#define QDIO_BUSY_BIT_PATIENCE 100
17#define QDIO_INPUT_THRESHOLD 500
18
19
20
21
22
23
24
25#define QDIO_IQDIO_POLL_LVL 65
26
27enum qdio_irq_states {
28 QDIO_IRQ_STATE_INACTIVE,
29 QDIO_IRQ_STATE_ESTABLISHED,
30 QDIO_IRQ_STATE_ACTIVE,
31 QDIO_IRQ_STATE_STOPPED,
32 QDIO_IRQ_STATE_CLEANUP,
33 QDIO_IRQ_STATE_ERR,
34 NR_QDIO_IRQ_STATES,
35};
36
37
38#define QDIO_DOING_ESTABLISH 1
39#define QDIO_DOING_ACTIVATE 2
40#define QDIO_DOING_CLEANUP 3
41
42#define SLSB_STATE_NOT_INIT 0x0
43#define SLSB_STATE_EMPTY 0x1
44#define SLSB_STATE_PRIMED 0x2
45#define SLSB_STATE_HALTED 0xe
46#define SLSB_STATE_ERROR 0xf
47#define SLSB_TYPE_INPUT 0x0
48#define SLSB_TYPE_OUTPUT 0x20
49#define SLSB_OWNER_PROG 0x80
50#define SLSB_OWNER_CU 0x40
51
52#define SLSB_P_INPUT_NOT_INIT \
53 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT)
54#define SLSB_P_INPUT_ACK \
55 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)
56#define SLSB_CU_INPUT_EMPTY \
57 (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)
58#define SLSB_P_INPUT_PRIMED \
59 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED)
60#define SLSB_P_INPUT_HALTED \
61 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED)
62#define SLSB_P_INPUT_ERROR \
63 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR)
64#define SLSB_P_OUTPUT_NOT_INIT \
65 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT)
66#define SLSB_P_OUTPUT_EMPTY \
67 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY)
68#define SLSB_CU_OUTPUT_PRIMED \
69 (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED)
70#define SLSB_P_OUTPUT_HALTED \
71 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED)
72#define SLSB_P_OUTPUT_ERROR \
73 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR)
74
75#define SLSB_ERROR_DURING_LOOKUP 0xff
76
77
78#define CIW_TYPE_EQUEUE 0x3
79#define CIW_TYPE_AQUEUE 0x4
80
81
82#define CHSC_FLAG_QDIO_CAPABILITY 0x80
83#define CHSC_FLAG_VALIDITY 0x40
84
85
86#define AC1_SIGA_INPUT_NEEDED 0x40
87#define AC1_SIGA_OUTPUT_NEEDED 0x20
88#define AC1_SIGA_SYNC_NEEDED 0x10
89#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08
90#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04
91#define AC1_SC_QEBSM_AVAILABLE 0x02
92#define AC1_SC_QEBSM_ENABLED 0x01
93
94#ifdef CONFIG_64BIT
95static inline int do_sqbs(u64 token, unsigned char state, int queue,
96 int *start, int *count)
97{
98 register unsigned long _ccq asm ("0") = *count;
99 register unsigned long _token asm ("1") = token;
100 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
101
102 asm volatile(
103 " .insn rsy,0xeb000000008A,%1,0,0(%2)"
104 : "+d" (_ccq), "+d" (_queuestart)
105 : "d" ((unsigned long)state), "d" (_token)
106 : "memory", "cc");
107 *count = _ccq & 0xff;
108 *start = _queuestart & 0xff;
109
110 return (_ccq >> 32) & 0xff;
111}
112
113static inline int do_eqbs(u64 token, unsigned char *state, int queue,
114 int *start, int *count, int ack)
115{
116 register unsigned long _ccq asm ("0") = *count;
117 register unsigned long _token asm ("1") = token;
118 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
119 unsigned long _state = (unsigned long)ack << 63;
120
121 asm volatile(
122 " .insn rrf,0xB99c0000,%1,%2,0,0"
123 : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
124 : "d" (_token)
125 : "memory", "cc");
126 *count = _ccq & 0xff;
127 *start = _queuestart & 0xff;
128 *state = _state & 0xff;
129
130 return (_ccq >> 32) & 0xff;
131}
132#else
133static inline int do_sqbs(u64 token, unsigned char state, int queue,
134 int *start, int *count) { return 0; }
135static inline int do_eqbs(u64 token, unsigned char *state, int queue,
136 int *start, int *count, int ack) { return 0; }
137#endif
138
139struct qdio_irq;
140
141struct siga_flag {
142 u8 input:1;
143 u8 output:1;
144 u8 sync:1;
145 u8 no_sync_ti:1;
146 u8 no_sync_out_ti:1;
147 u8 no_sync_out_pci:1;
148 u8:2;
149} __attribute__ ((packed));
150
151struct chsc_ssqd_area {
152 struct chsc_header request;
153 u16:10;
154 u8 ssid:2;
155 u8 fmt:4;
156 u16 first_sch;
157 u16:16;
158 u16 last_sch;
159 u32:32;
160 struct chsc_header response;
161 u32:32;
162 struct qdio_ssqd_desc qdio_ssqd;
163} __attribute__ ((packed));
164
165struct scssc_area {
166 struct chsc_header request;
167 u16 operation_code;
168 u16:16;
169 u32:32;
170 u32:32;
171 u64 summary_indicator_addr;
172 u64 subchannel_indicator_addr;
173 u32 ks:4;
174 u32 kc:4;
175 u32:21;
176 u32 isc:3;
177 u32 word_with_d_bit;
178 u32:32;
179 struct subchannel_id schid;
180 u32 reserved[1004];
181 struct chsc_header response;
182 u32:32;
183} __attribute__ ((packed));
184
185struct qdio_input_q {
186
187 int polling;
188
189
190 int ack_start;
191
192
193 int ack_count;
194
195
196 u64 timestamp;
197};
198
199struct qdio_output_q {
200
201 int pci_out_enabled;
202
203
204 int use_enh_siga;
205
206
207 struct timer_list timer;
208};
209
210struct qdio_q {
211 struct slsb slsb;
212 union {
213 struct qdio_input_q in;
214 struct qdio_output_q out;
215 } u;
216
217
218 int nr;
219
220
221 int mask;
222
223
224 int is_input_q;
225
226
227 struct list_head entry;
228
229
230 qdio_handler_t (*handler);
231
232
233
234
235
236
237 int first_to_check;
238
239
240 int last_move;
241
242
243 int first_to_kick;
244
245
246 atomic_t nr_buf_used;
247
248 struct qdio_irq *irq_ptr;
249 struct dentry *debugfs_q;
250 struct tasklet_struct tasklet;
251
252
253 unsigned int qdio_error;
254
255 struct sl *sl;
256 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q];
257
258
259
260
261
262
263
264 struct slib *slib;
265} __attribute__ ((aligned(256)));
266
267struct qdio_irq {
268 struct qib qib;
269 u32 *dsci;
270 struct ccw_device *cdev;
271 struct dentry *debugfs_dev;
272
273 unsigned long int_parm;
274 struct subchannel_id schid;
275 unsigned long sch_token;
276
277 enum qdio_irq_states state;
278
279 struct siga_flag siga_flag;
280
281 int nr_input_qs;
282 int nr_output_qs;
283
284 struct ccw1 ccw;
285 struct ciw equeue;
286 struct ciw aqueue;
287
288 struct qdio_ssqd_desc ssqd_desc;
289
290 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
291
292
293
294
295
296 struct qdr *qdr;
297 unsigned long chsc_page;
298
299 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
300 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
301
302 debug_info_t *debug_area;
303 struct mutex setup_mutex;
304};
305
306
307#define queue_type(q) q->irq_ptr->qib.qfmt
308#define SCH_NO(q) (q->irq_ptr->schid.sch_no)
309
310#define is_thinint_irq(irq) \
311 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
312 css_general_characteristics.aif_osa)
313
314
315static inline int multicast_outbound(struct qdio_q *q)
316{
317 return (q->irq_ptr->nr_output_qs > 1) &&
318 (q->nr == q->irq_ptr->nr_output_qs - 1);
319}
320
321static inline unsigned long long get_usecs(void)
322{
323 return monotonic_clock() >> 12;
324}
325
326#define pci_out_supported(q) \
327 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
328#define is_qebsm(q) (q->irq_ptr->sch_token != 0)
329
330#define need_siga_sync_thinint(q) (!q->irq_ptr->siga_flag.no_sync_ti)
331#define need_siga_sync_out_thinint(q) (!q->irq_ptr->siga_flag.no_sync_out_ti)
332#define need_siga_in(q) (q->irq_ptr->siga_flag.input)
333#define need_siga_out(q) (q->irq_ptr->siga_flag.output)
334#define need_siga_sync(q) (q->irq_ptr->siga_flag.sync)
335#define siga_syncs_out_pci(q) (q->irq_ptr->siga_flag.no_sync_out_pci)
336
337#define for_each_input_queue(irq_ptr, q, i) \
338 for (i = 0, q = irq_ptr->input_qs[0]; \
339 i < irq_ptr->nr_input_qs; \
340 q = irq_ptr->input_qs[++i])
341#define for_each_output_queue(irq_ptr, q, i) \
342 for (i = 0, q = irq_ptr->output_qs[0]; \
343 i < irq_ptr->nr_output_qs; \
344 q = irq_ptr->output_qs[++i])
345
346#define prev_buf(bufnr) \
347 ((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
348#define next_buf(bufnr) \
349 ((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
350#define add_buf(bufnr, inc) \
351 ((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
352#define sub_buf(bufnr, dec) \
353 ((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
354
355
356void qdio_setup_thinint(struct qdio_irq *irq_ptr);
357int qdio_establish_thinint(struct qdio_irq *irq_ptr);
358void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
359void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
360void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
361void tiqdio_inbound_processing(unsigned long q);
362int tiqdio_allocate_memory(void);
363void tiqdio_free_memory(void);
364int tiqdio_register_thinints(void);
365void tiqdio_unregister_thinints(void);
366
367
368void qdio_inbound_processing(unsigned long data);
369void qdio_outbound_processing(unsigned long data);
370void qdio_outbound_timer(unsigned long data);
371void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
372 struct irb *irb);
373int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
374 int nr_output_qs);
375void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
376int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
377 struct subchannel_id *schid,
378 struct qdio_ssqd_desc *data);
379int qdio_setup_irq(struct qdio_initialize *init_data);
380void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
381 struct ccw_device *cdev);
382void qdio_release_memory(struct qdio_irq *irq_ptr);
383int qdio_setup_create_sysfs(struct ccw_device *cdev);
384void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
385int qdio_setup_init(void);
386void qdio_setup_exit(void);
387
388int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
389 unsigned char *state);
390#endif
391