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65#undef DEBUG
66
67#include <linux/device.h>
68#include <linux/module.h>
69#include <linux/tty.h>
70#include <linux/serial.h>
71#include <linux/sysrq.h>
72#include <linux/console.h>
73#include <linux/delay.h>
74#include <linux/io.h>
75#include <linux/of.h>
76#include <linux/of_platform.h>
77
78#include <asm/mpc52xx.h>
79#include <asm/mpc52xx_psc.h>
80
81#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
82#define SUPPORT_SYSRQ
83#endif
84
85#include <linux/serial_core.h>
86
87
88
89#define SERIAL_PSC_MAJOR 204
90#define SERIAL_PSC_MINOR 148
91
92
93#define ISR_PASS_LIMIT 256
94
95
96static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
97
98
99
100
101
102
103
104
105
106static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
107
108static void mpc52xx_uart_of_enumerate(void);
109
110
111#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
112
113
114
115static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
116
117
118
119
120#ifdef CONFIG_SERIAL_CORE_CONSOLE
121#define uart_console(port) \
122 ((port)->cons && (port)->cons->index == (port)->line)
123#else
124#define uart_console(port) (0)
125#endif
126
127
128
129
130
131struct psc_ops {
132 void (*fifo_init)(struct uart_port *port);
133 int (*raw_rx_rdy)(struct uart_port *port);
134 int (*raw_tx_rdy)(struct uart_port *port);
135 int (*rx_rdy)(struct uart_port *port);
136 int (*tx_rdy)(struct uart_port *port);
137 int (*tx_empty)(struct uart_port *port);
138 void (*stop_rx)(struct uart_port *port);
139 void (*start_tx)(struct uart_port *port);
140 void (*stop_tx)(struct uart_port *port);
141 void (*rx_clr_irq)(struct uart_port *port);
142 void (*tx_clr_irq)(struct uart_port *port);
143 void (*write_char)(struct uart_port *port, unsigned char c);
144 unsigned char (*read_char)(struct uart_port *port);
145 void (*cw_disable_ints)(struct uart_port *port);
146 void (*cw_restore_ints)(struct uart_port *port);
147 unsigned long (*getuartclk)(void *p);
148};
149
150#ifdef CONFIG_PPC_MPC52xx
151#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
152static void mpc52xx_psc_fifo_init(struct uart_port *port)
153{
154 struct mpc52xx_psc __iomem *psc = PSC(port);
155 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
156
157
158 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
159
160 out_8(&fifo->rfcntl, 0x00);
161 out_be16(&fifo->rfalarm, 0x1ff);
162 out_8(&fifo->tfcntl, 0x07);
163 out_be16(&fifo->tfalarm, 0x80);
164
165 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
166 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
167}
168
169static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
170{
171 return in_be16(&PSC(port)->mpc52xx_psc_status)
172 & MPC52xx_PSC_SR_RXRDY;
173}
174
175static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
176{
177 return in_be16(&PSC(port)->mpc52xx_psc_status)
178 & MPC52xx_PSC_SR_TXRDY;
179}
180
181
182static int mpc52xx_psc_rx_rdy(struct uart_port *port)
183{
184 return in_be16(&PSC(port)->mpc52xx_psc_isr)
185 & port->read_status_mask
186 & MPC52xx_PSC_IMR_RXRDY;
187}
188
189static int mpc52xx_psc_tx_rdy(struct uart_port *port)
190{
191 return in_be16(&PSC(port)->mpc52xx_psc_isr)
192 & port->read_status_mask
193 & MPC52xx_PSC_IMR_TXRDY;
194}
195
196static int mpc52xx_psc_tx_empty(struct uart_port *port)
197{
198 return in_be16(&PSC(port)->mpc52xx_psc_status)
199 & MPC52xx_PSC_SR_TXEMP;
200}
201
202static void mpc52xx_psc_start_tx(struct uart_port *port)
203{
204 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
205 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
206}
207
208static void mpc52xx_psc_stop_tx(struct uart_port *port)
209{
210 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
211 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
212}
213
214static void mpc52xx_psc_stop_rx(struct uart_port *port)
215{
216 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
217 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
218}
219
220static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
221{
222}
223
224static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
225{
226}
227
228static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
229{
230 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
231}
232
233static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
234{
235 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
236}
237
238static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
239{
240 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
241}
242
243static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
244{
245 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
246}
247
248
249static unsigned long mpc52xx_getuartclk(void *p)
250{
251
252
253
254
255
256 return mpc5xxx_get_bus_frequency(p) / 2;
257}
258
259static struct psc_ops mpc52xx_psc_ops = {
260 .fifo_init = mpc52xx_psc_fifo_init,
261 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
262 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
263 .rx_rdy = mpc52xx_psc_rx_rdy,
264 .tx_rdy = mpc52xx_psc_tx_rdy,
265 .tx_empty = mpc52xx_psc_tx_empty,
266 .stop_rx = mpc52xx_psc_stop_rx,
267 .start_tx = mpc52xx_psc_start_tx,
268 .stop_tx = mpc52xx_psc_stop_tx,
269 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
270 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
271 .write_char = mpc52xx_psc_write_char,
272 .read_char = mpc52xx_psc_read_char,
273 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
274 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
275 .getuartclk = mpc52xx_getuartclk,
276};
277
278#endif
279
280#ifdef CONFIG_PPC_MPC512x
281#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
282static void mpc512x_psc_fifo_init(struct uart_port *port)
283{
284 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
286 out_be32(&FIFO_512x(port)->txalarm, 1);
287 out_be32(&FIFO_512x(port)->tximr, 0);
288
289 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
290 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
291 out_be32(&FIFO_512x(port)->rxalarm, 1);
292 out_be32(&FIFO_512x(port)->rximr, 0);
293
294 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
295 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
296}
297
298static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
299{
300 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
301}
302
303static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
304{
305 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
306}
307
308static int mpc512x_psc_rx_rdy(struct uart_port *port)
309{
310 return in_be32(&FIFO_512x(port)->rxsr)
311 & in_be32(&FIFO_512x(port)->rximr)
312 & MPC512x_PSC_FIFO_ALARM;
313}
314
315static int mpc512x_psc_tx_rdy(struct uart_port *port)
316{
317 return in_be32(&FIFO_512x(port)->txsr)
318 & in_be32(&FIFO_512x(port)->tximr)
319 & MPC512x_PSC_FIFO_ALARM;
320}
321
322static int mpc512x_psc_tx_empty(struct uart_port *port)
323{
324 return in_be32(&FIFO_512x(port)->txsr)
325 & MPC512x_PSC_FIFO_EMPTY;
326}
327
328static void mpc512x_psc_stop_rx(struct uart_port *port)
329{
330 unsigned long rx_fifo_imr;
331
332 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
333 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
334 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
335}
336
337static void mpc512x_psc_start_tx(struct uart_port *port)
338{
339 unsigned long tx_fifo_imr;
340
341 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
342 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
343 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
344}
345
346static void mpc512x_psc_stop_tx(struct uart_port *port)
347{
348 unsigned long tx_fifo_imr;
349
350 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
351 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
352 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
353}
354
355static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
356{
357 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
358}
359
360static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
361{
362 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
363}
364
365static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
366{
367 out_8(&FIFO_512x(port)->txdata_8, c);
368}
369
370static unsigned char mpc512x_psc_read_char(struct uart_port *port)
371{
372 return in_8(&FIFO_512x(port)->rxdata_8);
373}
374
375static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
376{
377 port->read_status_mask =
378 in_be32(&FIFO_512x(port)->tximr) << 16 |
379 in_be32(&FIFO_512x(port)->rximr);
380 out_be32(&FIFO_512x(port)->tximr, 0);
381 out_be32(&FIFO_512x(port)->rximr, 0);
382}
383
384static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
385{
386 out_be32(&FIFO_512x(port)->tximr,
387 (port->read_status_mask >> 16) & 0x7f);
388 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
389}
390
391static unsigned long mpc512x_getuartclk(void *p)
392{
393 return mpc5xxx_get_bus_frequency(p);
394}
395
396static struct psc_ops mpc512x_psc_ops = {
397 .fifo_init = mpc512x_psc_fifo_init,
398 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
399 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
400 .rx_rdy = mpc512x_psc_rx_rdy,
401 .tx_rdy = mpc512x_psc_tx_rdy,
402 .tx_empty = mpc512x_psc_tx_empty,
403 .stop_rx = mpc512x_psc_stop_rx,
404 .start_tx = mpc512x_psc_start_tx,
405 .stop_tx = mpc512x_psc_stop_tx,
406 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
407 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
408 .write_char = mpc512x_psc_write_char,
409 .read_char = mpc512x_psc_read_char,
410 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
411 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
412 .getuartclk = mpc512x_getuartclk,
413};
414#endif
415
416static struct psc_ops *psc_ops;
417
418
419
420
421
422static unsigned int
423mpc52xx_uart_tx_empty(struct uart_port *port)
424{
425 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
426}
427
428static void
429mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
430{
431 if (mctrl & TIOCM_RTS)
432 out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS);
433 else
434 out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);
435}
436
437static unsigned int
438mpc52xx_uart_get_mctrl(struct uart_port *port)
439{
440 unsigned int ret = TIOCM_DSR;
441 u8 status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
442
443 if (!(status & MPC52xx_PSC_CTS))
444 ret |= TIOCM_CTS;
445 if (!(status & MPC52xx_PSC_DCD))
446 ret |= TIOCM_CAR;
447
448 return ret;
449}
450
451static void
452mpc52xx_uart_stop_tx(struct uart_port *port)
453{
454
455 psc_ops->stop_tx(port);
456}
457
458static void
459mpc52xx_uart_start_tx(struct uart_port *port)
460{
461
462 psc_ops->start_tx(port);
463}
464
465static void
466mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
467{
468 unsigned long flags;
469 spin_lock_irqsave(&port->lock, flags);
470
471 port->x_char = ch;
472 if (ch) {
473
474
475 psc_ops->start_tx(port);
476 }
477
478 spin_unlock_irqrestore(&port->lock, flags);
479}
480
481static void
482mpc52xx_uart_stop_rx(struct uart_port *port)
483{
484
485 psc_ops->stop_rx(port);
486}
487
488static void
489mpc52xx_uart_enable_ms(struct uart_port *port)
490{
491 struct mpc52xx_psc __iomem *psc = PSC(port);
492
493
494 in_8(&psc->mpc52xx_psc_ipcr);
495
496 out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
497
498 port->read_status_mask |= MPC52xx_PSC_IMR_IPC;
499 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
500}
501
502static void
503mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
504{
505 unsigned long flags;
506 spin_lock_irqsave(&port->lock, flags);
507
508 if (ctl == -1)
509 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
510 else
511 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
512
513 spin_unlock_irqrestore(&port->lock, flags);
514}
515
516static int
517mpc52xx_uart_startup(struct uart_port *port)
518{
519 struct mpc52xx_psc __iomem *psc = PSC(port);
520 int ret;
521
522
523 ret = request_irq(port->irq, mpc52xx_uart_int,
524 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
525 "mpc52xx_psc_uart", port);
526 if (ret)
527 return ret;
528
529
530 out_8(&psc->command, MPC52xx_PSC_RST_RX);
531 out_8(&psc->command, MPC52xx_PSC_RST_TX);
532
533 out_be32(&psc->sicr, 0);
534
535 psc_ops->fifo_init(port);
536
537 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
538 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
539
540 return 0;
541}
542
543static void
544mpc52xx_uart_shutdown(struct uart_port *port)
545{
546 struct mpc52xx_psc __iomem *psc = PSC(port);
547
548
549 out_8(&psc->command, MPC52xx_PSC_RST_RX);
550 if (!uart_console(port))
551 out_8(&psc->command, MPC52xx_PSC_RST_TX);
552
553 port->read_status_mask = 0;
554 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
555
556
557 free_irq(port->irq, port);
558}
559
560static void
561mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
562 struct ktermios *old)
563{
564 struct mpc52xx_psc __iomem *psc = PSC(port);
565 unsigned long flags;
566 unsigned char mr1, mr2;
567 unsigned short ctr;
568 unsigned int j, baud, quot;
569
570
571 mr1 = 0;
572
573 switch (new->c_cflag & CSIZE) {
574 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
575 break;
576 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
577 break;
578 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
579 break;
580 case CS8:
581 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
582 }
583
584 if (new->c_cflag & PARENB) {
585 mr1 |= (new->c_cflag & PARODD) ?
586 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
587 } else
588 mr1 |= MPC52xx_PSC_MODE_PARNONE;
589
590
591 mr2 = 0;
592
593 if (new->c_cflag & CSTOPB)
594 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
595 else
596 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
597 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
598 MPC52xx_PSC_MODE_ONE_STOP;
599
600 if (new->c_cflag & CRTSCTS) {
601 mr1 |= MPC52xx_PSC_MODE_RXRTS;
602 mr2 |= MPC52xx_PSC_MODE_TXCTS;
603 }
604
605 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
606 quot = uart_get_divisor(port, baud);
607 ctr = quot & 0xffff;
608
609
610 spin_lock_irqsave(&port->lock, flags);
611
612
613 uart_update_timeout(port, new->c_cflag, baud);
614
615
616
617 j = 5000000;
618
619
620
621
622 while (!mpc52xx_uart_tx_empty(port) && --j)
623 udelay(1);
624
625 if (!j)
626 printk(KERN_ERR "mpc52xx_uart.c: "
627 "Unable to flush RX & TX fifos in-time in set_termios."
628 "Some chars may have been lost.\n");
629
630
631 out_8(&psc->command, MPC52xx_PSC_RST_RX);
632 out_8(&psc->command, MPC52xx_PSC_RST_TX);
633
634
635 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
636 out_8(&psc->mode, mr1);
637 out_8(&psc->mode, mr2);
638 out_8(&psc->ctur, ctr >> 8);
639 out_8(&psc->ctlr, ctr & 0xff);
640
641 if (UART_ENABLE_MS(port, new->c_cflag))
642 mpc52xx_uart_enable_ms(port);
643
644
645 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
646 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
647
648
649 spin_unlock_irqrestore(&port->lock, flags);
650}
651
652static const char *
653mpc52xx_uart_type(struct uart_port *port)
654{
655 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
656}
657
658static void
659mpc52xx_uart_release_port(struct uart_port *port)
660{
661
662 if (port->flags & UPF_IOREMAP) {
663 iounmap(port->membase);
664 port->membase = NULL;
665 }
666
667 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
668}
669
670static int
671mpc52xx_uart_request_port(struct uart_port *port)
672{
673 int err;
674
675 if (port->flags & UPF_IOREMAP)
676 port->membase = ioremap(port->mapbase,
677 sizeof(struct mpc52xx_psc));
678
679 if (!port->membase)
680 return -EINVAL;
681
682 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
683 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
684
685 if (err && (port->flags & UPF_IOREMAP)) {
686 iounmap(port->membase);
687 port->membase = NULL;
688 }
689
690 return err;
691}
692
693static void
694mpc52xx_uart_config_port(struct uart_port *port, int flags)
695{
696 if ((flags & UART_CONFIG_TYPE)
697 && (mpc52xx_uart_request_port(port) == 0))
698 port->type = PORT_MPC52xx;
699}
700
701static int
702mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
703{
704 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
705 return -EINVAL;
706
707 if ((ser->irq != port->irq) ||
708 (ser->io_type != UPIO_MEM) ||
709 (ser->baud_base != port->uartclk) ||
710 (ser->iomem_base != (void *)port->mapbase) ||
711 (ser->hub6 != 0))
712 return -EINVAL;
713
714 return 0;
715}
716
717
718static struct uart_ops mpc52xx_uart_ops = {
719 .tx_empty = mpc52xx_uart_tx_empty,
720 .set_mctrl = mpc52xx_uart_set_mctrl,
721 .get_mctrl = mpc52xx_uart_get_mctrl,
722 .stop_tx = mpc52xx_uart_stop_tx,
723 .start_tx = mpc52xx_uart_start_tx,
724 .send_xchar = mpc52xx_uart_send_xchar,
725 .stop_rx = mpc52xx_uart_stop_rx,
726 .enable_ms = mpc52xx_uart_enable_ms,
727 .break_ctl = mpc52xx_uart_break_ctl,
728 .startup = mpc52xx_uart_startup,
729 .shutdown = mpc52xx_uart_shutdown,
730 .set_termios = mpc52xx_uart_set_termios,
731
732
733 .type = mpc52xx_uart_type,
734 .release_port = mpc52xx_uart_release_port,
735 .request_port = mpc52xx_uart_request_port,
736 .config_port = mpc52xx_uart_config_port,
737 .verify_port = mpc52xx_uart_verify_port
738};
739
740
741
742
743
744
745static inline int
746mpc52xx_uart_int_rx_chars(struct uart_port *port)
747{
748 struct tty_struct *tty = port->state->port.tty;
749 unsigned char ch, flag;
750 unsigned short status;
751
752
753 while (psc_ops->raw_rx_rdy(port)) {
754
755 ch = psc_ops->read_char(port);
756
757
758#ifdef SUPPORT_SYSRQ
759 if (uart_handle_sysrq_char(port, ch)) {
760 port->sysrq = 0;
761 continue;
762 }
763#endif
764
765
766
767 flag = TTY_NORMAL;
768 port->icount.rx++;
769
770 status = in_be16(&PSC(port)->mpc52xx_psc_status);
771
772 if (status & (MPC52xx_PSC_SR_PE |
773 MPC52xx_PSC_SR_FE |
774 MPC52xx_PSC_SR_RB)) {
775
776 if (status & MPC52xx_PSC_SR_RB) {
777 flag = TTY_BREAK;
778 uart_handle_break(port);
779 port->icount.brk++;
780 } else if (status & MPC52xx_PSC_SR_PE) {
781 flag = TTY_PARITY;
782 port->icount.parity++;
783 }
784 else if (status & MPC52xx_PSC_SR_FE) {
785 flag = TTY_FRAME;
786 port->icount.frame++;
787 }
788
789
790 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
791
792 }
793 tty_insert_flip_char(tty, ch, flag);
794 if (status & MPC52xx_PSC_SR_OE) {
795
796
797
798
799
800 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
801 port->icount.overrun++;
802 }
803 }
804
805 spin_unlock(&port->lock);
806 tty_flip_buffer_push(tty);
807 spin_lock(&port->lock);
808
809 return psc_ops->raw_rx_rdy(port);
810}
811
812static inline int
813mpc52xx_uart_int_tx_chars(struct uart_port *port)
814{
815 struct circ_buf *xmit = &port->state->xmit;
816
817
818 if (port->x_char) {
819 psc_ops->write_char(port, port->x_char);
820 port->icount.tx++;
821 port->x_char = 0;
822 return 1;
823 }
824
825
826 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
827 mpc52xx_uart_stop_tx(port);
828 return 0;
829 }
830
831
832 while (psc_ops->raw_tx_rdy(port)) {
833 psc_ops->write_char(port, xmit->buf[xmit->tail]);
834 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
835 port->icount.tx++;
836 if (uart_circ_empty(xmit))
837 break;
838 }
839
840
841 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
842 uart_write_wakeup(port);
843
844
845 if (uart_circ_empty(xmit)) {
846 mpc52xx_uart_stop_tx(port);
847 return 0;
848 }
849
850 return 1;
851}
852
853static irqreturn_t
854mpc52xx_uart_int(int irq, void *dev_id)
855{
856 struct uart_port *port = dev_id;
857 unsigned long pass = ISR_PASS_LIMIT;
858 unsigned int keepgoing;
859 u8 status;
860
861 spin_lock(&port->lock);
862
863
864 do {
865
866 keepgoing = 0;
867
868 psc_ops->rx_clr_irq(port);
869 if (psc_ops->rx_rdy(port))
870 keepgoing |= mpc52xx_uart_int_rx_chars(port);
871
872 psc_ops->tx_clr_irq(port);
873 if (psc_ops->tx_rdy(port))
874 keepgoing |= mpc52xx_uart_int_tx_chars(port);
875
876 status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
877 if (status & MPC52xx_PSC_D_DCD)
878 uart_handle_dcd_change(port, !(status & MPC52xx_PSC_DCD));
879
880 if (status & MPC52xx_PSC_D_CTS)
881 uart_handle_cts_change(port, !(status & MPC52xx_PSC_CTS));
882
883
884 if (!(--pass))
885 keepgoing = 0;
886
887 } while (keepgoing);
888
889 spin_unlock(&port->lock);
890
891 return IRQ_HANDLED;
892}
893
894
895
896
897
898
899#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
900
901static void __init
902mpc52xx_console_get_options(struct uart_port *port,
903 int *baud, int *parity, int *bits, int *flow)
904{
905 struct mpc52xx_psc __iomem *psc = PSC(port);
906 unsigned char mr1;
907
908 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
909
910
911 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
912 mr1 = in_8(&psc->mode);
913
914
915 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
916
917
918 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
919 case MPC52xx_PSC_MODE_5_BITS:
920 *bits = 5;
921 break;
922 case MPC52xx_PSC_MODE_6_BITS:
923 *bits = 6;
924 break;
925 case MPC52xx_PSC_MODE_7_BITS:
926 *bits = 7;
927 break;
928 case MPC52xx_PSC_MODE_8_BITS:
929 default:
930 *bits = 8;
931 }
932
933 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
934 *parity = 'n';
935 else
936 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
937}
938
939static void
940mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
941{
942 struct uart_port *port = &mpc52xx_uart_ports[co->index];
943 unsigned int i, j;
944
945
946 psc_ops->cw_disable_ints(port);
947
948
949 j = 5000000;
950 while (!mpc52xx_uart_tx_empty(port) && --j)
951 udelay(1);
952
953
954 for (i = 0; i < count; i++, s++) {
955
956 if (*s == '\n')
957 psc_ops->write_char(port, '\r');
958
959
960 psc_ops->write_char(port, *s);
961
962
963 j = 20000;
964 while (!mpc52xx_uart_tx_empty(port) && --j)
965 udelay(1);
966 }
967
968
969 psc_ops->cw_restore_ints(port);
970}
971
972
973static int __init
974mpc52xx_console_setup(struct console *co, char *options)
975{
976 struct uart_port *port = &mpc52xx_uart_ports[co->index];
977 struct device_node *np = mpc52xx_uart_nodes[co->index];
978 unsigned int uartclk;
979 struct resource res;
980 int ret;
981
982 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
983 int bits = 8;
984 int parity = 'n';
985 int flow = 'n';
986
987 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
988 co, co->index, options);
989
990 if ((co->index < 0) || (co->index >= MPC52xx_PSC_MAXNUM)) {
991 pr_debug("PSC%x out of range\n", co->index);
992 return -EINVAL;
993 }
994
995 if (!np) {
996 pr_debug("PSC%x not found in device tree\n", co->index);
997 return -EINVAL;
998 }
999
1000 pr_debug("Console on ttyPSC%x is %s\n",
1001 co->index, mpc52xx_uart_nodes[co->index]->full_name);
1002
1003
1004 ret = of_address_to_resource(np, 0, &res);
1005 if (ret) {
1006 pr_debug("Could not get resources for PSC%x\n", co->index);
1007 return ret;
1008 }
1009
1010 uartclk = psc_ops->getuartclk(np);
1011 if (uartclk == 0) {
1012 pr_debug("Could not find uart clock frequency!\n");
1013 return -EINVAL;
1014 }
1015
1016
1017
1018 spin_lock_init(&port->lock);
1019 port->uartclk = uartclk;
1020 port->ops = &mpc52xx_uart_ops;
1021 port->mapbase = res.start;
1022 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1023 port->irq = irq_of_parse_and_map(np, 0);
1024
1025 if (port->membase == NULL)
1026 return -EINVAL;
1027
1028 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1029 (void *)port->mapbase, port->membase,
1030 port->irq, port->uartclk);
1031
1032
1033 if (options)
1034 uart_parse_options(options, &baud, &parity, &bits, &flow);
1035 else
1036 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1037
1038 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1039 baud, bits, parity, flow);
1040
1041 return uart_set_options(port, co, baud, parity, bits, flow);
1042}
1043
1044
1045static struct uart_driver mpc52xx_uart_driver;
1046
1047static struct console mpc52xx_console = {
1048 .name = "ttyPSC",
1049 .write = mpc52xx_console_write,
1050 .device = uart_console_device,
1051 .setup = mpc52xx_console_setup,
1052 .flags = CON_PRINTBUFFER,
1053 .index = -1,
1054 .data = &mpc52xx_uart_driver,
1055};
1056
1057
1058static int __init
1059mpc52xx_console_init(void)
1060{
1061 mpc52xx_uart_of_enumerate();
1062 register_console(&mpc52xx_console);
1063 return 0;
1064}
1065
1066console_initcall(mpc52xx_console_init);
1067
1068#define MPC52xx_PSC_CONSOLE &mpc52xx_console
1069#else
1070#define MPC52xx_PSC_CONSOLE NULL
1071#endif
1072
1073
1074
1075
1076
1077
1078static struct uart_driver mpc52xx_uart_driver = {
1079 .driver_name = "mpc52xx_psc_uart",
1080 .dev_name = "ttyPSC",
1081 .major = SERIAL_PSC_MAJOR,
1082 .minor = SERIAL_PSC_MINOR,
1083 .nr = MPC52xx_PSC_MAXNUM,
1084 .cons = MPC52xx_PSC_CONSOLE,
1085};
1086
1087
1088
1089
1090
1091static struct of_device_id mpc52xx_uart_of_match[] = {
1092#ifdef CONFIG_PPC_MPC52xx
1093 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1094
1095 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1096
1097 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1098#endif
1099#ifdef CONFIG_PPC_MPC512x
1100 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1101#endif
1102 {},
1103};
1104
1105static int __devinit
1106mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1107{
1108 int idx = -1;
1109 unsigned int uartclk;
1110 struct uart_port *port = NULL;
1111 struct resource res;
1112 int ret;
1113
1114 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1115
1116
1117 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1118 if (mpc52xx_uart_nodes[idx] == op->node)
1119 break;
1120 if (idx >= MPC52xx_PSC_MAXNUM)
1121 return -EINVAL;
1122 pr_debug("Found %s assigned to ttyPSC%x\n",
1123 mpc52xx_uart_nodes[idx]->full_name, idx);
1124
1125 uartclk = psc_ops->getuartclk(op->node);
1126 if (uartclk == 0) {
1127 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1128 return -EINVAL;
1129 }
1130
1131
1132 port = &mpc52xx_uart_ports[idx];
1133
1134 spin_lock_init(&port->lock);
1135 port->uartclk = uartclk;
1136 port->fifosize = 512;
1137 port->iotype = UPIO_MEM;
1138 port->flags = UPF_BOOT_AUTOCONF |
1139 (uart_console(port) ? 0 : UPF_IOREMAP);
1140 port->line = idx;
1141 port->ops = &mpc52xx_uart_ops;
1142 port->dev = &op->dev;
1143
1144
1145 ret = of_address_to_resource(op->node, 0, &res);
1146 if (ret)
1147 return ret;
1148
1149 port->mapbase = res.start;
1150 if (!port->mapbase) {
1151 dev_dbg(&op->dev, "Could not allocate resources for PSC\n");
1152 return -EINVAL;
1153 }
1154
1155 port->irq = irq_of_parse_and_map(op->node, 0);
1156 if (port->irq == NO_IRQ) {
1157 dev_dbg(&op->dev, "Could not get irq\n");
1158 return -EINVAL;
1159 }
1160
1161 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1162 (void *)port->mapbase, port->irq, port->uartclk);
1163
1164
1165 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1166 if (ret) {
1167 irq_dispose_mapping(port->irq);
1168 return ret;
1169 }
1170
1171 dev_set_drvdata(&op->dev, (void *)port);
1172 return 0;
1173}
1174
1175static int
1176mpc52xx_uart_of_remove(struct of_device *op)
1177{
1178 struct uart_port *port = dev_get_drvdata(&op->dev);
1179 dev_set_drvdata(&op->dev, NULL);
1180
1181 if (port) {
1182 uart_remove_one_port(&mpc52xx_uart_driver, port);
1183 irq_dispose_mapping(port->irq);
1184 }
1185
1186 return 0;
1187}
1188
1189#ifdef CONFIG_PM
1190static int
1191mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1192{
1193 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1194
1195 if (port)
1196 uart_suspend_port(&mpc52xx_uart_driver, port);
1197
1198 return 0;
1199}
1200
1201static int
1202mpc52xx_uart_of_resume(struct of_device *op)
1203{
1204 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1205
1206 if (port)
1207 uart_resume_port(&mpc52xx_uart_driver, port);
1208
1209 return 0;
1210}
1211#endif
1212
1213static void
1214mpc52xx_uart_of_assign(struct device_node *np)
1215{
1216 int i;
1217
1218
1219 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1220 if (mpc52xx_uart_nodes[i] == NULL) {
1221 of_node_get(np);
1222 mpc52xx_uart_nodes[i] = np;
1223 return;
1224 }
1225 }
1226}
1227
1228static void
1229mpc52xx_uart_of_enumerate(void)
1230{
1231 static int enum_done;
1232 struct device_node *np;
1233 const struct of_device_id *match;
1234 int i;
1235
1236 if (enum_done)
1237 return;
1238
1239
1240 for_each_matching_node(np, mpc52xx_uart_of_match) {
1241 match = of_match_node(mpc52xx_uart_of_match, np);
1242 psc_ops = match->data;
1243 mpc52xx_uart_of_assign(np);
1244 }
1245
1246 enum_done = 1;
1247
1248 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1249 if (mpc52xx_uart_nodes[i])
1250 pr_debug("%s assigned to ttyPSC%x\n",
1251 mpc52xx_uart_nodes[i]->full_name, i);
1252 }
1253}
1254
1255MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1256
1257static struct of_platform_driver mpc52xx_uart_of_driver = {
1258 .match_table = mpc52xx_uart_of_match,
1259 .probe = mpc52xx_uart_of_probe,
1260 .remove = mpc52xx_uart_of_remove,
1261#ifdef CONFIG_PM
1262 .suspend = mpc52xx_uart_of_suspend,
1263 .resume = mpc52xx_uart_of_resume,
1264#endif
1265 .driver = {
1266 .name = "mpc52xx-psc-uart",
1267 },
1268};
1269
1270
1271
1272
1273
1274
1275static int __init
1276mpc52xx_uart_init(void)
1277{
1278 int ret;
1279
1280 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1281
1282 ret = uart_register_driver(&mpc52xx_uart_driver);
1283 if (ret) {
1284 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1285 __FILE__, ret);
1286 return ret;
1287 }
1288
1289 mpc52xx_uart_of_enumerate();
1290
1291 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1292 if (ret) {
1293 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1294 __FILE__, ret);
1295 uart_unregister_driver(&mpc52xx_uart_driver);
1296 return ret;
1297 }
1298
1299 return 0;
1300}
1301
1302static void __exit
1303mpc52xx_uart_exit(void)
1304{
1305 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1306 uart_unregister_driver(&mpc52xx_uart_driver);
1307}
1308
1309
1310module_init(mpc52xx_uart_init);
1311module_exit(mpc52xx_uart_exit);
1312
1313MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1314MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1315MODULE_LICENSE("GPL");
1316