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22#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23#define SUPPORT_SYSRQ
24#endif
25
26#undef DEBUG
27
28#include <linux/module.h>
29#include <linux/errno.h>
30#include <linux/timer.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/tty_flip.h>
34#include <linux/serial.h>
35#include <linux/major.h>
36#include <linux/string.h>
37#include <linux/sysrq.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42#include <linux/console.h>
43#include <linux/platform_device.h>
44#include <linux/serial_sci.h>
45#include <linux/notifier.h>
46#include <linux/cpufreq.h>
47#include <linux/clk.h>
48#include <linux/ctype.h>
49#include <linux/err.h>
50#include <linux/list.h>
51
52#ifdef CONFIG_SUPERH
53#include <asm/clock.h>
54#include <asm/sh_bios.h>
55#endif
56
57#ifdef CONFIG_H8300
58#include <asm/gpio.h>
59#endif
60
61#include "sh-sci.h"
62
63struct sci_port {
64 struct uart_port port;
65
66
67 unsigned int type;
68
69
70 unsigned int irqs[SCIx_NR_IRQS];
71
72
73 void (*enable)(struct uart_port *port);
74
75
76 void (*disable)(struct uart_port *port);
77
78
79 struct timer_list break_timer;
80 int break_flag;
81
82#ifdef CONFIG_HAVE_CLK
83
84 struct clk *iclk;
85
86 struct clk *dclk;
87#endif
88 struct list_head node;
89};
90
91struct sh_sci_priv {
92 spinlock_t lock;
93 struct list_head ports;
94
95#ifdef CONFIG_HAVE_CLK
96 struct notifier_block clk_nb;
97#endif
98};
99
100
101static void sci_stop_tx(struct uart_port *port);
102
103#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
104
105static struct sci_port sci_ports[SCI_NPORTS];
106static struct uart_driver sci_uart_driver;
107
108static inline struct sci_port *
109to_sci_port(struct uart_port *uart)
110{
111 return container_of(uart, struct sci_port, port);
112}
113
114#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
115
116#ifdef CONFIG_CONSOLE_POLL
117static inline void handle_error(struct uart_port *port)
118{
119
120 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
121}
122
123static int sci_poll_get_char(struct uart_port *port)
124{
125 unsigned short status;
126 int c;
127
128 do {
129 status = sci_in(port, SCxSR);
130 if (status & SCxSR_ERRORS(port)) {
131 handle_error(port);
132 continue;
133 }
134 } while (!(status & SCxSR_RDxF(port)));
135
136 c = sci_in(port, SCxRDR);
137
138
139 sci_in(port, SCxSR);
140 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
141
142 return c;
143}
144#endif
145
146static void sci_poll_put_char(struct uart_port *port, unsigned char c)
147{
148 unsigned short status;
149
150 do {
151 status = sci_in(port, SCxSR);
152 } while (!(status & SCxSR_TDxE(port)));
153
154 sci_out(port, SCxTDR, c);
155 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
156}
157#endif
158
159#if defined(__H8300S__)
160enum { sci_disable, sci_enable };
161
162static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
163{
164 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
165 int ch = (port->mapbase - SMR0) >> 3;
166 unsigned char mask = 1 << (ch+1);
167
168 if (ctrl == sci_disable)
169 *mstpcrl |= mask;
170 else
171 *mstpcrl &= ~mask;
172}
173
174static void h8300_sci_enable(struct uart_port *port)
175{
176 h8300_sci_config(port, sci_enable);
177}
178
179static void h8300_sci_disable(struct uart_port *port)
180{
181 h8300_sci_config(port, sci_disable);
182}
183#endif
184
185#if defined(__H8300H__) || defined(__H8300S__)
186static void sci_init_pins(struct uart_port *port, unsigned int cflag)
187{
188 int ch = (port->mapbase - SMR0) >> 3;
189
190
191 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
192 h8300_sci_pins[ch].rx,
193 H8300_GPIO_INPUT);
194 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
195 h8300_sci_pins[ch].tx,
196 H8300_GPIO_OUTPUT);
197
198
199 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
200}
201#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
202static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
203{
204 if (port->mapbase == 0xA4400000) {
205 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
206 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
207 } else if (port->mapbase == 0xA4410000)
208 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
209}
210#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
211static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
212{
213 unsigned short data;
214
215 if (cflag & CRTSCTS) {
216
217 if (port->mapbase == 0xa4430000) {
218
219 data = __raw_readw(PORT_PTCR);
220 __raw_writew((data & 0xfc03), PORT_PTCR);
221 } else if (port->mapbase == 0xa4438000) {
222
223 data = __raw_readw(PORT_PVCR);
224 __raw_writew((data & 0xfc03), PORT_PVCR);
225 }
226 } else {
227 if (port->mapbase == 0xa4430000) {
228
229 data = __raw_readw(PORT_PTCR);
230 __raw_writew((data & 0xffc3), PORT_PTCR);
231 } else if (port->mapbase == 0xa4438000) {
232
233 data = __raw_readw(PORT_PVCR);
234 __raw_writew((data & 0xffc3), PORT_PVCR);
235 }
236 }
237}
238#elif defined(CONFIG_CPU_SH3)
239
240static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
241{
242 unsigned short data;
243
244
245 data = __raw_readw(SCPCR);
246
247 __raw_writew(data & 0x0fcf, SCPCR);
248
249 if (!(cflag & CRTSCTS)) {
250
251 data = __raw_readw(SCPCR);
252
253
254 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
255
256 data = ctrl_inb(SCPDR);
257
258 ctrl_outb(data & 0xbf, SCPDR);
259 }
260}
261#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
262static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
263{
264 unsigned short data;
265
266 if (port->mapbase == 0xffe00000) {
267 data = __raw_readw(PSCR);
268 data &= ~0x03cf;
269 if (!(cflag & CRTSCTS))
270 data |= 0x0340;
271
272 __raw_writew(data, PSCR);
273 }
274}
275#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
276 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
277 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
278 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
279 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
280 defined(CONFIG_CPU_SUBTYPE_SHX3)
281static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
282{
283 if (!(cflag & CRTSCTS))
284 __raw_writew(0x0080, SCSPTR0);
285}
286#elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
287static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
288{
289 if (!(cflag & CRTSCTS))
290 __raw_writew(0x0080, SCSPTR2);
291}
292#else
293static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
294{
295
296}
297#endif
298
299#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
300 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
301 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
302 defined(CONFIG_CPU_SUBTYPE_SH7786)
303static inline int scif_txroom(struct uart_port *port)
304{
305 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
306}
307
308static inline int scif_rxroom(struct uart_port *port)
309{
310 return sci_in(port, SCRFDR) & 0xff;
311}
312#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
313static inline int scif_txroom(struct uart_port *port)
314{
315 if ((port->mapbase == 0xffe00000) ||
316 (port->mapbase == 0xffe08000)) {
317
318 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
319 } else {
320
321 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
322 }
323}
324
325static inline int scif_rxroom(struct uart_port *port)
326{
327 if ((port->mapbase == 0xffe00000) ||
328 (port->mapbase == 0xffe08000)) {
329
330 return sci_in(port, SCRFDR) & 0xff;
331 } else {
332
333 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
334 }
335}
336#else
337static inline int scif_txroom(struct uart_port *port)
338{
339 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
340}
341
342static inline int scif_rxroom(struct uart_port *port)
343{
344 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
345}
346#endif
347
348static inline int sci_txroom(struct uart_port *port)
349{
350 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
351}
352
353static inline int sci_rxroom(struct uart_port *port)
354{
355 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
356}
357
358
359
360
361
362static void sci_transmit_chars(struct uart_port *port)
363{
364 struct circ_buf *xmit = &port->state->xmit;
365 unsigned int stopped = uart_tx_stopped(port);
366 unsigned short status;
367 unsigned short ctrl;
368 int count;
369
370 status = sci_in(port, SCxSR);
371 if (!(status & SCxSR_TDxE(port))) {
372 ctrl = sci_in(port, SCSCR);
373 if (uart_circ_empty(xmit))
374 ctrl &= ~SCI_CTRL_FLAGS_TIE;
375 else
376 ctrl |= SCI_CTRL_FLAGS_TIE;
377 sci_out(port, SCSCR, ctrl);
378 return;
379 }
380
381 if (port->type == PORT_SCI)
382 count = sci_txroom(port);
383 else
384 count = scif_txroom(port);
385
386 do {
387 unsigned char c;
388
389 if (port->x_char) {
390 c = port->x_char;
391 port->x_char = 0;
392 } else if (!uart_circ_empty(xmit) && !stopped) {
393 c = xmit->buf[xmit->tail];
394 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
395 } else {
396 break;
397 }
398
399 sci_out(port, SCxTDR, c);
400
401 port->icount.tx++;
402 } while (--count > 0);
403
404 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
405
406 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
407 uart_write_wakeup(port);
408 if (uart_circ_empty(xmit)) {
409 sci_stop_tx(port);
410 } else {
411 ctrl = sci_in(port, SCSCR);
412
413 if (port->type != PORT_SCI) {
414 sci_in(port, SCxSR);
415 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
416 }
417
418 ctrl |= SCI_CTRL_FLAGS_TIE;
419 sci_out(port, SCSCR, ctrl);
420 }
421}
422
423
424#define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
425
426static inline void sci_receive_chars(struct uart_port *port)
427{
428 struct sci_port *sci_port = to_sci_port(port);
429 struct tty_struct *tty = port->state->port.tty;
430 int i, count, copied = 0;
431 unsigned short status;
432 unsigned char flag;
433
434 status = sci_in(port, SCxSR);
435 if (!(status & SCxSR_RDxF(port)))
436 return;
437
438 while (1) {
439 if (port->type == PORT_SCI)
440 count = sci_rxroom(port);
441 else
442 count = scif_rxroom(port);
443
444
445 count = tty_buffer_request_room(tty, count);
446
447
448 if (count == 0)
449 break;
450
451 if (port->type == PORT_SCI) {
452 char c = sci_in(port, SCxRDR);
453 if (uart_handle_sysrq_char(port, c) ||
454 sci_port->break_flag)
455 count = 0;
456 else
457 tty_insert_flip_char(tty, c, TTY_NORMAL);
458 } else {
459 for (i = 0; i < count; i++) {
460 char c = sci_in(port, SCxRDR);
461 status = sci_in(port, SCxSR);
462#if defined(CONFIG_CPU_SH3)
463
464 if (sci_port->break_flag) {
465 if ((c == 0) &&
466 (status & SCxSR_FER(port))) {
467 count--; i--;
468 continue;
469 }
470
471
472 dev_dbg(port->dev, "debounce<%02x>\n", c);
473 sci_port->break_flag = 0;
474
475 if (STEPFN(c)) {
476 count--; i--;
477 continue;
478 }
479 }
480#endif
481 if (uart_handle_sysrq_char(port, c)) {
482 count--; i--;
483 continue;
484 }
485
486
487 if (status&SCxSR_FER(port)) {
488 flag = TTY_FRAME;
489 dev_notice(port->dev, "frame error\n");
490 } else if (status&SCxSR_PER(port)) {
491 flag = TTY_PARITY;
492 dev_notice(port->dev, "parity error\n");
493 } else
494 flag = TTY_NORMAL;
495
496 tty_insert_flip_char(tty, c, flag);
497 }
498 }
499
500 sci_in(port, SCxSR);
501 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
502
503 copied += count;
504 port->icount.rx += count;
505 }
506
507 if (copied) {
508
509 tty_flip_buffer_push(tty);
510 } else {
511 sci_in(port, SCxSR);
512 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
513 }
514}
515
516#define SCI_BREAK_JIFFIES (HZ/20)
517
518
519
520
521
522
523
524static void sci_schedule_break_timer(struct sci_port *port)
525{
526 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
527 add_timer(&port->break_timer);
528}
529
530static void sci_break_timer(unsigned long data)
531{
532 struct sci_port *port = (struct sci_port *)data;
533
534 if (sci_rxd_in(&port->port) == 0) {
535 port->break_flag = 1;
536 sci_schedule_break_timer(port);
537 } else if (port->break_flag == 1) {
538
539 port->break_flag = 2;
540 sci_schedule_break_timer(port);
541 } else
542 port->break_flag = 0;
543}
544
545static inline int sci_handle_errors(struct uart_port *port)
546{
547 int copied = 0;
548 unsigned short status = sci_in(port, SCxSR);
549 struct tty_struct *tty = port->state->port.tty;
550
551 if (status & SCxSR_ORER(port)) {
552
553 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
554 copied++;
555
556 dev_notice(port->dev, "overrun error");
557 }
558
559 if (status & SCxSR_FER(port)) {
560 if (sci_rxd_in(port) == 0) {
561
562 struct sci_port *sci_port = to_sci_port(port);
563
564 if (!sci_port->break_flag) {
565 sci_port->break_flag = 1;
566 sci_schedule_break_timer(sci_port);
567
568
569 if (uart_handle_break(port))
570 return 0;
571
572 dev_dbg(port->dev, "BREAK detected\n");
573
574 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
575 copied++;
576 }
577
578 } else {
579
580 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
581 copied++;
582
583 dev_notice(port->dev, "frame error\n");
584 }
585 }
586
587 if (status & SCxSR_PER(port)) {
588
589 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
590 copied++;
591
592 dev_notice(port->dev, "parity error");
593 }
594
595 if (copied)
596 tty_flip_buffer_push(tty);
597
598 return copied;
599}
600
601static inline int sci_handle_fifo_overrun(struct uart_port *port)
602{
603 struct tty_struct *tty = port->state->port.tty;
604 int copied = 0;
605
606 if (port->type != PORT_SCIF)
607 return 0;
608
609 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
610 sci_out(port, SCLSR, 0);
611
612 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
613 tty_flip_buffer_push(tty);
614
615 dev_notice(port->dev, "overrun error\n");
616 copied++;
617 }
618
619 return copied;
620}
621
622static inline int sci_handle_breaks(struct uart_port *port)
623{
624 int copied = 0;
625 unsigned short status = sci_in(port, SCxSR);
626 struct tty_struct *tty = port->state->port.tty;
627 struct sci_port *s = to_sci_port(port);
628
629 if (uart_handle_break(port))
630 return 0;
631
632 if (!s->break_flag && status & SCxSR_BRK(port)) {
633#if defined(CONFIG_CPU_SH3)
634
635 s->break_flag = 1;
636#endif
637
638 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
639 copied++;
640
641 dev_dbg(port->dev, "BREAK detected\n");
642 }
643
644 if (copied)
645 tty_flip_buffer_push(tty);
646
647 copied += sci_handle_fifo_overrun(port);
648
649 return copied;
650}
651
652static irqreturn_t sci_rx_interrupt(int irq, void *port)
653{
654
655
656
657
658 sci_receive_chars(port);
659
660 return IRQ_HANDLED;
661}
662
663static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
664{
665 struct uart_port *port = ptr;
666 unsigned long flags;
667
668 spin_lock_irqsave(&port->lock, flags);
669 sci_transmit_chars(port);
670 spin_unlock_irqrestore(&port->lock, flags);
671
672 return IRQ_HANDLED;
673}
674
675static irqreturn_t sci_er_interrupt(int irq, void *ptr)
676{
677 struct uart_port *port = ptr;
678
679
680 if (port->type == PORT_SCI) {
681 if (sci_handle_errors(port)) {
682
683 sci_in(port, SCxSR);
684 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
685 }
686 } else {
687 sci_handle_fifo_overrun(port);
688 sci_rx_interrupt(irq, ptr);
689 }
690
691 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
692
693
694 sci_tx_interrupt(irq, ptr);
695
696 return IRQ_HANDLED;
697}
698
699static irqreturn_t sci_br_interrupt(int irq, void *ptr)
700{
701 struct uart_port *port = ptr;
702
703
704 sci_handle_breaks(port);
705 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
706
707 return IRQ_HANDLED;
708}
709
710static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
711{
712 unsigned short ssr_status, scr_status, err_enabled;
713 struct uart_port *port = ptr;
714 irqreturn_t ret = IRQ_NONE;
715
716 ssr_status = sci_in(port, SCxSR);
717 scr_status = sci_in(port, SCSCR);
718 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
719
720
721 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE))
722 ret = sci_tx_interrupt(irq, ptr);
723
724 if ((ssr_status & SCxSR_RDxF(port)) && (scr_status & SCI_CTRL_FLAGS_RIE))
725 ret = sci_rx_interrupt(irq, ptr);
726
727 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
728 ret = sci_er_interrupt(irq, ptr);
729
730 if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
731 ret = sci_br_interrupt(irq, ptr);
732
733 return ret;
734}
735
736#ifdef CONFIG_HAVE_CLK
737
738
739
740
741static int sci_notifier(struct notifier_block *self,
742 unsigned long phase, void *p)
743{
744 struct sh_sci_priv *priv = container_of(self,
745 struct sh_sci_priv, clk_nb);
746 struct sci_port *sci_port;
747 unsigned long flags;
748
749 if ((phase == CPUFREQ_POSTCHANGE) ||
750 (phase == CPUFREQ_RESUMECHANGE)) {
751 spin_lock_irqsave(&priv->lock, flags);
752 list_for_each_entry(sci_port, &priv->ports, node)
753 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
754
755 spin_unlock_irqrestore(&priv->lock, flags);
756 }
757
758 return NOTIFY_OK;
759}
760
761static void sci_clk_enable(struct uart_port *port)
762{
763 struct sci_port *sci_port = to_sci_port(port);
764
765 clk_enable(sci_port->dclk);
766 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
767
768 if (sci_port->iclk)
769 clk_enable(sci_port->iclk);
770}
771
772static void sci_clk_disable(struct uart_port *port)
773{
774 struct sci_port *sci_port = to_sci_port(port);
775
776 if (sci_port->iclk)
777 clk_disable(sci_port->iclk);
778
779 clk_disable(sci_port->dclk);
780}
781#endif
782
783static int sci_request_irq(struct sci_port *port)
784{
785 int i;
786 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
787 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
788 sci_br_interrupt,
789 };
790 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
791 "SCI Transmit Data Empty", "SCI Break" };
792
793 if (port->irqs[0] == port->irqs[1]) {
794 if (unlikely(!port->irqs[0]))
795 return -ENODEV;
796
797 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
798 IRQF_DISABLED, "sci", port)) {
799 dev_err(port->port.dev, "Can't allocate IRQ\n");
800 return -ENODEV;
801 }
802 } else {
803 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
804 if (unlikely(!port->irqs[i]))
805 continue;
806
807 if (request_irq(port->irqs[i], handlers[i],
808 IRQF_DISABLED, desc[i], port)) {
809 dev_err(port->port.dev, "Can't allocate IRQ\n");
810 return -ENODEV;
811 }
812 }
813 }
814
815 return 0;
816}
817
818static void sci_free_irq(struct sci_port *port)
819{
820 int i;
821
822 if (port->irqs[0] == port->irqs[1])
823 free_irq(port->irqs[0], port);
824 else {
825 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
826 if (!port->irqs[i])
827 continue;
828
829 free_irq(port->irqs[i], port);
830 }
831 }
832}
833
834static unsigned int sci_tx_empty(struct uart_port *port)
835{
836
837 return TIOCSER_TEMT;
838}
839
840static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
841{
842
843
844
845}
846
847static unsigned int sci_get_mctrl(struct uart_port *port)
848{
849
850
851
852 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
853}
854
855static void sci_start_tx(struct uart_port *port)
856{
857 unsigned short ctrl;
858
859
860 ctrl = sci_in(port, SCSCR);
861 ctrl |= SCI_CTRL_FLAGS_TIE;
862 sci_out(port, SCSCR, ctrl);
863}
864
865static void sci_stop_tx(struct uart_port *port)
866{
867 unsigned short ctrl;
868
869
870 ctrl = sci_in(port, SCSCR);
871 ctrl &= ~SCI_CTRL_FLAGS_TIE;
872 sci_out(port, SCSCR, ctrl);
873}
874
875static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
876{
877 unsigned short ctrl;
878
879
880 ctrl = sci_in(port, SCSCR);
881 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
882 sci_out(port, SCSCR, ctrl);
883}
884
885static void sci_stop_rx(struct uart_port *port)
886{
887 unsigned short ctrl;
888
889
890 ctrl = sci_in(port, SCSCR);
891 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
892 sci_out(port, SCSCR, ctrl);
893}
894
895static void sci_enable_ms(struct uart_port *port)
896{
897
898}
899
900static void sci_break_ctl(struct uart_port *port, int break_state)
901{
902
903}
904
905static int sci_startup(struct uart_port *port)
906{
907 struct sci_port *s = to_sci_port(port);
908
909 if (s->enable)
910 s->enable(port);
911
912 sci_request_irq(s);
913 sci_start_tx(port);
914 sci_start_rx(port, 1);
915
916 return 0;
917}
918
919static void sci_shutdown(struct uart_port *port)
920{
921 struct sci_port *s = to_sci_port(port);
922
923 sci_stop_rx(port);
924 sci_stop_tx(port);
925 sci_free_irq(s);
926
927 if (s->disable)
928 s->disable(port);
929}
930
931static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
932 struct ktermios *old)
933{
934 unsigned int status, baud, smr_val;
935 int t = -1;
936
937 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
938 if (likely(baud))
939 t = SCBRR_VALUE(baud, port->uartclk);
940
941 do {
942 status = sci_in(port, SCxSR);
943 } while (!(status & SCxSR_TEND(port)));
944
945 sci_out(port, SCSCR, 0x00);
946
947 if (port->type != PORT_SCI)
948 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
949
950 smr_val = sci_in(port, SCSMR) & 3;
951 if ((termios->c_cflag & CSIZE) == CS7)
952 smr_val |= 0x40;
953 if (termios->c_cflag & PARENB)
954 smr_val |= 0x20;
955 if (termios->c_cflag & PARODD)
956 smr_val |= 0x30;
957 if (termios->c_cflag & CSTOPB)
958 smr_val |= 0x08;
959
960 uart_update_timeout(port, termios->c_cflag, baud);
961
962 sci_out(port, SCSMR, smr_val);
963
964 if (t > 0) {
965 if (t >= 256) {
966 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
967 t >>= 2;
968 } else
969 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
970
971 sci_out(port, SCBRR, t);
972 udelay((1000000+(baud-1)) / baud);
973 }
974
975 sci_init_pins(port, termios->c_cflag);
976 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
977
978 sci_out(port, SCSCR, SCSCR_INIT(port));
979
980 if ((termios->c_cflag & CREAD) != 0)
981 sci_start_rx(port, 0);
982}
983
984static const char *sci_type(struct uart_port *port)
985{
986 switch (port->type) {
987 case PORT_IRDA:
988 return "irda";
989 case PORT_SCI:
990 return "sci";
991 case PORT_SCIF:
992 return "scif";
993 case PORT_SCIFA:
994 return "scifa";
995 }
996
997 return NULL;
998}
999
1000static void sci_release_port(struct uart_port *port)
1001{
1002
1003}
1004
1005static int sci_request_port(struct uart_port *port)
1006{
1007
1008 return 0;
1009}
1010
1011static void sci_config_port(struct uart_port *port, int flags)
1012{
1013 struct sci_port *s = to_sci_port(port);
1014
1015 port->type = s->type;
1016
1017 if (port->membase)
1018 return;
1019
1020 if (port->flags & UPF_IOREMAP) {
1021 port->membase = ioremap_nocache(port->mapbase, 0x40);
1022
1023 if (IS_ERR(port->membase))
1024 dev_err(port->dev, "can't remap port#%d\n", port->line);
1025 } else {
1026
1027
1028
1029
1030
1031 port->membase = (void __iomem *)port->mapbase;
1032 }
1033}
1034
1035static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1036{
1037 struct sci_port *s = to_sci_port(port);
1038
1039 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1040 return -EINVAL;
1041 if (ser->baud_base < 2400)
1042
1043 return -EINVAL;
1044
1045 return 0;
1046}
1047
1048static struct uart_ops sci_uart_ops = {
1049 .tx_empty = sci_tx_empty,
1050 .set_mctrl = sci_set_mctrl,
1051 .get_mctrl = sci_get_mctrl,
1052 .start_tx = sci_start_tx,
1053 .stop_tx = sci_stop_tx,
1054 .stop_rx = sci_stop_rx,
1055 .enable_ms = sci_enable_ms,
1056 .break_ctl = sci_break_ctl,
1057 .startup = sci_startup,
1058 .shutdown = sci_shutdown,
1059 .set_termios = sci_set_termios,
1060 .type = sci_type,
1061 .release_port = sci_release_port,
1062 .request_port = sci_request_port,
1063 .config_port = sci_config_port,
1064 .verify_port = sci_verify_port,
1065#ifdef CONFIG_CONSOLE_POLL
1066 .poll_get_char = sci_poll_get_char,
1067 .poll_put_char = sci_poll_put_char,
1068#endif
1069};
1070
1071static void __devinit sci_init_single(struct platform_device *dev,
1072 struct sci_port *sci_port,
1073 unsigned int index,
1074 struct plat_sci_port *p)
1075{
1076 sci_port->port.ops = &sci_uart_ops;
1077 sci_port->port.iotype = UPIO_MEM;
1078 sci_port->port.line = index;
1079 sci_port->port.fifosize = 1;
1080
1081#if defined(__H8300H__) || defined(__H8300S__)
1082#ifdef __H8300S__
1083 sci_port->enable = h8300_sci_enable;
1084 sci_port->disable = h8300_sci_disable;
1085#endif
1086 sci_port->port.uartclk = CONFIG_CPU_CLOCK;
1087#elif defined(CONFIG_HAVE_CLK)
1088 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1089 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
1090 sci_port->enable = sci_clk_enable;
1091 sci_port->disable = sci_clk_disable;
1092#else
1093#error "Need a valid uartclk"
1094#endif
1095
1096 sci_port->break_timer.data = (unsigned long)sci_port;
1097 sci_port->break_timer.function = sci_break_timer;
1098 init_timer(&sci_port->break_timer);
1099
1100 sci_port->port.mapbase = p->mapbase;
1101 sci_port->port.membase = p->membase;
1102
1103 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1104 sci_port->port.flags = p->flags;
1105 sci_port->port.dev = &dev->dev;
1106 sci_port->type = sci_port->port.type = p->type;
1107
1108 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1109
1110}
1111
1112#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1113static struct tty_driver *serial_console_device(struct console *co, int *index)
1114{
1115 struct uart_driver *p = &sci_uart_driver;
1116 *index = co->index;
1117 return p->tty_driver;
1118}
1119
1120static void serial_console_putchar(struct uart_port *port, int ch)
1121{
1122 sci_poll_put_char(port, ch);
1123}
1124
1125
1126
1127
1128
1129static void serial_console_write(struct console *co, const char *s,
1130 unsigned count)
1131{
1132 struct uart_port *port = co->data;
1133 struct sci_port *sci_port = to_sci_port(port);
1134 unsigned short bits;
1135
1136 if (sci_port->enable)
1137 sci_port->enable(port);
1138
1139 uart_console_write(port, s, count, serial_console_putchar);
1140
1141
1142 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1143 while ((sci_in(port, SCxSR) & bits) != bits)
1144 cpu_relax();
1145
1146 if (sci_port->disable)
1147 sci_port->disable(port);
1148}
1149
1150static int __init serial_console_setup(struct console *co, char *options)
1151{
1152 struct sci_port *sci_port;
1153 struct uart_port *port;
1154 int baud = 115200;
1155 int bits = 8;
1156 int parity = 'n';
1157 int flow = 'n';
1158 int ret;
1159
1160
1161
1162
1163
1164
1165 if (co->index >= SCI_NPORTS)
1166 co->index = 0;
1167
1168 sci_port = &sci_ports[co->index];
1169 port = &sci_port->port;
1170 co->data = port;
1171
1172
1173
1174
1175
1176
1177
1178 if (!port->type)
1179 return -ENODEV;
1180
1181 sci_config_port(port, 0);
1182
1183 if (sci_port->enable)
1184 sci_port->enable(port);
1185
1186 if (options)
1187 uart_parse_options(options, &baud, &parity, &bits, &flow);
1188
1189 ret = uart_set_options(port, co, baud, parity, bits, flow);
1190#if defined(__H8300H__) || defined(__H8300S__)
1191
1192 if (ret == 0)
1193 sci_stop_rx(port);
1194#endif
1195
1196 return ret;
1197}
1198
1199static struct console serial_console = {
1200 .name = "ttySC",
1201 .device = serial_console_device,
1202 .write = serial_console_write,
1203 .setup = serial_console_setup,
1204 .flags = CON_PRINTBUFFER,
1205 .index = -1,
1206};
1207
1208static int __init sci_console_init(void)
1209{
1210 register_console(&serial_console);
1211 return 0;
1212}
1213console_initcall(sci_console_init);
1214#endif
1215
1216#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1217#define SCI_CONSOLE (&serial_console)
1218#else
1219#define SCI_CONSOLE 0
1220#endif
1221
1222static char banner[] __initdata =
1223 KERN_INFO "SuperH SCI(F) driver initialized\n";
1224
1225static struct uart_driver sci_uart_driver = {
1226 .owner = THIS_MODULE,
1227 .driver_name = "sci",
1228 .dev_name = "ttySC",
1229 .major = SCI_MAJOR,
1230 .minor = SCI_MINOR_START,
1231 .nr = SCI_NPORTS,
1232 .cons = SCI_CONSOLE,
1233};
1234
1235
1236static int sci_remove(struct platform_device *dev)
1237{
1238 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1239 struct sci_port *p;
1240 unsigned long flags;
1241
1242#ifdef CONFIG_HAVE_CLK
1243 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1244#endif
1245
1246 spin_lock_irqsave(&priv->lock, flags);
1247 list_for_each_entry(p, &priv->ports, node)
1248 uart_remove_one_port(&sci_uart_driver, &p->port);
1249
1250 spin_unlock_irqrestore(&priv->lock, flags);
1251
1252 kfree(priv);
1253 return 0;
1254}
1255
1256static int __devinit sci_probe_single(struct platform_device *dev,
1257 unsigned int index,
1258 struct plat_sci_port *p,
1259 struct sci_port *sciport)
1260{
1261 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1262 unsigned long flags;
1263 int ret;
1264
1265
1266 if (unlikely(index >= SCI_NPORTS)) {
1267 dev_notice(&dev->dev, "Attempting to register port "
1268 "%d when only %d are available.\n",
1269 index+1, SCI_NPORTS);
1270 dev_notice(&dev->dev, "Consider bumping "
1271 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1272 return 0;
1273 }
1274
1275 sci_init_single(dev, sciport, index, p);
1276
1277 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1278 if (ret)
1279 return ret;
1280
1281 INIT_LIST_HEAD(&sciport->node);
1282
1283 spin_lock_irqsave(&priv->lock, flags);
1284 list_add(&sciport->node, &priv->ports);
1285 spin_unlock_irqrestore(&priv->lock, flags);
1286
1287 return 0;
1288}
1289
1290
1291
1292
1293
1294
1295
1296static int __devinit sci_probe(struct platform_device *dev)
1297{
1298 struct plat_sci_port *p = dev->dev.platform_data;
1299 struct sh_sci_priv *priv;
1300 int i, ret = -EINVAL;
1301
1302 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1303 if (!priv)
1304 return -ENOMEM;
1305
1306 INIT_LIST_HEAD(&priv->ports);
1307 spin_lock_init(&priv->lock);
1308 platform_set_drvdata(dev, priv);
1309
1310#ifdef CONFIG_HAVE_CLK
1311 priv->clk_nb.notifier_call = sci_notifier;
1312 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1313#endif
1314
1315 if (dev->id != -1) {
1316 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1317 if (ret)
1318 goto err_unreg;
1319 } else {
1320 for (i = 0; p && p->flags != 0; p++, i++) {
1321 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1322 if (ret)
1323 goto err_unreg;
1324 }
1325 }
1326
1327#ifdef CONFIG_SH_STANDARD_BIOS
1328 sh_bios_gdb_detach();
1329#endif
1330
1331 return 0;
1332
1333err_unreg:
1334 sci_remove(dev);
1335 return ret;
1336}
1337
1338static int sci_suspend(struct device *dev)
1339{
1340 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1341 struct sci_port *p;
1342 unsigned long flags;
1343
1344 spin_lock_irqsave(&priv->lock, flags);
1345 list_for_each_entry(p, &priv->ports, node)
1346 uart_suspend_port(&sci_uart_driver, &p->port);
1347 spin_unlock_irqrestore(&priv->lock, flags);
1348
1349 return 0;
1350}
1351
1352static int sci_resume(struct device *dev)
1353{
1354 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1355 struct sci_port *p;
1356 unsigned long flags;
1357
1358 spin_lock_irqsave(&priv->lock, flags);
1359 list_for_each_entry(p, &priv->ports, node)
1360 uart_resume_port(&sci_uart_driver, &p->port);
1361 spin_unlock_irqrestore(&priv->lock, flags);
1362
1363 return 0;
1364}
1365
1366static struct dev_pm_ops sci_dev_pm_ops = {
1367 .suspend = sci_suspend,
1368 .resume = sci_resume,
1369};
1370
1371static struct platform_driver sci_driver = {
1372 .probe = sci_probe,
1373 .remove = __devexit_p(sci_remove),
1374 .driver = {
1375 .name = "sh-sci",
1376 .owner = THIS_MODULE,
1377 .pm = &sci_dev_pm_ops,
1378 },
1379};
1380
1381static int __init sci_init(void)
1382{
1383 int ret;
1384
1385 printk(banner);
1386
1387 ret = uart_register_driver(&sci_uart_driver);
1388 if (likely(ret == 0)) {
1389 ret = platform_driver_register(&sci_driver);
1390 if (unlikely(ret))
1391 uart_unregister_driver(&sci_uart_driver);
1392 }
1393
1394 return ret;
1395}
1396
1397static void __exit sci_exit(void)
1398{
1399 platform_driver_unregister(&sci_driver);
1400 uart_unregister_driver(&sci_uart_driver);
1401}
1402
1403module_init(sci_init);
1404module_exit(sci_exit);
1405
1406MODULE_LICENSE("GPL");
1407MODULE_ALIAS("platform:sh-sci");
1408