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77#include <linux/interrupt.h>
78#include "../comedidev.h"
79#include <linux/ioport.h>
80
81
82
83#define DMM32AT_MEMSIZE 0x10
84
85#define DMM32AT_CONV 0x00
86#define DMM32AT_AILSB 0x00
87#define DMM32AT_AUXDOUT 0x01
88#define DMM32AT_AIMSB 0x01
89#define DMM32AT_AILOW 0x02
90#define DMM32AT_AIHIGH 0x03
91
92#define DMM32AT_DACLSB 0x04
93#define DMM32AT_DACSTAT 0x04
94#define DMM32AT_DACMSB 0x05
95
96#define DMM32AT_FIFOCNTRL 0x07
97#define DMM32AT_FIFOSTAT 0x07
98
99#define DMM32AT_CNTRL 0x08
100#define DMM32AT_AISTAT 0x08
101
102#define DMM32AT_INTCLOCK 0x09
103
104#define DMM32AT_CNTRDIO 0x0a
105
106#define DMM32AT_AICONF 0x0b
107#define DMM32AT_AIRBACK 0x0b
108
109#define DMM32AT_CLK1 0x0d
110#define DMM32AT_CLK2 0x0e
111#define DMM32AT_CLKCT 0x0f
112
113#define DMM32AT_DIOA 0x0c
114#define DMM32AT_DIOB 0x0d
115#define DMM32AT_DIOC 0x0e
116#define DMM32AT_DIOCONF 0x0f
117
118#define dmm_inb(cdev, reg) inb((cdev->iobase)+reg)
119#define dmm_outb(cdev, reg, valu) outb(valu, (cdev->iobase)+reg)
120
121
122
123
124#define DMM32AT_DACBUSY 0x80
125
126
127#define DMM32AT_FIFORESET 0x02
128#define DMM32AT_SCANENABLE 0x04
129
130
131#define DMM32AT_RESET 0x20
132#define DMM32AT_INTRESET 0x08
133#define DMM32AT_CLKACC 0x00
134#define DMM32AT_DIOACC 0x01
135
136
137#define DMM32AT_STATUS 0x80
138
139
140#define DMM32AT_ADINT 0x80
141#define DMM32AT_CLKSEL 0x03
142
143
144#define DMM32AT_FREQ12 0x80
145
146
147#define DMM32AT_RANGE_U10 0x0c
148#define DMM32AT_RANGE_U5 0x0d
149#define DMM32AT_RANGE_B10 0x08
150#define DMM32AT_RANGE_B5 0x00
151#define DMM32AT_SCINT_20 0x00
152#define DMM32AT_SCINT_15 0x10
153#define DMM32AT_SCINT_10 0x20
154#define DMM32AT_SCINT_5 0x30
155
156
157#define DMM32AT_CLKCT1 0x56
158#define DMM32AT_CLKCT2 0xb6
159
160
161#define DMM32AT_DIENABLE 0x80
162#define DMM32AT_DIRA 0x10
163#define DMM32AT_DIRB 0x02
164#define DMM32AT_DIRCL 0x01
165#define DMM32AT_DIRCH 0x08
166
167
168static const struct comedi_lrange dmm32at_airanges = {
169 4,
170 {
171 UNI_RANGE(10),
172 UNI_RANGE(5),
173 BIP_RANGE(10),
174 BIP_RANGE(5),
175 }
176};
177
178
179static const unsigned char dmm32at_rangebits[] = {
180 DMM32AT_RANGE_U10,
181 DMM32AT_RANGE_U5,
182 DMM32AT_RANGE_B10,
183 DMM32AT_RANGE_B5,
184};
185
186
187
188
189static const struct comedi_lrange dmm32at_aoranges = {
190 4,
191 {
192 UNI_RANGE(10),
193 UNI_RANGE(5),
194 BIP_RANGE(10),
195 BIP_RANGE(5),
196 }
197};
198
199
200
201
202
203
204struct dmm32at_board {
205 const char *name;
206 int ai_chans;
207 int ai_bits;
208 const struct comedi_lrange *ai_ranges;
209 int ao_chans;
210 int ao_bits;
211 const struct comedi_lrange *ao_ranges;
212 int have_dio;
213 int dio_chans;
214};
215static const struct dmm32at_board dmm32at_boards[] = {
216 {
217 .name = "dmm32at",
218 .ai_chans = 32,
219 .ai_bits = 16,
220 .ai_ranges = &dmm32at_airanges,
221 .ao_chans = 4,
222 .ao_bits = 12,
223 .ao_ranges = &dmm32at_aoranges,
224 .have_dio = 1,
225 .dio_chans = 24,
226 },
227};
228
229
230
231
232#define thisboard ((const struct dmm32at_board *)dev->board_ptr)
233
234
235
236
237
238struct dmm32at_private {
239
240 int data;
241 int ai_inuse;
242 unsigned int ai_scans_left;
243
244
245 unsigned int ao_readback[4];
246 unsigned char dio_config;
247
248};
249
250
251
252
253
254#define devpriv ((struct dmm32at_private *)dev->private)
255
256
257
258
259
260
261
262static int dmm32at_attach(struct comedi_device *dev,
263 struct comedi_devconfig *it);
264static int dmm32at_detach(struct comedi_device *dev);
265static struct comedi_driver driver_dmm32at = {
266 .driver_name = "dmm32at",
267 .module = THIS_MODULE,
268 .attach = dmm32at_attach,
269 .detach = dmm32at_detach,
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288 .board_name = &dmm32at_boards[0].name,
289 .offset = sizeof(struct dmm32at_board),
290 .num_names = ARRAY_SIZE(dmm32at_boards),
291};
292
293
294static int dmm32at_ai_rinsn(struct comedi_device *dev,
295 struct comedi_subdevice *s,
296 struct comedi_insn *insn, unsigned int *data);
297static int dmm32at_ao_winsn(struct comedi_device *dev,
298 struct comedi_subdevice *s,
299 struct comedi_insn *insn, unsigned int *data);
300static int dmm32at_ao_rinsn(struct comedi_device *dev,
301 struct comedi_subdevice *s,
302 struct comedi_insn *insn, unsigned int *data);
303static int dmm32at_dio_insn_bits(struct comedi_device *dev,
304 struct comedi_subdevice *s,
305 struct comedi_insn *insn, unsigned int *data);
306static int dmm32at_dio_insn_config(struct comedi_device *dev,
307 struct comedi_subdevice *s,
308 struct comedi_insn *insn,
309 unsigned int *data);
310static int dmm32at_ai_cmdtest(struct comedi_device *dev,
311 struct comedi_subdevice *s,
312 struct comedi_cmd *cmd);
313static int dmm32at_ai_cmd(struct comedi_device *dev,
314 struct comedi_subdevice *s);
315static int dmm32at_ai_cancel(struct comedi_device *dev,
316 struct comedi_subdevice *s);
317static int dmm32at_ns_to_timer(unsigned int *ns, int round);
318static irqreturn_t dmm32at_isr(int irq, void *d);
319void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec);
320
321
322
323
324
325
326
327static int dmm32at_attach(struct comedi_device *dev,
328 struct comedi_devconfig *it)
329{
330 int ret;
331 struct comedi_subdevice *s;
332 unsigned char aihi, ailo, fifostat, aistat, intstat, airback;
333 unsigned long iobase;
334 unsigned int irq;
335
336 iobase = it->options[0];
337 irq = it->options[1];
338
339 printk("comedi%d: dmm32at: attaching\n", dev->minor);
340 printk("dmm32at: probing at address 0x%04lx, irq %u\n", iobase, irq);
341
342
343 if (!request_region(iobase, DMM32AT_MEMSIZE, thisboard->name)) {
344 printk("I/O port conflict\n");
345 return -EIO;
346 }
347 dev->iobase = iobase;
348
349
350
351
352
353 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_RESET);
354
355
356 udelay(1000);
357
358
359 dmm_outb(dev, DMM32AT_FIFOCNTRL, 0x0);
360
361
362 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
363
364
365 dmm_outb(dev, DMM32AT_AILOW, 0x80);
366 dmm_outb(dev, DMM32AT_AIHIGH, 0xff);
367
368
369 dmm_outb(dev, DMM32AT_AICONF, DMM32AT_RANGE_U10);
370
371
372 udelay(100);
373
374
375 ailo = dmm_inb(dev, DMM32AT_AILOW);
376 aihi = dmm_inb(dev, DMM32AT_AIHIGH);
377 fifostat = dmm_inb(dev, DMM32AT_FIFOSTAT);
378 aistat = dmm_inb(dev, DMM32AT_AISTAT);
379 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
380 airback = dmm_inb(dev, DMM32AT_AIRBACK);
381
382 printk("dmm32at: lo=0x%02x hi=0x%02x fifostat=0x%02x\n",
383 ailo, aihi, fifostat);
384 printk("dmm32at: aistat=0x%02x intstat=0x%02x airback=0x%02x\n",
385 aistat, intstat, airback);
386
387 if ((ailo != 0x00) || (aihi != 0x1f) || (fifostat != 0x80) ||
388 (aistat != 0x60 || (intstat != 0x00) || airback != 0x0c)) {
389 printk("dmmat32: board detection failed\n");
390 return -EIO;
391 }
392
393
394 if (irq) {
395 ret = request_irq(irq, dmm32at_isr, 0, thisboard->name, dev);
396 if (ret < 0) {
397 printk("irq conflict\n");
398 return ret;
399 }
400 dev->irq = irq;
401 }
402
403
404
405
406
407
408
409
410
411
412
413
414 dev->board_name = thisboard->name;
415
416
417
418
419
420 if (alloc_private(dev, sizeof(struct dmm32at_private)) < 0)
421 return -ENOMEM;
422
423
424
425
426
427 if (alloc_subdevices(dev, 3) < 0)
428 return -ENOMEM;
429
430 s = dev->subdevices + 0;
431 dev->read_subdev = s;
432
433 s->type = COMEDI_SUBD_AI;
434
435 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
436 s->n_chan = thisboard->ai_chans;
437 s->maxdata = (1 << thisboard->ai_bits) - 1;
438 s->range_table = thisboard->ai_ranges;
439 s->len_chanlist = 32;
440
441 s->insn_read = dmm32at_ai_rinsn;
442 s->do_cmd = dmm32at_ai_cmd;
443 s->do_cmdtest = dmm32at_ai_cmdtest;
444 s->cancel = dmm32at_ai_cancel;
445
446 s = dev->subdevices + 1;
447
448 s->type = COMEDI_SUBD_AO;
449 s->subdev_flags = SDF_WRITABLE;
450 s->n_chan = thisboard->ao_chans;
451 s->maxdata = (1 << thisboard->ao_bits) - 1;
452 s->range_table = thisboard->ao_ranges;
453 s->insn_write = dmm32at_ao_winsn;
454 s->insn_read = dmm32at_ao_rinsn;
455
456 s = dev->subdevices + 2;
457
458 if (thisboard->have_dio) {
459
460
461 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
462
463 devpriv->dio_config = DMM32AT_DIRA | DMM32AT_DIRB |
464 DMM32AT_DIRCL | DMM32AT_DIRCH | DMM32AT_DIENABLE;
465 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
466
467
468 s->type = COMEDI_SUBD_DIO;
469 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
470 s->n_chan = thisboard->dio_chans;
471 s->maxdata = 1;
472 s->state = 0;
473 s->range_table = &range_digital;
474 s->insn_bits = dmm32at_dio_insn_bits;
475 s->insn_config = dmm32at_dio_insn_config;
476 } else {
477 s->type = COMEDI_SUBD_UNUSED;
478 }
479
480
481 printk("comedi%d: dmm32at: attached\n", dev->minor);
482
483 return 1;
484
485}
486
487
488
489
490
491
492
493
494
495static int dmm32at_detach(struct comedi_device *dev)
496{
497 printk("comedi%d: dmm32at: remove\n", dev->minor);
498 if (dev->irq)
499 free_irq(dev->irq, dev);
500 if (dev->iobase)
501 release_region(dev->iobase, DMM32AT_MEMSIZE);
502
503 return 0;
504}
505
506
507
508
509
510
511static int dmm32at_ai_rinsn(struct comedi_device *dev,
512 struct comedi_subdevice *s,
513 struct comedi_insn *insn, unsigned int *data)
514{
515 int n, i;
516 unsigned int d;
517 unsigned char status;
518 unsigned short msb, lsb;
519 unsigned char chan;
520 int range;
521
522
523
524 chan = CR_CHAN(insn->chanspec) & (s->n_chan - 1);
525 range = CR_RANGE(insn->chanspec);
526
527
528
529
530 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
531
532
533 dmm_outb(dev, DMM32AT_AILOW, chan);
534 dmm_outb(dev, DMM32AT_AIHIGH, chan);
535
536 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
537
538
539 for (i = 0; i < 40000; i++) {
540 status = dmm_inb(dev, DMM32AT_AIRBACK);
541 if ((status & DMM32AT_STATUS) == 0)
542 break;
543 }
544 if (i == 40000) {
545 printk("timeout\n");
546 return -ETIMEDOUT;
547 }
548
549
550 for (n = 0; n < insn->n; n++) {
551
552 dmm_outb(dev, DMM32AT_CONV, 0xff);
553
554 for (i = 0; i < 40000; i++) {
555 status = dmm_inb(dev, DMM32AT_AISTAT);
556 if ((status & DMM32AT_STATUS) == 0)
557 break;
558 }
559 if (i == 40000) {
560 printk("timeout\n");
561 return -ETIMEDOUT;
562 }
563
564
565 lsb = dmm_inb(dev, DMM32AT_AILSB);
566 msb = dmm_inb(dev, DMM32AT_AIMSB);
567
568
569
570
571
572
573
574 d = ((msb ^ 0x0080) << 8) + lsb;
575
576 data[n] = d;
577 }
578
579
580 return n;
581}
582
583static int dmm32at_ai_cmdtest(struct comedi_device *dev,
584 struct comedi_subdevice *s,
585 struct comedi_cmd *cmd)
586{
587 int err = 0;
588 int tmp;
589 int start_chan, gain, i;
590
591
592
593
594
595
596
597
598
599
600
601
602 tmp = cmd->start_src;
603 cmd->start_src &= TRIG_NOW;
604 if (!cmd->start_src || tmp != cmd->start_src)
605 err++;
606
607 tmp = cmd->scan_begin_src;
608 cmd->scan_begin_src &= TRIG_TIMER ;
609 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
610 err++;
611
612 tmp = cmd->convert_src;
613 cmd->convert_src &= TRIG_TIMER ;
614 if (!cmd->convert_src || tmp != cmd->convert_src)
615 err++;
616
617 tmp = cmd->scan_end_src;
618 cmd->scan_end_src &= TRIG_COUNT;
619 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
620 err++;
621
622 tmp = cmd->stop_src;
623 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
624 if (!cmd->stop_src || tmp != cmd->stop_src)
625 err++;
626
627 if (err)
628 return 1;
629
630
631
632
633 if (cmd->scan_begin_src != TRIG_TIMER &&
634 cmd->scan_begin_src != TRIG_EXT)
635 err++;
636 if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
637 err++;
638 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
639 err++;
640
641 if (err)
642 return 2;
643
644
645
646 if (cmd->start_arg != 0) {
647 cmd->start_arg = 0;
648 err++;
649 }
650#define MAX_SCAN_SPEED 1000000
651#define MIN_SCAN_SPEED 1000000000
652
653 if (cmd->scan_begin_src == TRIG_TIMER) {
654 if (cmd->scan_begin_arg < MAX_SCAN_SPEED) {
655 cmd->scan_begin_arg = MAX_SCAN_SPEED;
656 err++;
657 }
658 if (cmd->scan_begin_arg > MIN_SCAN_SPEED) {
659 cmd->scan_begin_arg = MIN_SCAN_SPEED;
660 err++;
661 }
662 } else {
663
664
665
666 if (cmd->scan_begin_arg > 9) {
667 cmd->scan_begin_arg = 9;
668 err++;
669 }
670 }
671 if (cmd->convert_src == TRIG_TIMER) {
672 if (cmd->convert_arg >= 17500)
673 cmd->convert_arg = 20000;
674 else if (cmd->convert_arg >= 12500)
675 cmd->convert_arg = 15000;
676 else if (cmd->convert_arg >= 7500)
677 cmd->convert_arg = 10000;
678 else
679 cmd->convert_arg = 5000;
680
681 } else {
682
683
684 if (cmd->convert_arg > 9) {
685 cmd->convert_arg = 9;
686 err++;
687 }
688 }
689
690 if (cmd->scan_end_arg != cmd->chanlist_len) {
691 cmd->scan_end_arg = cmd->chanlist_len;
692 err++;
693 }
694 if (cmd->stop_src == TRIG_COUNT) {
695 if (cmd->stop_arg > 0xfffffff0) {
696 cmd->stop_arg = 0xfffffff0;
697 err++;
698 }
699 if (cmd->stop_arg == 0) {
700 cmd->stop_arg = 1;
701 err++;
702 }
703 } else {
704
705 if (cmd->stop_arg != 0) {
706 cmd->stop_arg = 0;
707 err++;
708 }
709 }
710
711 if (err)
712 return 3;
713
714
715
716 if (cmd->scan_begin_src == TRIG_TIMER) {
717 tmp = cmd->scan_begin_arg;
718 dmm32at_ns_to_timer(&cmd->scan_begin_arg,
719 cmd->flags & TRIG_ROUND_MASK);
720 if (tmp != cmd->scan_begin_arg)
721 err++;
722 }
723 if (cmd->convert_src == TRIG_TIMER) {
724 tmp = cmd->convert_arg;
725 dmm32at_ns_to_timer(&cmd->convert_arg,
726 cmd->flags & TRIG_ROUND_MASK);
727 if (tmp != cmd->convert_arg)
728 err++;
729 if (cmd->scan_begin_src == TRIG_TIMER &&
730 cmd->scan_begin_arg <
731 cmd->convert_arg * cmd->scan_end_arg) {
732 cmd->scan_begin_arg =
733 cmd->convert_arg * cmd->scan_end_arg;
734 err++;
735 }
736 }
737
738 if (err)
739 return 4;
740
741
742
743
744 if (cmd->chanlist) {
745 gain = CR_RANGE(cmd->chanlist[0]);
746 start_chan = CR_CHAN(cmd->chanlist[0]);
747 for (i = 1; i < cmd->chanlist_len; i++) {
748 if (CR_CHAN(cmd->chanlist[i]) !=
749 (start_chan + i) % s->n_chan) {
750 comedi_error(dev,
751 "entries in chanlist must be consecutive channels, counting upwards\n");
752 err++;
753 }
754 if (CR_RANGE(cmd->chanlist[i]) != gain) {
755 comedi_error(dev,
756 "entries in chanlist must all have the same gain\n");
757 err++;
758 }
759 }
760 }
761
762 if (err)
763 return 5;
764
765 return 0;
766}
767
768static int dmm32at_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
769{
770 struct comedi_cmd *cmd = &s->async->cmd;
771 int i, range;
772 unsigned char chanlo, chanhi, status;
773
774 if (!cmd->chanlist)
775 return -EINVAL;
776
777
778 chanlo = CR_CHAN(cmd->chanlist[0]) & (s->n_chan - 1);
779 chanhi = chanlo + cmd->chanlist_len - 1;
780 if (chanhi >= s->n_chan)
781 return -EINVAL;
782 range = CR_RANGE(cmd->chanlist[0]);
783
784
785 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
786
787
788 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_SCANENABLE);
789
790
791 dmm_outb(dev, DMM32AT_AILOW, chanlo);
792 dmm_outb(dev, DMM32AT_AIHIGH, chanhi);
793
794
795 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
796
797
798 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
799
800 if (cmd->stop_src == TRIG_COUNT)
801 devpriv->ai_scans_left = cmd->stop_arg;
802 else {
803 devpriv->ai_scans_left = 0xffffffff;
804 }
805
806
807 for (i = 0; i < 40000; i++) {
808 status = dmm_inb(dev, DMM32AT_AIRBACK);
809 if ((status & DMM32AT_STATUS) == 0)
810 break;
811 }
812 if (i == 40000) {
813 printk("timeout\n");
814 return -ETIMEDOUT;
815 }
816
817 if (devpriv->ai_scans_left > 1) {
818
819 dmm32at_setaitimer(dev, cmd->scan_begin_arg);
820 } else {
821
822 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT);
823 dmm_outb(dev, DMM32AT_CONV, 0xff);
824 }
825
826
827
828
829
830
831
832
833
834 return 0;
835
836}
837
838static int dmm32at_ai_cancel(struct comedi_device *dev,
839 struct comedi_subdevice *s)
840{
841 devpriv->ai_scans_left = 1;
842 return 0;
843}
844
845static irqreturn_t dmm32at_isr(int irq, void *d)
846{
847 unsigned char intstat;
848 unsigned int samp;
849 unsigned short msb, lsb;
850 int i;
851 struct comedi_device *dev = d;
852
853 if (!dev->attached) {
854 comedi_error(dev, "spurious interrupt");
855 return IRQ_HANDLED;
856 }
857
858 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
859
860 if (intstat & DMM32AT_ADINT) {
861 struct comedi_subdevice *s = dev->read_subdev;
862 struct comedi_cmd *cmd = &s->async->cmd;
863
864 for (i = 0; i < cmd->chanlist_len; i++) {
865
866 lsb = dmm_inb(dev, DMM32AT_AILSB);
867 msb = dmm_inb(dev, DMM32AT_AIMSB);
868
869
870 samp = ((msb ^ 0x0080) << 8) + lsb;
871 comedi_buf_put(s->async, samp);
872 }
873
874 if (devpriv->ai_scans_left != 0xffffffff) {
875 devpriv->ai_scans_left--;
876 if (devpriv->ai_scans_left == 0) {
877
878 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
879
880 s->async->events |= COMEDI_CB_EOA;
881 }
882
883 }
884
885 comedi_event(dev, s);
886 }
887
888
889 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
890 return IRQ_HANDLED;
891}
892
893
894
895
896
897
898static int dmm32at_ns_to_timer(unsigned int *ns, int round)
899{
900
901
902
903
904
905
906
907 return *ns;
908}
909
910static int dmm32at_ao_winsn(struct comedi_device *dev,
911 struct comedi_subdevice *s,
912 struct comedi_insn *insn, unsigned int *data)
913{
914 int i;
915 int chan = CR_CHAN(insn->chanspec);
916 unsigned char hi, lo, status;
917
918
919
920 for (i = 0; i < insn->n; i++) {
921
922 devpriv->ao_readback[chan] = data[i];
923
924
925 lo = data[i] & 0x00ff;
926
927 hi = (data[i] >> 8) + chan * (1 << 6);
928
929
930 dmm_outb(dev, DMM32AT_DACLSB, lo);
931 dmm_outb(dev, DMM32AT_DACMSB, hi);
932
933
934 for (i = 0; i < 40000; i++) {
935 status = dmm_inb(dev, DMM32AT_DACSTAT);
936 if ((status & DMM32AT_DACBUSY) == 0)
937 break;
938 }
939 if (i == 40000) {
940 printk("timeout\n");
941 return -ETIMEDOUT;
942 }
943
944 status = dmm_inb(dev, DMM32AT_DACMSB);
945
946 }
947
948
949 return i;
950}
951
952
953
954static int dmm32at_ao_rinsn(struct comedi_device *dev,
955 struct comedi_subdevice *s,
956 struct comedi_insn *insn, unsigned int *data)
957{
958 int i;
959 int chan = CR_CHAN(insn->chanspec);
960
961 for (i = 0; i < insn->n; i++)
962 data[i] = devpriv->ao_readback[chan];
963
964 return i;
965}
966
967
968
969
970
971
972static int dmm32at_dio_insn_bits(struct comedi_device *dev,
973 struct comedi_subdevice *s,
974 struct comedi_insn *insn, unsigned int *data)
975{
976 unsigned char diobits;
977
978 if (insn->n != 2)
979 return -EINVAL;
980
981
982
983 if (data[0]) {
984 s->state &= ~data[0];
985 s->state |= data[0] & data[1];
986
987
988 }
989
990
991 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
992
993
994 if (((devpriv->dio_config & DMM32AT_DIRCL) == 0) ||
995 ((devpriv->dio_config & DMM32AT_DIRCH) == 0)) {
996 diobits = (s->state & 0x00ff0000) >> 16;
997 dmm_outb(dev, DMM32AT_DIOC, diobits);
998 }
999 if ((devpriv->dio_config & DMM32AT_DIRB) == 0) {
1000 diobits = (s->state & 0x0000ff00) >> 8;
1001 dmm_outb(dev, DMM32AT_DIOB, diobits);
1002 }
1003 if ((devpriv->dio_config & DMM32AT_DIRA) == 0) {
1004 diobits = (s->state & 0x000000ff);
1005 dmm_outb(dev, DMM32AT_DIOA, diobits);
1006 }
1007
1008
1009 s->state = dmm_inb(dev, DMM32AT_DIOC);
1010 s->state <<= 8;
1011 s->state |= dmm_inb(dev, DMM32AT_DIOB);
1012 s->state <<= 8;
1013 s->state |= dmm_inb(dev, DMM32AT_DIOA);
1014 data[1] = s->state;
1015
1016
1017
1018
1019
1020
1021
1022
1023 return 2;
1024}
1025
1026static int dmm32at_dio_insn_config(struct comedi_device *dev,
1027 struct comedi_subdevice *s,
1028 struct comedi_insn *insn, unsigned int *data)
1029{
1030 unsigned char chanbit;
1031 int chan = CR_CHAN(insn->chanspec);
1032
1033 if (insn->n != 1)
1034 return -EINVAL;
1035
1036 if (chan < 8)
1037 chanbit = DMM32AT_DIRA;
1038 else if (chan < 16)
1039 chanbit = DMM32AT_DIRB;
1040 else if (chan < 20)
1041 chanbit = DMM32AT_DIRCL;
1042 else
1043 chanbit = DMM32AT_DIRCH;
1044
1045
1046
1047
1048
1049
1050
1051 if (data[0] == COMEDI_OUTPUT) {
1052 devpriv->dio_config &= ~chanbit;
1053 } else {
1054 devpriv->dio_config |= chanbit;
1055 }
1056
1057 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
1058
1059 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
1060
1061 return 1;
1062}
1063
1064void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec)
1065{
1066 unsigned char lo1, lo2, hi2;
1067 unsigned short both2;
1068
1069
1070 lo1 = 200;
1071 both2 = nansec / 20000;
1072 hi2 = (both2 & 0xff00) >> 8;
1073 lo2 = both2 & 0x00ff;
1074
1075
1076 dmm_outb(dev, DMM32AT_CNTRDIO, 0);
1077
1078
1079 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_CLKACC);
1080
1081
1082 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT1);
1083 dmm_outb(dev, DMM32AT_CLK1, lo1);
1084
1085
1086 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT2);
1087 dmm_outb(dev, DMM32AT_CLK2, lo2);
1088 dmm_outb(dev, DMM32AT_CLK2, hi2);
1089
1090
1091 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT | DMM32AT_CLKSEL);
1092
1093}
1094
1095
1096
1097
1098
1099COMEDI_INITCLEANUP(driver_dmm32at);
1100