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50#define _GNU_SOURCE
51#define DEBUG 1
52#define DEBUG_FLAGS
53#include <linux/interrupt.h>
54#include "../comedidev.h"
55
56#include "mite.h"
57
58#define NI6514_DIO_SIZE 4096
59#define NI6514_MITE_SIZE 4096
60
61#define NI_65XX_MAX_NUM_PORTS 12
62static const unsigned ni_65xx_channels_per_port = 8;
63static const unsigned ni_65xx_port_offset = 0x10;
64
65static inline unsigned Port_Data(unsigned port)
66{
67 return 0x40 + port * ni_65xx_port_offset;
68}
69
70static inline unsigned Port_Select(unsigned port)
71{
72 return 0x41 + port * ni_65xx_port_offset;
73}
74
75static inline unsigned Rising_Edge_Detection_Enable(unsigned port)
76{
77 return 0x42 + port * ni_65xx_port_offset;
78}
79
80static inline unsigned Falling_Edge_Detection_Enable(unsigned port)
81{
82 return 0x43 + port * ni_65xx_port_offset;
83}
84
85static inline unsigned Filter_Enable(unsigned port)
86{
87 return 0x44 + port * ni_65xx_port_offset;
88}
89
90#define ID_Register 0x00
91
92#define Clear_Register 0x01
93#define ClrEdge 0x08
94#define ClrOverflow 0x04
95
96#define Filter_Interval 0x08
97
98#define Change_Status 0x02
99#define MasterInterruptStatus 0x04
100#define Overflow 0x02
101#define EdgeStatus 0x01
102
103#define Master_Interrupt_Control 0x03
104#define FallingEdgeIntEnable 0x10
105#define RisingEdgeIntEnable 0x08
106#define MasterInterruptEnable 0x04
107#define OverflowIntEnable 0x02
108#define EdgeIntEnable 0x01
109
110static int ni_65xx_attach(struct comedi_device *dev,
111 struct comedi_devconfig *it);
112static int ni_65xx_detach(struct comedi_device *dev);
113static struct comedi_driver driver_ni_65xx = {
114 .driver_name = "ni_65xx",
115 .module = THIS_MODULE,
116 .attach = ni_65xx_attach,
117 .detach = ni_65xx_detach,
118};
119
120struct ni_65xx_board {
121
122 int dev_id;
123 const char *name;
124 unsigned num_dio_ports;
125 unsigned num_di_ports;
126 unsigned num_do_ports;
127 unsigned invert_outputs:1;
128};
129
130static const struct ni_65xx_board ni_65xx_boards[] = {
131 {
132 .dev_id = 0x7085,
133 .name = "pci-6509",
134 .num_dio_ports = 12,
135 .invert_outputs = 0},
136 {
137 .dev_id = 0x1710,
138 .name = "pxi-6509",
139 .num_dio_ports = 12,
140 .invert_outputs = 0},
141 {
142 .dev_id = 0x7124,
143 .name = "pci-6510",
144 .num_di_ports = 4},
145 {
146 .dev_id = 0x70c3,
147 .name = "pci-6511",
148 .num_di_ports = 8},
149 {
150 .dev_id = 0x70d3,
151 .name = "pxi-6511",
152 .num_di_ports = 8},
153 {
154 .dev_id = 0x70cc,
155 .name = "pci-6512",
156 .num_do_ports = 8},
157 {
158 .dev_id = 0x70d2,
159 .name = "pxi-6512",
160 .num_do_ports = 8},
161 {
162 .dev_id = 0x70c8,
163 .name = "pci-6513",
164 .num_do_ports = 8,
165 .invert_outputs = 1},
166 {
167 .dev_id = 0x70d1,
168 .name = "pxi-6513",
169 .num_do_ports = 8,
170 .invert_outputs = 1},
171 {
172 .dev_id = 0x7088,
173 .name = "pci-6514",
174 .num_di_ports = 4,
175 .num_do_ports = 4,
176 .invert_outputs = 1},
177 {
178 .dev_id = 0x70CD,
179 .name = "pxi-6514",
180 .num_di_ports = 4,
181 .num_do_ports = 4,
182 .invert_outputs = 1},
183 {
184 .dev_id = 0x7087,
185 .name = "pci-6515",
186 .num_di_ports = 4,
187 .num_do_ports = 4,
188 .invert_outputs = 1},
189 {
190 .dev_id = 0x70c9,
191 .name = "pxi-6515",
192 .num_di_ports = 4,
193 .num_do_ports = 4,
194 .invert_outputs = 1},
195 {
196 .dev_id = 0x7125,
197 .name = "pci-6516",
198 .num_do_ports = 4,
199 .invert_outputs = 1},
200 {
201 .dev_id = 0x7126,
202 .name = "pci-6517",
203 .num_do_ports = 4,
204 .invert_outputs = 1},
205 {
206 .dev_id = 0x7127,
207 .name = "pci-6518",
208 .num_di_ports = 2,
209 .num_do_ports = 2,
210 .invert_outputs = 1},
211 {
212 .dev_id = 0x7128,
213 .name = "pci-6519",
214 .num_di_ports = 2,
215 .num_do_ports = 2,
216 .invert_outputs = 1},
217 {
218 .dev_id = 0x71c5,
219 .name = "pci-6520",
220 .num_di_ports = 1,
221 .num_do_ports = 1,
222 },
223 {
224 .dev_id = 0x718b,
225 .name = "pci-6521",
226 .num_di_ports = 1,
227 .num_do_ports = 1,
228 },
229 {
230 .dev_id = 0x718c,
231 .name = "pxi-6521",
232 .num_di_ports = 1,
233 .num_do_ports = 1,
234 },
235 {
236 .dev_id = 0x70a9,
237 .name = "pci-6528",
238 .num_di_ports = 3,
239 .num_do_ports = 3,
240 },
241 {
242 .dev_id = 0x7086,
243 .name = "pxi-6528",
244 .num_di_ports = 3,
245 .num_do_ports = 3,
246 },
247};
248
249#define n_ni_65xx_boards ARRAY_SIZE(ni_65xx_boards)
250static inline const struct ni_65xx_board *board(struct comedi_device *dev)
251{
252 return dev->board_ptr;
253}
254
255static inline unsigned ni_65xx_port_by_channel(unsigned channel)
256{
257 return channel / ni_65xx_channels_per_port;
258}
259
260static inline unsigned ni_65xx_total_num_ports(const struct ni_65xx_board
261 *board)
262{
263 return board->num_dio_ports + board->num_di_ports + board->num_do_ports;
264}
265
266static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = {
267 {
268 PCI_VENDOR_ID_NATINST, 0x1710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
269 PCI_VENDOR_ID_NATINST, 0x7085, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
270 PCI_VENDOR_ID_NATINST, 0x7086, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
271 PCI_VENDOR_ID_NATINST, 0x7087, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
272 PCI_VENDOR_ID_NATINST, 0x7088, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
273 PCI_VENDOR_ID_NATINST, 0x70a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
274 PCI_VENDOR_ID_NATINST, 0x70c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
275 PCI_VENDOR_ID_NATINST, 0x70c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
276 PCI_VENDOR_ID_NATINST, 0x70c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
277 PCI_VENDOR_ID_NATINST, 0x70cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
278 PCI_VENDOR_ID_NATINST, 0x70CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
279 PCI_VENDOR_ID_NATINST, 0x70d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
280 PCI_VENDOR_ID_NATINST, 0x70d2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
281 PCI_VENDOR_ID_NATINST, 0x70d3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
282 PCI_VENDOR_ID_NATINST, 0x7124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
283 PCI_VENDOR_ID_NATINST, 0x7125, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
284 PCI_VENDOR_ID_NATINST, 0x7126, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
285 PCI_VENDOR_ID_NATINST, 0x7127, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
286 PCI_VENDOR_ID_NATINST, 0x7128, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
287 PCI_VENDOR_ID_NATINST, 0x718b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
288 PCI_VENDOR_ID_NATINST, 0x718c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
289 PCI_VENDOR_ID_NATINST, 0x71c5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
290 0}
291};
292
293MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
294
295struct ni_65xx_private {
296 struct mite_struct *mite;
297 unsigned int filter_interval;
298 unsigned short filter_enable[NI_65XX_MAX_NUM_PORTS];
299 unsigned short output_bits[NI_65XX_MAX_NUM_PORTS];
300 unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS];
301};
302
303static inline struct ni_65xx_private *private(struct comedi_device *dev)
304{
305 return dev->private;
306}
307
308struct ni_65xx_subdevice_private {
309 unsigned base_port;
310};
311
312static inline struct ni_65xx_subdevice_private *sprivate(struct comedi_subdevice
313 *subdev)
314{
315 return subdev->private;
316}
317
318static struct ni_65xx_subdevice_private *ni_65xx_alloc_subdevice_private(void)
319{
320 struct ni_65xx_subdevice_private *subdev_private =
321 kzalloc(sizeof(struct ni_65xx_subdevice_private), GFP_KERNEL);
322 if (subdev_private == NULL)
323 return NULL;
324 return subdev_private;
325}
326
327static int ni_65xx_find_device(struct comedi_device *dev, int bus, int slot);
328
329static int ni_65xx_config_filter(struct comedi_device *dev,
330 struct comedi_subdevice *s,
331 struct comedi_insn *insn, unsigned int *data)
332{
333 const unsigned chan = CR_CHAN(insn->chanspec);
334 const unsigned port =
335 sprivate(s)->base_port + ni_65xx_port_by_channel(chan);
336
337 if (data[0] != INSN_CONFIG_FILTER)
338 return -EINVAL;
339 if (data[1]) {
340 static const unsigned filter_resolution_ns = 200;
341 static const unsigned max_filter_interval = 0xfffff;
342 unsigned interval =
343 (data[1] +
344 (filter_resolution_ns / 2)) / filter_resolution_ns;
345 if (interval > max_filter_interval)
346 interval = max_filter_interval;
347 data[1] = interval * filter_resolution_ns;
348
349 if (interval != private(dev)->filter_interval) {
350 writeb(interval,
351 private(dev)->mite->daq_io_addr +
352 Filter_Interval);
353 private(dev)->filter_interval = interval;
354 }
355
356 private(dev)->filter_enable[port] |=
357 1 << (chan % ni_65xx_channels_per_port);
358 } else {
359 private(dev)->filter_enable[port] &=
360 ~(1 << (chan % ni_65xx_channels_per_port));
361 }
362
363 writeb(private(dev)->filter_enable[port],
364 private(dev)->mite->daq_io_addr + Filter_Enable(port));
365
366 return 2;
367}
368
369static int ni_65xx_dio_insn_config(struct comedi_device *dev,
370 struct comedi_subdevice *s,
371 struct comedi_insn *insn, unsigned int *data)
372{
373 unsigned port;
374
375 if (insn->n < 1)
376 return -EINVAL;
377 port = sprivate(s)->base_port +
378 ni_65xx_port_by_channel(CR_CHAN(insn->chanspec));
379 switch (data[0]) {
380 case INSN_CONFIG_FILTER:
381 return ni_65xx_config_filter(dev, s, insn, data);
382 break;
383 case INSN_CONFIG_DIO_OUTPUT:
384 if (s->type != COMEDI_SUBD_DIO)
385 return -EINVAL;
386 private(dev)->dio_direction[port] = COMEDI_OUTPUT;
387 writeb(0, private(dev)->mite->daq_io_addr + Port_Select(port));
388 return 1;
389 break;
390 case INSN_CONFIG_DIO_INPUT:
391 if (s->type != COMEDI_SUBD_DIO)
392 return -EINVAL;
393 private(dev)->dio_direction[port] = COMEDI_INPUT;
394 writeb(1, private(dev)->mite->daq_io_addr + Port_Select(port));
395 return 1;
396 break;
397 case INSN_CONFIG_DIO_QUERY:
398 if (s->type != COMEDI_SUBD_DIO)
399 return -EINVAL;
400 data[1] = private(dev)->dio_direction[port];
401 return insn->n;
402 break;
403 default:
404 break;
405 }
406 return -EINVAL;
407}
408
409static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
410 struct comedi_subdevice *s,
411 struct comedi_insn *insn, unsigned int *data)
412{
413 unsigned base_bitfield_channel;
414 const unsigned max_ports_per_bitfield = 5;
415 unsigned read_bits = 0;
416 unsigned j;
417 if (insn->n != 2)
418 return -EINVAL;
419 base_bitfield_channel = CR_CHAN(insn->chanspec);
420 for (j = 0; j < max_ports_per_bitfield; ++j) {
421 const unsigned port_offset = ni_65xx_port_by_channel(base_bitfield_channel) + j;
422 const unsigned port =
423 sprivate(s)->base_port + port_offset;
424 unsigned base_port_channel;
425 unsigned port_mask, port_data, port_read_bits;
426 int bitshift;
427 if (port >= ni_65xx_total_num_ports(board(dev)))
428 break;
429 base_port_channel = port_offset * ni_65xx_channels_per_port;
430 port_mask = data[0];
431 port_data = data[1];
432 bitshift = base_port_channel - base_bitfield_channel;
433 if (bitshift >= 32 || bitshift <= -32)
434 break;
435 if (bitshift > 0) {
436 port_mask >>= bitshift;
437 port_data >>= bitshift;
438 } else {
439 port_mask <<= -bitshift;
440 port_data <<= -bitshift;
441 }
442 port_mask &= 0xff;
443 port_data &= 0xff;
444 if (port_mask) {
445 unsigned bits;
446 private(dev)->output_bits[port] &= ~port_mask;
447 private(dev)->output_bits[port] |=
448 port_data & port_mask;
449 bits = private(dev)->output_bits[port];
450 if (board(dev)->invert_outputs)
451 bits = ~bits;
452 writeb(bits,
453 private(dev)->mite->daq_io_addr +
454 Port_Data(port));
455
456 }
457 port_read_bits =
458 readb(private(dev)->mite->daq_io_addr + Port_Data(port));
459
460 if (s->type == COMEDI_SUBD_DO && board(dev)->invert_outputs) {
461
462
463
464 port_read_bits ^= 0xFF;
465 }
466 if (bitshift > 0) {
467 port_read_bits <<= bitshift;
468 } else {
469 port_read_bits >>= -bitshift;
470 }
471 read_bits |= port_read_bits;
472 }
473 data[1] = read_bits;
474 return insn->n;
475}
476
477static irqreturn_t ni_65xx_interrupt(int irq, void *d)
478{
479 struct comedi_device *dev = d;
480 struct comedi_subdevice *s = dev->subdevices + 2;
481 unsigned int status;
482
483 status = readb(private(dev)->mite->daq_io_addr + Change_Status);
484 if ((status & MasterInterruptStatus) == 0)
485 return IRQ_NONE;
486 if ((status & EdgeStatus) == 0)
487 return IRQ_NONE;
488
489 writeb(ClrEdge | ClrOverflow,
490 private(dev)->mite->daq_io_addr + Clear_Register);
491
492 comedi_buf_put(s->async, 0);
493 s->async->events |= COMEDI_CB_EOS;
494 comedi_event(dev, s);
495 return IRQ_HANDLED;
496}
497
498static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
499 struct comedi_subdevice *s,
500 struct comedi_cmd *cmd)
501{
502 int err = 0;
503 int tmp;
504
505
506
507 tmp = cmd->start_src;
508 cmd->start_src &= TRIG_NOW;
509 if (!cmd->start_src || tmp != cmd->start_src)
510 err++;
511
512 tmp = cmd->scan_begin_src;
513 cmd->scan_begin_src &= TRIG_OTHER;
514 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
515 err++;
516
517 tmp = cmd->convert_src;
518 cmd->convert_src &= TRIG_FOLLOW;
519 if (!cmd->convert_src || tmp != cmd->convert_src)
520 err++;
521
522 tmp = cmd->scan_end_src;
523 cmd->scan_end_src &= TRIG_COUNT;
524 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
525 err++;
526
527 tmp = cmd->stop_src;
528 cmd->stop_src &= TRIG_COUNT;
529 if (!cmd->stop_src || tmp != cmd->stop_src)
530 err++;
531
532 if (err)
533 return 1;
534
535
536
537 if (err)
538 return 2;
539
540
541
542 if (cmd->start_arg != 0) {
543 cmd->start_arg = 0;
544 err++;
545 }
546 if (cmd->scan_begin_arg != 0) {
547 cmd->scan_begin_arg = 0;
548 err++;
549 }
550 if (cmd->convert_arg != 0) {
551 cmd->convert_arg = 0;
552 err++;
553 }
554
555 if (cmd->scan_end_arg != 1) {
556 cmd->scan_end_arg = 1;
557 err++;
558 }
559 if (cmd->stop_arg != 0) {
560 cmd->stop_arg = 0;
561 err++;
562 }
563
564 if (err)
565 return 3;
566
567
568
569 if (err)
570 return 4;
571
572 return 0;
573}
574
575static int ni_65xx_intr_cmd(struct comedi_device *dev,
576 struct comedi_subdevice *s)
577{
578
579
580 writeb(ClrEdge | ClrOverflow,
581 private(dev)->mite->daq_io_addr + Clear_Register);
582 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
583 MasterInterruptEnable | EdgeIntEnable,
584 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
585
586 return 0;
587}
588
589static int ni_65xx_intr_cancel(struct comedi_device *dev,
590 struct comedi_subdevice *s)
591{
592 writeb(0x00,
593 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
594
595 return 0;
596}
597
598static int ni_65xx_intr_insn_bits(struct comedi_device *dev,
599 struct comedi_subdevice *s,
600 struct comedi_insn *insn, unsigned int *data)
601{
602 if (insn->n < 1)
603 return -EINVAL;
604
605 data[1] = 0;
606 return 2;
607}
608
609static int ni_65xx_intr_insn_config(struct comedi_device *dev,
610 struct comedi_subdevice *s,
611 struct comedi_insn *insn,
612 unsigned int *data)
613{
614 if (insn->n < 1)
615 return -EINVAL;
616 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
617 return -EINVAL;
618
619 writeb(data[1],
620 private(dev)->mite->daq_io_addr +
621 Rising_Edge_Detection_Enable(0));
622 writeb(data[1] >> 8,
623 private(dev)->mite->daq_io_addr +
624 Rising_Edge_Detection_Enable(0x10));
625 writeb(data[1] >> 16,
626 private(dev)->mite->daq_io_addr +
627 Rising_Edge_Detection_Enable(0x20));
628 writeb(data[1] >> 24,
629 private(dev)->mite->daq_io_addr +
630 Rising_Edge_Detection_Enable(0x30));
631
632 writeb(data[2],
633 private(dev)->mite->daq_io_addr +
634 Falling_Edge_Detection_Enable(0));
635 writeb(data[2] >> 8,
636 private(dev)->mite->daq_io_addr +
637 Falling_Edge_Detection_Enable(0x10));
638 writeb(data[2] >> 16,
639 private(dev)->mite->daq_io_addr +
640 Falling_Edge_Detection_Enable(0x20));
641 writeb(data[2] >> 24,
642 private(dev)->mite->daq_io_addr +
643 Falling_Edge_Detection_Enable(0x30));
644
645 return 2;
646}
647
648static int ni_65xx_attach(struct comedi_device *dev,
649 struct comedi_devconfig *it)
650{
651 struct comedi_subdevice *s;
652 unsigned i;
653 int ret;
654
655 printk("comedi%d: ni_65xx:", dev->minor);
656
657 ret = alloc_private(dev, sizeof(struct ni_65xx_private));
658 if (ret < 0)
659 return ret;
660
661 ret = ni_65xx_find_device(dev, it->options[0], it->options[1]);
662 if (ret < 0)
663 return ret;
664
665 ret = mite_setup(private(dev)->mite);
666 if (ret < 0) {
667 printk("error setting up mite\n");
668 return ret;
669 }
670
671 dev->board_name = board(dev)->name;
672 dev->irq = mite_irq(private(dev)->mite);
673 printk(" %s", dev->board_name);
674
675 printk(" ID=0x%02x",
676 readb(private(dev)->mite->daq_io_addr + ID_Register));
677
678 ret = alloc_subdevices(dev, 4);
679 if (ret < 0)
680 return ret;
681
682 s = dev->subdevices + 0;
683 if (board(dev)->num_di_ports) {
684 s->type = COMEDI_SUBD_DI;
685 s->subdev_flags = SDF_READABLE;
686 s->n_chan =
687 board(dev)->num_di_ports * ni_65xx_channels_per_port;
688 s->range_table = &range_digital;
689 s->maxdata = 1;
690 s->insn_config = ni_65xx_dio_insn_config;
691 s->insn_bits = ni_65xx_dio_insn_bits;
692 s->private = ni_65xx_alloc_subdevice_private();
693 if (s->private == NULL)
694 return -ENOMEM;
695 sprivate(s)->base_port = 0;
696 } else {
697 s->type = COMEDI_SUBD_UNUSED;
698 }
699
700 s = dev->subdevices + 1;
701 if (board(dev)->num_do_ports) {
702 s->type = COMEDI_SUBD_DO;
703 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
704 s->n_chan =
705 board(dev)->num_do_ports * ni_65xx_channels_per_port;
706 s->range_table = &range_digital;
707 s->maxdata = 1;
708 s->insn_bits = ni_65xx_dio_insn_bits;
709 s->private = ni_65xx_alloc_subdevice_private();
710 if (s->private == NULL)
711 return -ENOMEM;
712 sprivate(s)->base_port = board(dev)->num_di_ports;
713 } else {
714 s->type = COMEDI_SUBD_UNUSED;
715 }
716
717 s = dev->subdevices + 2;
718 if (board(dev)->num_dio_ports) {
719 s->type = COMEDI_SUBD_DIO;
720 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
721 s->n_chan =
722 board(dev)->num_dio_ports * ni_65xx_channels_per_port;
723 s->range_table = &range_digital;
724 s->maxdata = 1;
725 s->insn_config = ni_65xx_dio_insn_config;
726 s->insn_bits = ni_65xx_dio_insn_bits;
727 s->private = ni_65xx_alloc_subdevice_private();
728 if (s->private == NULL)
729 return -ENOMEM;
730 sprivate(s)->base_port = 0;
731 for (i = 0; i < board(dev)->num_dio_ports; ++i) {
732
733 writeb(0x1,
734 private(dev)->mite->daq_io_addr +
735 Port_Select(i));
736 }
737 } else {
738 s->type = COMEDI_SUBD_UNUSED;
739 }
740
741 s = dev->subdevices + 3;
742 dev->read_subdev = s;
743 s->type = COMEDI_SUBD_DI;
744 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
745 s->n_chan = 1;
746 s->range_table = &range_unknown;
747 s->maxdata = 1;
748 s->do_cmdtest = ni_65xx_intr_cmdtest;
749 s->do_cmd = ni_65xx_intr_cmd;
750 s->cancel = ni_65xx_intr_cancel;
751 s->insn_bits = ni_65xx_intr_insn_bits;
752 s->insn_config = ni_65xx_intr_insn_config;
753
754 for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) {
755 writeb(0x00,
756 private(dev)->mite->daq_io_addr + Filter_Enable(i));
757 if (board(dev)->invert_outputs)
758 writeb(0x01,
759 private(dev)->mite->daq_io_addr + Port_Data(i));
760 else
761 writeb(0x00,
762 private(dev)->mite->daq_io_addr + Port_Data(i));
763 }
764 writeb(ClrEdge | ClrOverflow,
765 private(dev)->mite->daq_io_addr + Clear_Register);
766 writeb(0x00,
767 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
768
769
770 writeb(0x00000000, private(dev)->mite->daq_io_addr + Filter_Interval);
771
772 ret = request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED,
773 "ni_65xx", dev);
774 if (ret < 0) {
775 dev->irq = 0;
776 printk(" irq not available");
777 }
778
779 printk("\n");
780
781 return 0;
782}
783
784static int ni_65xx_detach(struct comedi_device *dev)
785{
786 if (private(dev) && private(dev)->mite
787 && private(dev)->mite->daq_io_addr) {
788 writeb(0x00,
789 private(dev)->mite->daq_io_addr +
790 Master_Interrupt_Control);
791 }
792
793 if (dev->irq) {
794 free_irq(dev->irq, dev);
795 }
796
797 if (private(dev)) {
798 unsigned i;
799 for (i = 0; i < dev->n_subdevices; ++i) {
800 if (dev->subdevices[i].private) {
801 kfree(dev->subdevices[i].private);
802 dev->subdevices[i].private = NULL;
803 }
804 }
805 if (private(dev)->mite) {
806 mite_unsetup(private(dev)->mite);
807 }
808 }
809 return 0;
810}
811
812static int ni_65xx_find_device(struct comedi_device *dev, int bus, int slot)
813{
814 struct mite_struct *mite;
815 int i;
816
817 for (mite = mite_devices; mite; mite = mite->next) {
818 if (mite->used)
819 continue;
820 if (bus || slot) {
821 if (bus != mite->pcidev->bus->number ||
822 slot != PCI_SLOT(mite->pcidev->devfn))
823 continue;
824 }
825 for (i = 0; i < n_ni_65xx_boards; i++) {
826 if (mite_device_id(mite) == ni_65xx_boards[i].dev_id) {
827 dev->board_ptr = ni_65xx_boards + i;
828 private(dev)->mite = mite;
829 return 0;
830 }
831 }
832 }
833 printk("no device found\n");
834 mite_list_devices();
835 return -EIO;
836}
837
838COMEDI_PCI_INITCLEANUP(driver_ni_65xx, ni_65xx_pci_table);
839
