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60#include "et131x_version.h"
61#include "et131x_defs.h"
62
63#include <linux/pci.h>
64#include <linux/init.h>
65#include <linux/module.h>
66#include <linux/types.h>
67#include <linux/kernel.h>
68
69#include <linux/sched.h>
70#include <linux/ptrace.h>
71#include <linux/slab.h>
72#include <linux/ctype.h>
73#include <linux/string.h>
74#include <linux/timer.h>
75#include <linux/interrupt.h>
76#include <linux/in.h>
77#include <linux/delay.h>
78#include <linux/io.h>
79#include <linux/bitops.h>
80#include <asm/system.h>
81
82#include <linux/netdevice.h>
83#include <linux/etherdevice.h>
84#include <linux/skbuff.h>
85#include <linux/if_arp.h>
86#include <linux/ioport.h>
87#include <linux/random.h>
88
89#include "et1310_phy.h"
90#include "et1310_pm.h"
91#include "et1310_jagcore.h"
92
93#include "et131x_adapter.h"
94#include "et131x_netdev.h"
95#include "et131x_config.h"
96#include "et131x_isr.h"
97
98#include "et1310_address_map.h"
99#include "et1310_tx.h"
100#include "et1310_rx.h"
101#include "et1310_mac.h"
102#include "et1310_eeprom.h"
103
104
105
106#define PARM_SPEED_DUPLEX_MIN 0
107#define PARM_SPEED_DUPLEX_MAX 5
108
109
110
111
112
113
114
115
116static u32 et131x_nmi_disable;
117module_param(et131x_nmi_disable, uint, 0);
118MODULE_PARM_DESC(et131x_nmi_disable, "Disable NMI (0-2) [0]");
119
120
121
122
123
124
125
126
127
128
129static u32 et131x_speed_set;
130module_param(et131x_speed_set, uint, 0);
131MODULE_PARM_DESC(et131x_speed_set,
132 "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex");
133
134
135
136
137
138
139
140int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
141{
142 int result;
143 uint8_t eepromStat;
144 uint8_t maxPayload = 0;
145 uint8_t read_size_reg;
146 u8 rev;
147
148
149
150
151 if (adapter->RegistryNMIDisable) {
152 uint8_t RegisterVal;
153
154 RegisterVal = inb(ET1310_NMI_DISABLE);
155 RegisterVal &= 0xf3;
156
157 if (adapter->RegistryNMIDisable == 2)
158 RegisterVal |= 0xc;
159
160 outb(ET1310_NMI_DISABLE, RegisterVal);
161 }
162
163
164
165
166 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
167 &eepromStat);
168
169
170
171
172
173
174
175 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
176 &eepromStat);
177 if (result != PCIBIOS_SUCCESSFUL) {
178 dev_err(&pdev->dev, "Could not read PCI config space for "
179 "EEPROM Status\n");
180 return -EIO;
181 }
182
183
184
185
186 if (eepromStat & 0x4C) {
187 result = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
188 if (result != PCIBIOS_SUCCESSFUL) {
189 dev_err(&pdev->dev,
190 "Could not read PCI config space for "
191 "Revision ID\n");
192 return -EIO;
193 } else if (rev == 0x01) {
194 int32_t nLoop;
195 uint8_t temp[4] = { 0xFE, 0x13, 0x10, 0xFF };
196
197
198
199
200
201 for (nLoop = 0; nLoop < 3; nLoop++) {
202 EepromWriteByte(adapter, nLoop, temp[nLoop]);
203 }
204 }
205
206 dev_err(&pdev->dev, "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
207
208
209
210
211
212
213
214 adapter->has_eeprom = 0;
215 return -EIO;
216 } else
217 adapter->has_eeprom = 1;
218
219
220
221
222 EepromReadByte(adapter, 0x70, &adapter->eepromData[0]);
223 EepromReadByte(adapter, 0x71, &adapter->eepromData[1]);
224
225 if (adapter->eepromData[0] != 0xcd)
226
227 adapter->eepromData[1] = 0x00;
228
229
230
231
232 result = pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &maxPayload);
233 if (result != PCIBIOS_SUCCESSFUL) {
234 dev_err(&pdev->dev,
235 "Could not read PCI config space for Max Payload Size\n");
236 return -EIO;
237 }
238
239
240 maxPayload &= 0x07;
241
242 if (maxPayload < 2) {
243 const uint16_t AckNak[2] = { 0x76, 0xD0 };
244 const uint16_t Replay[2] = { 0x1E0, 0x2ED };
245
246 result = pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
247 AckNak[maxPayload]);
248 if (result != PCIBIOS_SUCCESSFUL) {
249 dev_err(&pdev->dev,
250 "Could not write PCI config space for ACK/NAK\n");
251 return -EIO;
252 }
253
254 result = pci_write_config_word(pdev, ET1310_PCI_REPLAY,
255 Replay[maxPayload]);
256 if (result != PCIBIOS_SUCCESSFUL) {
257 dev_err(&pdev->dev,
258 "Could not write PCI config space for Replay Timer\n");
259 return -EIO;
260 }
261 }
262
263
264
265
266 result = pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11);
267 if (result != PCIBIOS_SUCCESSFUL) {
268 dev_err(&pdev->dev,
269 "Could not write PCI config space for Latency Timers\n");
270 return -EIO;
271 }
272
273
274 result = pci_read_config_byte(pdev, 0x51, &read_size_reg);
275 if (result != PCIBIOS_SUCCESSFUL) {
276 dev_err(&pdev->dev,
277 "Could not read PCI config space for Max read size\n");
278 return -EIO;
279 }
280
281 read_size_reg &= 0x8f;
282 read_size_reg |= 0x40;
283
284 result = pci_write_config_byte(pdev, 0x51, read_size_reg);
285 if (result != PCIBIOS_SUCCESSFUL) {
286 dev_err(&pdev->dev,
287 "Could not write PCI config space for Max read size\n");
288 return -EIO;
289 }
290
291
292
293
294 if (adapter->has_eeprom) {
295 int i;
296
297 for (i = 0; i < ETH_ALEN; i++) {
298 result = pci_read_config_byte(
299 pdev, ET1310_PCI_MAC_ADDRESS + i,
300 adapter->PermanentAddress + i);
301 if (result != PCIBIOS_SUCCESSFUL) {
302 dev_err(&pdev->dev, ";Could not read PCI config space for MAC address\n");
303 return -EIO;
304 }
305 }
306 }
307 return 0;
308}
309
310
311
312
313
314
315
316
317void et131x_error_timer_handler(unsigned long data)
318{
319 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
320 u32 pm_csr;
321
322 pm_csr = readl(&etdev->regs->global.pm_csr);
323
324 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0)
325 UpdateMacStatHostCounters(etdev);
326 else
327 dev_err(&etdev->pdev->dev,
328 "No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
329
330 if (!etdev->Bmsr.bits.link_status &&
331 etdev->RegistryPhyComa &&
332 etdev->PoMgmt.TransPhyComaModeOnBoot < 11) {
333 etdev->PoMgmt.TransPhyComaModeOnBoot++;
334 }
335
336 if (etdev->PoMgmt.TransPhyComaModeOnBoot == 10) {
337 if (!etdev->Bmsr.bits.link_status
338 && etdev->RegistryPhyComa) {
339 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
340
341
342
343 et131x_enable_interrupts(etdev);
344 EnablePhyComa(etdev);
345 }
346 }
347 }
348
349
350 mod_timer(&etdev->ErrorTimer, jiffies +
351 TX_ERROR_PERIOD * HZ / 1000);
352}
353
354
355
356
357
358
359void et131x_link_detection_handler(unsigned long data)
360{
361 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
362 unsigned long flags;
363
364 if (etdev->MediaState == 0) {
365 spin_lock_irqsave(&etdev->Lock, flags);
366
367 etdev->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
368 etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
369
370 spin_unlock_irqrestore(&etdev->Lock, flags);
371
372 netif_carrier_off(etdev->netdev);
373 }
374}
375
376
377
378
379
380
381
382void ConfigGlobalRegs(struct et131x_adapter *etdev)
383{
384 struct _GLOBAL_t __iomem *regs = &etdev->regs->global;
385
386 if (etdev->RegistryPhyLoopbk == false) {
387 if (etdev->RegistryJumboPacket < 2048) {
388
389
390
391
392
393 writel(0, ®s->rxq_start_addr);
394 writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr);
395 writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr);
396 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
397 } else if (etdev->RegistryJumboPacket < 8192) {
398
399 writel(0, ®s->rxq_start_addr);
400 writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr);
401 writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr);
402 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
403 } else {
404
405
406
407
408
409 writel(0x0000, ®s->rxq_start_addr);
410 writel(0x01b3, ®s->rxq_end_addr);
411 writel(0x01b4, ®s->txq_start_addr);
412 writel(INTERNAL_MEM_SIZE - 1,®s->txq_end_addr);
413 }
414
415
416 writel(0, ®s->loopback);
417 } else {
418
419
420
421
422
423 writel(0, ®s->rxq_start_addr);
424 writel(INTERNAL_MEM_SIZE - 1, ®s->rxq_end_addr);
425 writel(0, ®s->txq_start_addr);
426 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
427
428
429 writel(ET_LOOP_MAC, ®s->loopback);
430 }
431
432
433 writel(0, ®s->msi_config);
434
435
436
437
438 writel(0, ®s->watchdog_timer);
439}
440
441
442
443
444
445
446
447
448int et131x_adapter_setup(struct et131x_adapter *etdev)
449{
450 int status = 0;
451
452
453 ConfigGlobalRegs(etdev);
454
455 ConfigMACRegs1(etdev);
456
457
458
459 writel(ET_MMC_ENABLE, &etdev->regs->mmc.mmc_ctrl);
460
461 ConfigRxMacRegs(etdev);
462 ConfigTxMacRegs(etdev);
463
464 ConfigRxDmaRegs(etdev);
465 ConfigTxDmaRegs(etdev);
466
467 ConfigMacStatRegs(etdev);
468
469
470 status = et131x_xcvr_find(etdev);
471
472 if (status != 0)
473 dev_warn(&etdev->pdev->dev, "Could not find the xcvr\n");
474
475
476 ET1310_PhyInit(etdev);
477
478
479 ET1310_PhyReset(etdev);
480
481
482 ET1310_PhyPowerDown(etdev, 1);
483
484
485
486
487
488 if (etdev->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
489 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
490 else
491 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
492
493
494 ET1310_PhyPowerDown(etdev, 0);
495
496 et131x_setphy_normal(etdev);
497; return status;
498}
499
500
501
502
503
504void et131x_setup_hardware_properties(struct et131x_adapter *adapter)
505{
506
507
508
509
510 if (adapter->PermanentAddress[0] == 0x00 &&
511 adapter->PermanentAddress[1] == 0x00 &&
512 adapter->PermanentAddress[2] == 0x00 &&
513 adapter->PermanentAddress[3] == 0x00 &&
514 adapter->PermanentAddress[4] == 0x00 &&
515 adapter->PermanentAddress[5] == 0x00) {
516
517
518
519
520
521 get_random_bytes(&adapter->CurrentAddress[5], 1);
522
523
524
525
526
527 memcpy(adapter->PermanentAddress,
528 adapter->CurrentAddress, ETH_ALEN);
529 } else {
530
531
532
533
534 memcpy(adapter->CurrentAddress,
535 adapter->PermanentAddress, ETH_ALEN);
536 }
537}
538
539
540
541
542
543void et131x_soft_reset(struct et131x_adapter *adapter)
544{
545
546 writel(0xc00f0000, &adapter->regs->mac.cfg1.value);
547
548
549 writel(0x7F, &adapter->regs->global.sw_reset);
550 writel(0x000f0000, &adapter->regs->mac.cfg1.value);
551 writel(0x00000000, &adapter->regs->mac.cfg1.value);
552}
553
554
555
556
557
558
559
560
561void et131x_align_allocated_memory(struct et131x_adapter *adapter,
562 uint64_t *phys_addr,
563 uint64_t *offset, uint64_t mask)
564{
565 uint64_t new_addr;
566
567 *offset = 0;
568
569 new_addr = *phys_addr & ~mask;
570
571 if (new_addr != *phys_addr) {
572
573 new_addr += mask + 1;
574
575 *offset = new_addr - *phys_addr;
576
577 *phys_addr = new_addr;
578 }
579}
580
581
582
583
584
585
586
587
588
589int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
590{
591 int status = 0;
592
593 do {
594
595 status = et131x_tx_dma_memory_alloc(adapter);
596 if (status != 0) {
597 dev_err(&adapter->pdev->dev,
598 "et131x_tx_dma_memory_alloc FAILED\n");
599 break;
600 }
601
602
603 status = et131x_rx_dma_memory_alloc(adapter);
604 if (status != 0) {
605 dev_err(&adapter->pdev->dev,
606 "et131x_rx_dma_memory_alloc FAILED\n");
607 et131x_tx_dma_memory_free(adapter);
608 break;
609 }
610
611
612 status = et131x_init_recv(adapter);
613 if (status != 0) {
614 dev_err(&adapter->pdev->dev,
615 "et131x_init_recv FAILED\n");
616 et131x_tx_dma_memory_free(adapter);
617 et131x_rx_dma_memory_free(adapter);
618 break;
619 }
620 } while (0);
621 return status;
622}
623
624
625
626
627
628void et131x_adapter_memory_free(struct et131x_adapter *adapter)
629{
630
631 et131x_tx_dma_memory_free(adapter);
632 et131x_rx_dma_memory_free(adapter);
633}
634
635
636
637
638
639
640
641
642
643
644
645void et131x_config_parse(struct et131x_adapter *etdev)
646{
647 static const u8 default_mac[] = { 0x00, 0x05, 0x3d, 0x00, 0x02, 0x00 };
648 static const u8 duplex[] = { 0, 1, 2, 1, 2, 2 };
649 static const u16 speed[] = { 0, 10, 10, 100, 100, 1000 };
650
651 if (et131x_speed_set)
652 dev_info(&etdev->pdev->dev,
653 "Speed set manually to : %d \n", et131x_speed_set);
654
655 etdev->SpeedDuplex = et131x_speed_set;
656 etdev->RegistryJumboPacket = 1514;
657
658 etdev->RegistryNMIDisable = et131x_nmi_disable;
659
660
661 memcpy(etdev->CurrentAddress, default_mac, ETH_ALEN);
662
663
664
665
666
667
668
669
670
671 if (etdev->pdev->device == ET131X_PCI_DEVICE_ID_FAST &&
672 etdev->SpeedDuplex == 5)
673 etdev->SpeedDuplex = 4;
674
675 etdev->AiForceSpeed = speed[etdev->SpeedDuplex];
676 etdev->AiForceDpx = duplex[etdev->SpeedDuplex];
677}
678
679
680
681
682
683
684
685
686
687
688
689void __devexit et131x_pci_remove(struct pci_dev *pdev)
690{
691 struct net_device *netdev;
692 struct et131x_adapter *adapter;
693
694
695
696
697 netdev = (struct net_device *) pci_get_drvdata(pdev);
698 adapter = netdev_priv(netdev);
699
700
701 unregister_netdev(netdev);
702 et131x_adapter_memory_free(adapter);
703 iounmap(adapter->regs);
704 pci_dev_put(adapter->pdev);
705 free_netdev(netdev);
706 pci_release_regions(pdev);
707 pci_disable_device(pdev);
708}
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724int __devinit et131x_pci_setup(struct pci_dev *pdev,
725 const struct pci_device_id *ent)
726{
727 int result = 0;
728 int pm_cap;
729 bool pci_using_dac;
730 struct net_device *netdev = NULL;
731 struct et131x_adapter *adapter = NULL;
732
733
734 result = pci_enable_device(pdev);
735 if (result != 0) {
736 dev_err(&adapter->pdev->dev,
737 "pci_enable_device() failed\n");
738 goto out;
739 }
740
741
742 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
743 dev_err(&adapter->pdev->dev,
744 "Can't find PCI device's base address\n");
745 result = -ENODEV;
746 goto out;
747 }
748
749 result = pci_request_regions(pdev, DRIVER_NAME);
750 if (result != 0) {
751 dev_err(&adapter->pdev->dev,
752 "Can't get PCI resources\n");
753 goto err_disable;
754 }
755
756
757 pci_set_master(pdev);
758
759
760
761
762
763
764 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
765 if (pm_cap == 0) {
766 dev_err(&adapter->pdev->dev,
767 "Cannot find Power Management capabilities\n");
768 result = -EIO;
769 goto err_release_res;
770 }
771
772
773 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
774 pci_using_dac = true;
775
776 result =
777 pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
778 if (result != 0) {
779 dev_err(&pdev->dev,
780 "Unable to obtain 64 bit DMA for consistent allocations\n");
781 goto err_release_res;
782 }
783 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
784 pci_using_dac = false;
785 } else {
786 dev_err(&adapter->pdev->dev,
787 "No usable DMA addressing method\n");
788 result = -EIO;
789 goto err_release_res;
790 }
791
792
793 netdev = et131x_device_alloc();
794 if (netdev == NULL) {
795 dev_err(&adapter->pdev->dev,
796 "Couldn't alloc netdev struct\n");
797 result = -ENOMEM;
798 goto err_release_res;
799 }
800
801
802 SET_NETDEV_DEV(netdev, &pdev->dev);
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833 adapter = netdev_priv(netdev);
834 adapter->pdev = pci_dev_get(pdev);
835 adapter->netdev = netdev;
836
837
838 netdev->irq = pdev->irq;
839 netdev->base_addr = pdev->resource[0].start;
840
841
842 spin_lock_init(&adapter->Lock);
843 spin_lock_init(&adapter->TCBSendQLock);
844 spin_lock_init(&adapter->TCBReadyQLock);
845 spin_lock_init(&adapter->SendHWLock);
846 spin_lock_init(&adapter->SendWaitLock);
847 spin_lock_init(&adapter->RcvLock);
848 spin_lock_init(&adapter->RcvPendLock);
849 spin_lock_init(&adapter->FbrLock);
850 spin_lock_init(&adapter->PHYLock);
851
852
853 et131x_config_parse(adapter);
854
855
856
857
858
859
860
861
862 et131x_find_adapter(adapter, pdev);
863
864
865
866 adapter->regs = ioremap_nocache(pci_resource_start(pdev, 0),
867 pci_resource_len(pdev, 0));
868 if (adapter->regs == NULL) {
869 dev_err(&pdev->dev, "Cannot map device registers\n");
870 result = -ENOMEM;
871 goto err_free_dev;
872 }
873
874
875
876
877 writel(ET_PMCSR_INIT, &adapter->regs->global.pm_csr);
878
879
880 et131x_soft_reset(adapter);
881
882
883 et131x_disable_interrupts(adapter);
884
885
886 result = et131x_adapter_memory_alloc(adapter);
887 if (result != 0) {
888 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n");
889 goto err_iounmap;
890 }
891
892
893 et131x_init_send(adapter);
894
895
896
897
898
899
900
901
902
903
904 INIT_WORK(&adapter->task, et131x_isr_handler);
905
906
907 et131x_setup_hardware_properties(adapter);
908
909 memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
910
911
912 et131x_adapter_setup(adapter);
913
914
915 init_timer(&adapter->ErrorTimer);
916
917 adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000;
918 adapter->ErrorTimer.function = et131x_error_timer_handler;
919 adapter->ErrorTimer.data = (unsigned long)adapter;
920
921
922 et131x_link_detection_handler((unsigned long)adapter);
923
924
925
926 adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
927
928
929
930
931
932
933
934
935
936 result = register_netdev(netdev);
937 if (result != 0) {
938 dev_err(&pdev->dev, "register_netdev() failed\n");
939 goto err_mem_free;
940 }
941
942
943
944
945
946 pci_set_drvdata(pdev, netdev);
947
948 pci_save_state(adapter->pdev);
949
950out:
951 return result;
952
953err_mem_free:
954 et131x_adapter_memory_free(adapter);
955err_iounmap:
956 iounmap(adapter->regs);
957err_free_dev:
958 pci_dev_put(pdev);
959 free_netdev(netdev);
960err_release_res:
961 pci_release_regions(pdev);
962err_disable:
963 pci_disable_device(pdev);
964 goto out;
965}
966
967static struct pci_device_id et131x_pci_table[] __devinitdata = {
968 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
969 PCI_ANY_ID, 0, 0, 0UL},
970 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
971 PCI_ANY_ID, 0, 0, 0UL},
972 {0,}
973};
974
975MODULE_DEVICE_TABLE(pci, et131x_pci_table);
976
977static struct pci_driver et131x_driver = {
978 .name = DRIVER_NAME,
979 .id_table = et131x_pci_table,
980 .probe = et131x_pci_setup,
981 .remove = __devexit_p(et131x_pci_remove),
982 .suspend = NULL,
983 .resume = NULL,
984};
985
986
987
988
989
990
991
992static int et131x_init_module(void)
993{
994 if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN ||
995 et131x_speed_set > PARM_SPEED_DUPLEX_MAX) {
996 printk(KERN_WARNING "et131x: invalid speed setting ignored.\n");
997 et131x_speed_set = 0;
998 }
999 return pci_register_driver(&et131x_driver);
1000}
1001
1002
1003
1004
1005static void et131x_cleanup_module(void)
1006{
1007 pci_unregister_driver(&et131x_driver);
1008}
1009
1010module_init(et131x_init_module);
1011module_exit(et131x_cleanup_module);
1012
1013
1014
1015MODULE_AUTHOR(DRIVER_AUTHOR);
1016MODULE_DESCRIPTION(DRIVER_INFO);
1017MODULE_LICENSE(DRIVER_LICENSE);
1018