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28#ifndef __RT2870_H__
29#define __RT2870_H__
30
31
32#include <linux/usb.h>
33
34
35
36#define BULKAGGRE_ZISE 100
37#define RT28XX_DRVDATA_SET(_a) usb_set_intfdata(_a, pAd);
38#define RT28XX_PUT_DEVICE usb_put_dev
39#define RTUSB_ALLOC_URB(iso) usb_alloc_urb(iso, GFP_ATOMIC)
40#define RTUSB_SUBMIT_URB(pUrb) usb_submit_urb(pUrb, GFP_ATOMIC)
41#define RTUSB_URB_ALLOC_BUFFER(pUsb_Dev, BufSize, pDma_addr) usb_buffer_alloc(pUsb_Dev, BufSize, GFP_ATOMIC, pDma_addr)
42#define RTUSB_URB_FREE_BUFFER(pUsb_Dev, BufSize, pTransferBuf, Dma_addr) usb_buffer_free(pUsb_Dev, BufSize, pTransferBuf, Dma_addr)
43
44#define RXBULKAGGRE_ZISE 12
45#define MAX_TXBULK_LIMIT (LOCAL_TXBUF_SIZE*(BULKAGGRE_ZISE-1))
46#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE)
47#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE)
48#define MAX_MLME_HANDLER_MEMORY 20
49#define RETRY_LIMIT 10
50#define BUFFER_SIZE 2400
51#define TX_RING 0xa
52#define PRIO_RING 0xc
53
54
55
56
57#define fRTUSB_BULK_OUT_DATA_NULL 0x00000001
58#define fRTUSB_BULK_OUT_RTS 0x00000002
59#define fRTUSB_BULK_OUT_MLME 0x00000004
60
61#define fRTUSB_BULK_OUT_DATA_NORMAL 0x00010000
62#define fRTUSB_BULK_OUT_DATA_NORMAL_2 0x00020000
63#define fRTUSB_BULK_OUT_DATA_NORMAL_3 0x00040000
64#define fRTUSB_BULK_OUT_DATA_NORMAL_4 0x00080000
65#define fRTUSB_BULK_OUT_DATA_NORMAL_5 0x00100000
66
67#define fRTUSB_BULK_OUT_PSPOLL 0x00000020
68#define fRTUSB_BULK_OUT_DATA_FRAG 0x00000040
69#define fRTUSB_BULK_OUT_DATA_FRAG_2 0x00000080
70#define fRTUSB_BULK_OUT_DATA_FRAG_3 0x00000100
71#define fRTUSB_BULK_OUT_DATA_FRAG_4 0x00000200
72
73#define FREE_HTTX_RING(_p, _b, _t) \
74{ \
75 if ((_t)->ENextBulkOutPosition == (_t)->CurWritePosition) \
76 { \
77 (_t)->bRingEmpty = TRUE; \
78 } \
79 \
80}
81
82
83
84
85typedef struct PACKED _RXINFO_STRUC {
86 UINT32 BA:1;
87 UINT32 DATA:1;
88 UINT32 NULLDATA:1;
89 UINT32 FRAG:1;
90 UINT32 U2M:1;
91 UINT32 Mcast:1;
92 UINT32 Bcast:1;
93 UINT32 MyBss:1;
94 UINT32 Crc:1;
95 UINT32 CipherErr:2;
96 UINT32 AMSDU:1;
97 UINT32 HTC:1;
98 UINT32 RSSI:1;
99 UINT32 L2PAD:1;
100 UINT32 AMPDU:1;
101 UINT32 Decrypted:1;
102 UINT32 PlcpRssil:1;
103 UINT32 CipherAlg:1;
104 UINT32 LastAMSDU:1;
105 UINT32 PlcpSignal:12;
106} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
107
108
109
110
111typedef struct _TXINFO_STRUC {
112
113 UINT32 USBDMATxPktLen:16;
114 UINT32 rsv:8;
115 UINT32 WIV:1;
116 UINT32 QSEL:2;
117 UINT32 SwUseLastRound:1;
118 UINT32 rsv2:2;
119 UINT32 USBDMANextVLD:1;
120 UINT32 USBDMATxburst:1;
121} TXINFO_STRUC, *PTXINFO_STRUC;
122
123#define TXINFO_SIZE 4
124#define RXINFO_SIZE 4
125#define TXPADDING_SIZE 11
126
127
128
129
130typedef struct _MGMT_STRUC {
131 BOOLEAN Valid;
132 PUCHAR pBuffer;
133 ULONG Length;
134} MGMT_STRUC, *PMGMT_STRUC;
135
136
137
138#define RT28xx_EEPROM_READ16(pAd, offset, var) \
139 do { \
140 RTUSBReadEEPROM(pAd, offset, (PUCHAR)&(var), 2); \
141 if(!pAd->bUseEfuse) \
142 var = le2cpu16(var); \
143 }while(0)
144
145#define RT28xx_EEPROM_WRITE16(pAd, offset, var) \
146 do{ \
147 USHORT _tmpVar=var; \
148 if(!pAd->bUseEfuse) \
149 _tmpVar = cpu2le16(var); \
150 RTUSBWriteEEPROM(pAd, offset, (PUCHAR)&(_tmpVar), 2); \
151 }while(0)
152
153
154#define RT28XX_TASK_THREAD_INIT(pAd, Status) \
155 Status = CreateThreads(net_dev);
156
157
158
159#define RT28XX_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
160 RTUSBFirmwareWrite(_pAd, _pFwImage, _FwLen)
161
162
163#define RT28XX_START_DEQUEUE(pAd, QueIdx, irqFlags) \
164 { \
165 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
166 if (pAd->DeQueueRunning[QueIdx]) \
167 { \
168 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
169 printk("DeQueueRunning[%d]= TRUE!\n", QueIdx); \
170 continue; \
171 } \
172 else \
173 { \
174 pAd->DeQueueRunning[QueIdx] = TRUE; \
175 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
176 } \
177 }
178#define RT28XX_STOP_DEQUEUE(pAd, QueIdx, irqFlags) \
179 do{ \
180 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
181 pAd->DeQueueRunning[QueIdx] = FALSE; \
182 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
183 }while(0)
184
185
186#define RT28XX_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
187 (RTUSBFreeDescriptorRequest(pAd, pTxBlk->QueIdx, (pTxBlk->TotalFrameLen + GET_OS_PKT_LEN(pPacket))) == NDIS_STATUS_SUCCESS)
188
189#define RT28XX_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
190 do{}while(0)
191
192#define NEED_QUEUE_BACK_FOR_AGG(_pAd, _QueIdx, _freeNum, _TxFrameType) \
193 ((_TxFrameType == TX_RALINK_FRAME) && (RTUSBNeedQueueBackForAgg(_pAd, _QueIdx)))
194
195
196
197#define fRTMP_ADAPTER_NEED_STOP_TX \
198 (fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS | \
199 fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_BULKOUT_RESET | \
200 fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_REMOVE_IN_PROGRESS)
201
202
203#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
204 RtmpUSB_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
205
206#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
207 RtmpUSB_WriteSingleTxResource(pAd, pTxBlk,bIsLast, pFreeNumber)
208
209#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
210 RtmpUSB_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
211
212#define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \
213 RtmpUSB_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber)
214
215#define HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx) \
216 RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx)
217
218#define HAL_LastTxIdx(pAd, QueIdx,TxIdx) \
219
220
221#define HAL_KickOutTx(pAd, pTxBlk, QueIdx) \
222 RtmpUSBDataKickOut(pAd, pTxBlk, QueIdx)
223
224
225#define HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen) \
226 RtmpUSBMgmtKickOut(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen)
227
228#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
229 RtmpUSBNullFrameKickOut(_pAd, _QueIdx, _pNullFrame, _frameLen)
230
231#define RTMP_PKT_TAIL_PADDING 11
232
233extern UCHAR EpToQueue[6];
234
235
236#ifdef RT2870
237#define GET_TXRING_FREENO(_pAd, _QueIdx) (_QueIdx)
238#define GET_MGMTRING_FREENO(_pAd) (_pAd->MgmtRing.TxSwFreeIdx)
239#endif
240
241
242
243
244
245#define RT28XX_RV_ALL_BUF_END(bBulkReceive) \
246 \
247 \
248 if (bBulkReceive == TRUE) RTUSBBulkReceive(pAd);
249
250
251
252
253
254#define RT28XX_STA_ENTRY_MAC_RESET(pAd, Wcid) \
255 { RT_SET_ASIC_WCID SetAsicWcid; \
256 SetAsicWcid.WCID = Wcid; \
257 SetAsicWcid.SetTid = 0xffffffff; \
258 SetAsicWcid.DeleteTid = 0xffffffff; \
259 RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_ASIC_WCID, \
260 &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); }
261
262
263#define RT28XX_STA_ENTRY_ADD(pAd, pEntry) \
264 RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_CLIENT_MAC_ENTRY, \
265 pEntry, sizeof(MAC_TABLE_ENTRY));
266
267
268
269#define RT28XX_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid)
270
271
272#define RT28XX_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry) \
273 { RT28XX_STA_ENTRY_MAC_RESET(pAd, pEntry->Aid); \
274 if (pEntry->Aid >= 1) { \
275 RT_SET_ASIC_WCID_ATTRI SetAsicWcidAttri; \
276 SetAsicWcidAttri.WCID = pEntry->Aid; \
277 if ((pEntry->AuthMode <= Ndis802_11AuthModeAutoSwitch) && \
278 (pEntry->WepStatus == Ndis802_11Encryption1Enabled)) \
279 { \
280 SetAsicWcidAttri.Cipher = pAd->SharedKey[apidx][KeyID].CipherAlg; \
281 } \
282 else if (pEntry->AuthMode == Ndis802_11AuthModeWPANone) \
283 { \
284 SetAsicWcidAttri.Cipher = pAd->SharedKey[apidx][KeyID].CipherAlg; \
285 } \
286 else SetAsicWcidAttri.Cipher = 0; \
287 DBGPRINT(RT_DEBUG_TRACE, ("aid cipher = %ld\n",SetAsicWcidAttri.Cipher)); \
288 RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_SET_ASIC_WCID_CIPHER, \
289 &SetAsicWcidAttri, sizeof(RT_SET_ASIC_WCID_ATTRI)); } }
290
291
292#define RT28XX_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
293 do{ \
294 RT_SET_ASIC_WCID SetAsicWcid; \
295 SetAsicWcid.WCID = (_Aid); \
296 SetAsicWcid.SetTid = (0x10000<<(_TID)); \
297 SetAsicWcid.DeleteTid = 0xffffffff; \
298 RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \
299 }while(0)
300
301
302#define RT28XX_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
303 do{ \
304 RT_SET_ASIC_WCID SetAsicWcid; \
305 SetAsicWcid.WCID = (_Wcid); \
306 SetAsicWcid.SetTid = (0xffffffff); \
307 SetAsicWcid.DeleteTid = (0x10000<<(_TID) ); \
308 RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \
309 }while(0)
310
311
312
313#define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \
314 ((POS_COOKIE)handle)->pUsb_Dev = dev_p;
315
316
317#define RT28XX_UNMAP()
318#define RT28XX_IRQ_REQUEST(net_dev)
319#define RT28XX_IRQ_RELEASE(net_dev)
320#define RT28XX_IRQ_INIT(pAd)
321#define RT28XX_IRQ_ENABLE(pAd)
322
323
324
325#define RT28XX_MLME_HANDLER(pAd) RTUSBMlmeUp(pAd)
326
327#define RT28XX_MLME_PRE_SANITY_CHECK(pAd) \
328 { if ((pAd->CommonCfg.bHardwareRadio == TRUE) && \
329 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) && \
330 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))) { \
331 RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_CHECK_GPIO, NULL, 0); } }
332
333#define RT28XX_MLME_STA_QUICK_RSP_WAKE_UP(pAd) \
334 { RTUSBEnqueueInternalCmd(pAd, CMDTHREAD_QKERIODIC_EXECUT, NULL, 0); \
335 RTUSBMlmeUp(pAd); }
336
337#define RT28XX_MLME_RESET_STATE_MACHINE(pAd) \
338 MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_RESET_CONF, 0, NULL); \
339 RTUSBMlmeUp(pAd);
340
341#define RT28XX_HANDLE_COUNTER_MEASURE(_pAd, _pEntry) \
342 { RTUSBEnqueueInternalCmd(_pAd, CMDTHREAD_802_11_COUNTER_MEASURE, _pEntry, sizeof(MAC_TABLE_ENTRY)); \
343 RTUSBMlmeUp(_pAd); \
344 }
345
346
347
348#define RT28XX_PS_POLL_ENQUEUE(pAd) \
349 { RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL); \
350 RTUSBKickBulkOut(pAd); }
351
352#define RT28xx_CHIP_NAME "RTxx70"
353
354#define USB_CYC_CFG 0x02a4
355#define STATUS_SUCCESS 0x00
356#define STATUS_UNSUCCESSFUL 0x01
357#define NT_SUCCESS(status) (((status) > 0) ? (1):(0))
358#define InterlockedIncrement atomic_inc
359#define NdisInterlockedIncrement atomic_inc
360#define InterlockedDecrement atomic_dec
361#define NdisInterlockedDecrement atomic_dec
362#define InterlockedExchange atomic_set
363
364#define NdisMCancelTimer RTMPCancelTimer
365#define NdisAllocMemory(_ptr, _size, _flag) \
366 do{_ptr = kmalloc((_size),(_flag));}while(0)
367#define NdisFreeMemory(a, b, c) kfree((a))
368#define NdisMSleep RTMPusecDelay
369
370
371#define USBD_TRANSFER_DIRECTION_OUT 0
372#define USBD_TRANSFER_DIRECTION_IN 0
373#define USBD_SHORT_TRANSFER_OK 0
374#define PURB purbb_t
375
376#define RTUSB_FREE_URB(pUrb) usb_free_urb(pUrb)
377
378
379
380
381typedef struct usb_device * PUSB_DEV;
382
383
384typedef struct urb *purbb_t;
385typedef struct usb_ctrlrequest devctrlrequest;
386#define PIRP PVOID
387#define PMDL PVOID
388#define NDIS_OID UINT
389#ifndef USB_ST_NOERROR
390#define USB_ST_NOERROR 0
391#endif
392
393
394#define CONTROL_TIMEOUT_JIFFIES ( (100 * HZ) / 1000)
395#define UNLINK_TIMEOUT_MS 3
396
397
398#define RTUSB_UNLINK_URB(pUrb) usb_kill_urb(pUrb)
399
400
401VOID RTUSBBulkOutDataPacketComplete(purbb_t purb, struct pt_regs *pt_regs);
402VOID RTUSBBulkOutMLMEPacketComplete(purbb_t pUrb, struct pt_regs *pt_regs);
403VOID RTUSBBulkOutNullFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
404VOID RTUSBBulkOutRTSFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
405VOID RTUSBBulkOutPsPollComplete(purbb_t pUrb, struct pt_regs *pt_regs);
406VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
407
408#define RTUSBMlmeUp(pAd) \
409{ \
410 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \
411 if (pid_nr(pObj->MLMEThr_pid) > 0) \
412 up(&(pAd->mlme_semaphore)); \
413}
414
415#define RTUSBCMDUp(pAd) \
416{ \
417 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \
418 if (pid_nr(pObj->RTUSBCmdThr_pid) > 0) \
419 up(&(pAd->RTUSBCmd_semaphore)); \
420}
421
422static inline NDIS_STATUS RTMPAllocateMemory(
423 OUT PVOID *ptr,
424 IN size_t size)
425{
426 *ptr = kmalloc(size, GFP_ATOMIC);
427 if(*ptr)
428 return NDIS_STATUS_SUCCESS;
429 else
430 return NDIS_STATUS_RESOURCES;
431}
432
433
434#define BEACON_RING_SIZE 2
435#define DEVICE_VENDOR_REQUEST_OUT 0x40
436#define DEVICE_VENDOR_REQUEST_IN 0xc0
437#define INTERFACE_VENDOR_REQUEST_OUT 0x41
438#define INTERFACE_VENDOR_REQUEST_IN 0xc1
439#define MGMTPIPEIDX 0
440
441#define BULKOUT_MGMT_RESET_FLAG 0x80
442
443#define RTUSB_SET_BULK_FLAG(_M, _F) ((_M)->BulkFlags |= (_F))
444#define RTUSB_CLEAR_BULK_FLAG(_M, _F) ((_M)->BulkFlags &= ~(_F))
445#define RTUSB_TEST_BULK_FLAG(_M, _F) (((_M)->BulkFlags & (_F)) != 0)
446
447#define EnqueueCmd(cmdq, cmdqelmt) \
448{ \
449 if (cmdq->size == 0) \
450 cmdq->head = cmdqelmt; \
451 else \
452 cmdq->tail->next = cmdqelmt; \
453 cmdq->tail = cmdqelmt; \
454 cmdqelmt->next = NULL; \
455 cmdq->size++; \
456}
457
458typedef struct _RT_SET_ASIC_WCID {
459 ULONG WCID;
460 ULONG SetTid;
461 ULONG DeleteTid;
462 UCHAR Addr[MAC_ADDR_LEN];
463} RT_SET_ASIC_WCID,*PRT_SET_ASIC_WCID;
464
465typedef struct _RT_SET_ASIC_WCID_ATTRI {
466 ULONG WCID;
467 ULONG Cipher;
468 UCHAR Addr[ETH_LENGTH_OF_ADDRESS];
469} RT_SET_ASIC_WCID_ATTRI,*PRT_SET_ASIC_WCID_ATTRI;
470
471typedef struct _MLME_MEMORY_STRUCT {
472 PVOID AllocVa;
473 struct _MLME_MEMORY_STRUCT *Next;
474} MLME_MEMORY_STRUCT, *PMLME_MEMORY_STRUCT;
475
476typedef struct _MLME_MEMORY_HANDLER {
477 BOOLEAN MemRunning;
478 UINT MemoryCount;
479 UINT InUseCount;
480 UINT UnUseCount;
481 INT PendingCount;
482 PMLME_MEMORY_STRUCT pInUseHead;
483 PMLME_MEMORY_STRUCT pInUseTail;
484 PMLME_MEMORY_STRUCT pUnUseHead;
485 PMLME_MEMORY_STRUCT pUnUseTail;
486 PULONG MemFreePending[MAX_MLME_HANDLER_MEMORY];
487} MLME_MEMORY_HANDLER, *PMLME_MEMORY_HANDLER;
488
489typedef struct _CmdQElmt {
490 UINT command;
491 PVOID buffer;
492 ULONG bufferlength;
493 BOOLEAN CmdFromNdis;
494 BOOLEAN SetOperation;
495 struct _CmdQElmt *next;
496} CmdQElmt, *PCmdQElmt;
497
498typedef struct _CmdQ {
499 UINT size;
500 CmdQElmt *head;
501 CmdQElmt *tail;
502 UINT32 CmdQState;
503}CmdQ, *PCmdQ;
504
505
506
507typedef enum _RT_802_11_CIPHER_SUITE_TYPE {
508 Cipher_Type_NONE,
509 Cipher_Type_WEP40,
510 Cipher_Type_TKIP,
511 Cipher_Type_RSVD,
512 Cipher_Type_CCMP,
513 Cipher_Type_WEP104
514} RT_802_11_CIPHER_SUITE_TYPE, *PRT_802_11_CIPHER_SUITE_TYPE;
515
516
517
518
519
520typedef struct _CMDHandler_TLV {
521 USHORT Offset;
522 USHORT Length;
523 UCHAR DataFirst;
524} CMDHandler_TLV, *PCMDHandler_TLV;
525
526
527#define CMDTHREAD_VENDOR_RESET 0x0D730101
528#define CMDTHREAD_VENDOR_UNPLUG 0x0D730102
529#define CMDTHREAD_VENDOR_SWITCH_FUNCTION 0x0D730103
530#define CMDTHREAD_MULTI_WRITE_MAC 0x0D730107
531#define CMDTHREAD_MULTI_READ_MAC 0x0D730108
532#define CMDTHREAD_VENDOR_EEPROM_WRITE 0x0D73010A
533#define CMDTHREAD_VENDOR_EEPROM_READ 0x0D73010B
534#define CMDTHREAD_VENDOR_ENTER_TESTMODE 0x0D73010C
535#define CMDTHREAD_VENDOR_EXIT_TESTMODE 0x0D73010D
536#define CMDTHREAD_VENDOR_WRITE_BBP 0x0D730119
537#define CMDTHREAD_VENDOR_READ_BBP 0x0D730118
538#define CMDTHREAD_VENDOR_WRITE_RF 0x0D73011A
539#define CMDTHREAD_VENDOR_FLIP_IQ 0x0D73011D
540#define CMDTHREAD_RESET_BULK_OUT 0x0D730210
541#define CMDTHREAD_RESET_BULK_IN 0x0D730211
542#define CMDTHREAD_SET_PSM_BIT_SAVE 0x0D730212
543#define CMDTHREAD_SET_RADIO 0x0D730214
544#define CMDTHREAD_UPDATE_TX_RATE 0x0D730216
545#define CMDTHREAD_802_11_ADD_KEY_WEP 0x0D730218
546#define CMDTHREAD_RESET_FROM_ERROR 0x0D73021A
547#define CMDTHREAD_LINK_DOWN 0x0D73021B
548#define CMDTHREAD_RESET_FROM_NDIS 0x0D73021C
549#define CMDTHREAD_CHECK_GPIO 0x0D730215
550#define CMDTHREAD_FORCE_WAKE_UP 0x0D730222
551#define CMDTHREAD_SET_BW 0x0D730225
552#define CMDTHREAD_SET_ASIC_WCID 0x0D730226
553#define CMDTHREAD_SET_ASIC_WCID_CIPHER 0x0D730227
554#define CMDTHREAD_QKERIODIC_EXECUT 0x0D73023D
555#define CMDTHREAD_SET_CLIENT_MAC_ENTRY 0x0D73023E
556#define CMDTHREAD_802_11_QUERY_HARDWARE_REGISTER 0x0D710105
557#define CMDTHREAD_802_11_SET_PHY_MODE 0x0D79010C
558#define CMDTHREAD_802_11_SET_STA_CONFIG 0x0D790111
559#define CMDTHREAD_802_11_SET_PREAMBLE 0x0D790101
560#define CMDTHREAD_802_11_COUNTER_MEASURE 0x0D790102
561#define CMDTHREAD_UPDATE_PROTECT 0x0D790103
562
563#define WPA1AKMBIT 0x01
564#define WPA2AKMBIT 0x02
565#define WPA1PSKAKMBIT 0x04
566#define WPA2PSKAKMBIT 0x08
567#define TKIPBIT 0x01
568#define CCMPBIT 0x02
569
570
571#define RT28XX_STA_FORCE_WAKEUP(pAd, bFromTx) \
572 RT28xxUsbStaAsicForceWakeup(pAd, bFromTx);
573
574#define RT28XX_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
575 RT28xxUsbStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
576
577#define RT28XX_MLME_RADIO_ON(pAd) \
578 RT28xxUsbMlmeRadioOn(pAd);
579
580#define RT28XX_MLME_RADIO_OFF(pAd) \
581 RT28xxUsbMlmeRadioOFF(pAd);
582
583#endif
584