linux/drivers/staging/rt3090/common/rtmp_init.c
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   1/*
   2 *************************************************************************
   3 * Ralink Tech Inc.
   4 * 5F., No.36, Taiyuan St., Jhubei City,
   5 * Hsinchu County 302,
   6 * Taiwan, R.O.C.
   7 *
   8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9 *
  10 * This program is free software; you can redistribute it and/or modify  *
  11 * it under the terms of the GNU General Public License as published by  *
  12 * the Free Software Foundation; either version 2 of the License, or     *
  13 * (at your option) any later version.                                   *
  14 *                                                                       *
  15 * This program is distributed in the hope that it will be useful,       *
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18 * GNU General Public License for more details.                          *
  19 *                                                                       *
  20 * You should have received a copy of the GNU General Public License     *
  21 * along with this program; if not, write to the                         *
  22 * Free Software Foundation, Inc.,                                       *
  23 * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24 *                                                                       *
  25 *************************************************************************
  26
  27        Module Name:
  28        rtmp_init.c
  29
  30        Abstract:
  31        Miniport generic portion header file
  32
  33        Revision History:
  34        Who         When          What
  35        --------    ----------    ----------------------------------------------
  36*/
  37
  38#include "../rt_config.h"
  39
  40
  41UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  42char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  43
  44//
  45// BBP register initialization set
  46//
  47REG_PAIR   BBPRegTable[] = {
  48        {BBP_R65,               0x2C},          // fix rssi issue
  49        {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  50        {BBP_R69,               0x12},
  51        {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
  52        {BBP_R73,               0x10},
  53        {BBP_R81,               0x37},
  54        {BBP_R82,               0x62},
  55        {BBP_R83,               0x6A},
  56        {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
  57        {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
  58        {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
  59        {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
  60        {BBP_R103,              0x00},  // near range high-power issue, requested from Gary @2008-0528
  61        {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
  62        {BBP_R106,              0x35},  // for ShortGI throughput
  63};
  64#define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
  65
  66
  67//
  68// ASIC register initialization sets
  69//
  70
  71RTMP_REG_PAIR   MACRegTable[] = {
  72#if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
  73        {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
  74        {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
  75#elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
  76        {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  77        {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  78#else
  79    #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
  80#endif // HW_BEACON_OFFSET //
  81
  82        {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
  83        {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
  84        {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
  85        {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
  86        {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
  87        //{TX_SW_CFG0,          0x40a06}, // Gary,2006-08-23
  88        {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
  89        {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
  90        {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
  91        //{TX_TIMEOUT_CFG,      0x00182090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
  92        {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
  93        {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
  94        {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
  95
  96//#ifdef CONFIG_AP_SUPPORT
  97//      {WMM_AIFSN_CFG,         0x00001173},
  98//      {WMM_CWMIN_CFG,         0x00002344},
  99//      {WMM_CWMAX_CFG,         0x000034a6},
 100//      {WMM_TXOP0_CFG,         0x00100020},
 101//      {WMM_TXOP1_CFG,         0x002F0038},
 102//#endif // CONFIG_AP_SUPPORT //
 103
 104//#ifdef CONFIG_STA_SUPPORT
 105//      {WMM_AIFSN_CFG,         0x00002273},
 106//      {WMM_CWMIN_CFG,         0x00002344},
 107//      {WMM_CWMAX_CFG,         0x000034aa},
 108//#endif // CONFIG_STA_SUPPORT //
 109#ifdef INF_AMAZON_SE
 110        {PBF_MAX_PCNT,                  0x1F3F6F6F},    //iverson modify for usb issue, 2008/09/19
 111                                                                                        // 6F + 6F < total page count FE
 112                                                                                        // so that RX doesn't occupy TX's buffer space when WMM congestion.
 113#else
 114        {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 115#endif // INF_AMAZON_SE //
 116        //{TX_RTY_CFG,                  0x6bb80408},    // Jan, 2006/11/16
 117// WMM_ACM_SUPPORT
 118//      {TX_RTY_CFG,                    0x6bb80101},    // sample
 119        {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 120
 121        {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 122        {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 123        {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 124        {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 125        {GF40_PROT_CFG,                 0x03F44084},
 126        {MM20_PROT_CFG,                 0x01744004},
 127#ifdef RTMP_MAC_PCI
 128        {MM40_PROT_CFG,                 0x03F54084},
 129#endif // RTMP_MAC_PCI //
 130        {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 131        {TX_RTS_CFG,                    0x00092b20},
 132//#ifdef WIFI_TEST
 133        {EXP_ACK_TIME,                  0x002400ca},    // default value
 134//#else
 135//      {EXP_ACK_TIME,                  0x005400ca},    // suggested by Gray @ 20070323 for 11n intel-sta throughput
 136//#endif // end - WIFI_TEST //
 137//#ifdef CONFIG_AP_SUPPORT
 138//      {TBTT_SYNC_CFG,                 0x00422000},    // TBTT_ADJUST(7:0) == 0
 139//      {TBTT_SYNC_CFG,                 0x00012000},    // TBTT_ADJUST(7:0) == 0
 140//#endif // CONFIG_AP_SUPPORT //
 141        {TXOP_HLDR_ET,                  0x00000002},
 142
 143        /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 144                is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 145                and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 146                will always lost. So we change the SIFS of CCK from 10us to 16us. */
 147        {XIFS_TIME_CFG,                 0x33a41010},
 148        {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 149};
 150
 151
 152#ifdef CONFIG_STA_SUPPORT
 153RTMP_REG_PAIR   STAMACRegTable[] =      {
 154        {WMM_AIFSN_CFG,         0x00002273},
 155        {WMM_CWMIN_CFG, 0x00002344},
 156        {WMM_CWMAX_CFG, 0x000034aa},
 157};
 158#endif // CONFIG_STA_SUPPORT //
 159
 160#define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 161#ifdef CONFIG_STA_SUPPORT
 162#define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 163#endif // CONFIG_STA_SUPPORT //
 164
 165
 166/*
 167        ========================================================================
 168
 169        Routine Description:
 170                Allocate RTMP_ADAPTER data block and do some initialization
 171
 172        Arguments:
 173                Adapter         Pointer to our adapter
 174
 175        Return Value:
 176                NDIS_STATUS_SUCCESS
 177                NDIS_STATUS_FAILURE
 178
 179        IRQL = PASSIVE_LEVEL
 180
 181        Note:
 182
 183        ========================================================================
 184*/
 185NDIS_STATUS     RTMPAllocAdapterBlock(
 186        IN  PVOID       handle,
 187        OUT     PRTMP_ADAPTER   *ppAdapter)
 188{
 189        PRTMP_ADAPTER   pAd;
 190        NDIS_STATUS             Status;
 191        INT                     index;
 192        UCHAR                   *pBeaconBuf = NULL;
 193
 194        DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 195
 196        *ppAdapter = NULL;
 197
 198        do
 199        {
 200                // Allocate RTMP_ADAPTER memory block
 201                pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 202                if (pBeaconBuf == NULL)
 203                {
 204                        Status = NDIS_STATUS_FAILURE;
 205                        DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 206                        break;
 207                }
 208                NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
 209
 210                Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 211                if (Status != NDIS_STATUS_SUCCESS)
 212                {
 213                        DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 214                        break;
 215                }
 216                pAd->BeaconBuf = pBeaconBuf;
 217                DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
 218
 219
 220                // Init spin locks
 221                NdisAllocateSpinLock(&pAd->MgmtRingLock);
 222#ifdef RTMP_MAC_PCI
 223                NdisAllocateSpinLock(&pAd->RxRingLock);
 224#ifdef RT3090
 225#ifdef CONFIG_STA_SUPPORT
 226        NdisAllocateSpinLock(&pAd->McuCmdLock);
 227#endif // CONFIG_STA_SUPPORT //
 228#endif // RT3090 //
 229#endif // RTMP_MAC_PCI //
 230
 231                for (index =0 ; index < NUM_OF_TX_RING; index++)
 232                {
 233                        NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 234                        NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 235                        pAd->DeQueueRunning[index] = FALSE;
 236                }
 237
 238                NdisAllocateSpinLock(&pAd->irq_lock);
 239
 240
 241        } while (FALSE);
 242
 243        if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 244                kfree(pBeaconBuf);
 245
 246        *ppAdapter = pAd;
 247
 248        DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 249        return Status;
 250}
 251
 252
 253/*
 254        ========================================================================
 255
 256        Routine Description:
 257                Read initial Tx power per MCS and BW from EEPROM
 258
 259        Arguments:
 260                Adapter                                         Pointer to our adapter
 261
 262        Return Value:
 263                None
 264
 265        IRQL = PASSIVE_LEVEL
 266
 267        Note:
 268
 269        ========================================================================
 270*/
 271VOID    RTMPReadTxPwrPerRate(
 272        IN      PRTMP_ADAPTER   pAd)
 273{
 274        ULONG           data, Adata, Gdata;
 275        USHORT          i, value, value2;
 276        INT                     Apwrdelta, Gpwrdelta;
 277        UCHAR           t1,t2,t3,t4;
 278        BOOLEAN         bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 279
 280        //
 281        // Get power delta for 20MHz and 40MHz.
 282        //
 283        DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 284        RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 285        Apwrdelta = 0;
 286        Gpwrdelta = 0;
 287
 288        if ((value2 & 0xff) != 0xff)
 289        {
 290                if ((value2 & 0x80))
 291                        Gpwrdelta = (value2&0xf);
 292
 293                if ((value2 & 0x40))
 294                        bGpwrdeltaMinus = FALSE;
 295                else
 296                        bGpwrdeltaMinus = TRUE;
 297        }
 298        if ((value2 & 0xff00) != 0xff00)
 299        {
 300                if ((value2 & 0x8000))
 301                        Apwrdelta = ((value2&0xf00)>>8);
 302
 303                if ((value2 & 0x4000))
 304                        bApwrdeltaMinus = FALSE;
 305                else
 306                        bApwrdeltaMinus = TRUE;
 307        }
 308        DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 309
 310        //
 311        // Get Txpower per MCS for 20MHz in 2.4G.
 312        //
 313        for (i=0; i<5; i++)
 314        {
 315                RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 316                data = value;
 317                if (bApwrdeltaMinus == FALSE)
 318                {
 319                        t1 = (value&0xf)+(Apwrdelta);
 320                        if (t1 > 0xf)
 321                                t1 = 0xf;
 322                        t2 = ((value&0xf0)>>4)+(Apwrdelta);
 323                        if (t2 > 0xf)
 324                                t2 = 0xf;
 325                        t3 = ((value&0xf00)>>8)+(Apwrdelta);
 326                        if (t3 > 0xf)
 327                                t3 = 0xf;
 328                        t4 = ((value&0xf000)>>12)+(Apwrdelta);
 329                        if (t4 > 0xf)
 330                                t4 = 0xf;
 331                }
 332                else
 333                {
 334                        if ((value&0xf) > Apwrdelta)
 335                                t1 = (value&0xf)-(Apwrdelta);
 336                        else
 337                                t1 = 0;
 338                        if (((value&0xf0)>>4) > Apwrdelta)
 339                                t2 = ((value&0xf0)>>4)-(Apwrdelta);
 340                        else
 341                                t2 = 0;
 342                        if (((value&0xf00)>>8) > Apwrdelta)
 343                                t3 = ((value&0xf00)>>8)-(Apwrdelta);
 344                        else
 345                                t3 = 0;
 346                        if (((value&0xf000)>>12) > Apwrdelta)
 347                                t4 = ((value&0xf000)>>12)-(Apwrdelta);
 348                        else
 349                                t4 = 0;
 350                }
 351                Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 352                if (bGpwrdeltaMinus == FALSE)
 353                {
 354                        t1 = (value&0xf)+(Gpwrdelta);
 355                        if (t1 > 0xf)
 356                                t1 = 0xf;
 357                        t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 358                        if (t2 > 0xf)
 359                                t2 = 0xf;
 360                        t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 361                        if (t3 > 0xf)
 362                                t3 = 0xf;
 363                        t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 364                        if (t4 > 0xf)
 365                                t4 = 0xf;
 366                }
 367                else
 368                {
 369                        if ((value&0xf) > Gpwrdelta)
 370                                t1 = (value&0xf)-(Gpwrdelta);
 371                        else
 372                                t1 = 0;
 373                        if (((value&0xf0)>>4) > Gpwrdelta)
 374                                t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 375                        else
 376                                t2 = 0;
 377                        if (((value&0xf00)>>8) > Gpwrdelta)
 378                                t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 379                        else
 380                                t3 = 0;
 381                        if (((value&0xf000)>>12) > Gpwrdelta)
 382                                t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 383                        else
 384                                t4 = 0;
 385                }
 386                Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 387
 388                RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 389                if (bApwrdeltaMinus == FALSE)
 390                {
 391                        t1 = (value&0xf)+(Apwrdelta);
 392                        if (t1 > 0xf)
 393                                t1 = 0xf;
 394                        t2 = ((value&0xf0)>>4)+(Apwrdelta);
 395                        if (t2 > 0xf)
 396                                t2 = 0xf;
 397                        t3 = ((value&0xf00)>>8)+(Apwrdelta);
 398                        if (t3 > 0xf)
 399                                t3 = 0xf;
 400                        t4 = ((value&0xf000)>>12)+(Apwrdelta);
 401                        if (t4 > 0xf)
 402                                t4 = 0xf;
 403                }
 404                else
 405                {
 406                        if ((value&0xf) > Apwrdelta)
 407                                t1 = (value&0xf)-(Apwrdelta);
 408                        else
 409                                t1 = 0;
 410                        if (((value&0xf0)>>4) > Apwrdelta)
 411                                t2 = ((value&0xf0)>>4)-(Apwrdelta);
 412                        else
 413                                t2 = 0;
 414                        if (((value&0xf00)>>8) > Apwrdelta)
 415                                t3 = ((value&0xf00)>>8)-(Apwrdelta);
 416                        else
 417                                t3 = 0;
 418                        if (((value&0xf000)>>12) > Apwrdelta)
 419                                t4 = ((value&0xf000)>>12)-(Apwrdelta);
 420                        else
 421                                t4 = 0;
 422                }
 423                Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 424                if (bGpwrdeltaMinus == FALSE)
 425                {
 426                        t1 = (value&0xf)+(Gpwrdelta);
 427                        if (t1 > 0xf)
 428                                t1 = 0xf;
 429                        t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 430                        if (t2 > 0xf)
 431                                t2 = 0xf;
 432                        t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 433                        if (t3 > 0xf)
 434                                t3 = 0xf;
 435                        t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 436                        if (t4 > 0xf)
 437                                t4 = 0xf;
 438                }
 439                else
 440                {
 441                        if ((value&0xf) > Gpwrdelta)
 442                                t1 = (value&0xf)-(Gpwrdelta);
 443                        else
 444                                t1 = 0;
 445                        if (((value&0xf0)>>4) > Gpwrdelta)
 446                                t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 447                        else
 448                                t2 = 0;
 449                        if (((value&0xf00)>>8) > Gpwrdelta)
 450                                t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 451                        else
 452                                t3 = 0;
 453                        if (((value&0xf000)>>12) > Gpwrdelta)
 454                                t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 455                        else
 456                                t4 = 0;
 457                }
 458                Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 459                data |= (value<<16);
 460
 461                /* For 20M/40M Power Delta issue */
 462                pAd->Tx20MPwrCfgABand[i] = data;
 463                pAd->Tx20MPwrCfgGBand[i] = data;
 464                pAd->Tx40MPwrCfgABand[i] = Adata;
 465                pAd->Tx40MPwrCfgGBand[i] = Gdata;
 466
 467                if (data != 0xffffffff)
 468                        RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 469                DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 470        }
 471}
 472
 473
 474/*
 475        ========================================================================
 476
 477        Routine Description:
 478                Read initial channel power parameters from EEPROM
 479
 480        Arguments:
 481                Adapter                                         Pointer to our adapter
 482
 483        Return Value:
 484                None
 485
 486        IRQL = PASSIVE_LEVEL
 487
 488        Note:
 489
 490        ========================================================================
 491*/
 492VOID    RTMPReadChannelPwr(
 493        IN      PRTMP_ADAPTER   pAd)
 494{
 495        UCHAR                           i, choffset;
 496        EEPROM_TX_PWR_STRUC         Power;
 497        EEPROM_TX_PWR_STRUC         Power2;
 498
 499        // Read Tx power value for all channels
 500        // Value from 1 - 0x7f. Default value is 24.
 501        // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 502        //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 503
 504        // 0. 11b/g, ch1 - ch 14
 505        for (i = 0; i < 7; i++)
 506        {
 507                RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 508                RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 509                pAd->TxPower[i * 2].Channel = i * 2 + 1;
 510                pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 511
 512                if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 513                        pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 514                else
 515                        pAd->TxPower[i * 2].Power = Power.field.Byte0;
 516
 517                if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 518                        pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 519                else
 520                        pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 521
 522                if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 523                        pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 524                else
 525                        pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 526
 527                if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 528                        pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 529                else
 530                        pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 531        }
 532
 533        // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 534        // 1.1 Fill up channel
 535        choffset = 14;
 536        for (i = 0; i < 4; i++)
 537        {
 538                pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 539                pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 540                pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 541
 542                pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 543                pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 544                pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 545
 546                pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 547                pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 548                pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 549        }
 550
 551        // 1.2 Fill up power
 552        for (i = 0; i < 6; i++)
 553        {
 554                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 555                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 556
 557                if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 558                        pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 559
 560                if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 561                        pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 562
 563                if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 564                        pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 565
 566                if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 567                        pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 568        }
 569
 570        // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 571        // 2.1 Fill up channel
 572        choffset = 14 + 12;
 573        for (i = 0; i < 5; i++)
 574        {
 575                pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 576                pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 577                pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 578
 579                pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 580                pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 581                pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 582
 583                pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 584                pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 585                pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 586        }
 587        pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 588        pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 589        pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 590
 591        // 2.2 Fill up power
 592        for (i = 0; i < 8; i++)
 593        {
 594                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 595                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 596
 597                if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 598                        pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 599
 600                if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 601                        pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 602
 603                if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 604                        pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 605
 606                if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 607                        pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 608        }
 609
 610        // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)
 611        // 3.1 Fill up channel
 612        choffset = 14 + 12 + 16;
 613        /*for (i = 0; i < 2; i++)*/
 614        for (i = 0; i < 3; i++)
 615        {
 616                pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 617                pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 618                pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 619
 620                pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 621                pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 622                pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 623
 624                pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 625                pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 626                pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 627        }
 628        pAd->TxPower[3 * 3 + choffset + 0].Channel              = 171;
 629        pAd->TxPower[3 * 3 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 630        pAd->TxPower[3 * 3 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 631
 632        pAd->TxPower[3 * 3 + choffset + 1].Channel              = 173;
 633        pAd->TxPower[3 * 3 + choffset + 1].Power                = DEFAULT_RF_TX_POWER;
 634        pAd->TxPower[3 * 3 + choffset + 1].Power2               = DEFAULT_RF_TX_POWER;
 635
 636        // 3.2 Fill up power
 637        /*for (i = 0; i < 4; i++)*/
 638        for (i = 0; i < 6; i++)
 639        {
 640                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 641                RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 642
 643                if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 644                        pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 645
 646                if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 647                        pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 648
 649                if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 650                        pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 651
 652                if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 653                        pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 654        }
 655
 656        // 4. Print and Debug
 657        /*choffset = 14 + 12 + 16 + 7;*/
 658        choffset = 14 + 12 + 16 + 11;
 659
 660
 661}
 662
 663/*
 664        ========================================================================
 665
 666        Routine Description:
 667                Read the following from the registry
 668                1. All the parameters
 669                2. NetworkAddres
 670
 671        Arguments:
 672                Adapter                                         Pointer to our adapter
 673                WrapperConfigurationContext     For use by NdisOpenConfiguration
 674
 675        Return Value:
 676                NDIS_STATUS_SUCCESS
 677                NDIS_STATUS_FAILURE
 678                NDIS_STATUS_RESOURCES
 679
 680        IRQL = PASSIVE_LEVEL
 681
 682        Note:
 683
 684        ========================================================================
 685*/
 686NDIS_STATUS     NICReadRegParameters(
 687        IN      PRTMP_ADAPTER           pAd,
 688        IN      NDIS_HANDLE                     WrapperConfigurationContext
 689        )
 690{
 691        NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
 692        DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
 693        return Status;
 694}
 695
 696
 697/*
 698        ========================================================================
 699
 700        Routine Description:
 701                Read initial parameters from EEPROM
 702
 703        Arguments:
 704                Adapter                                         Pointer to our adapter
 705
 706        Return Value:
 707                None
 708
 709        IRQL = PASSIVE_LEVEL
 710
 711        Note:
 712
 713        ========================================================================
 714*/
 715VOID    NICReadEEPROMParameters(
 716        IN      PRTMP_ADAPTER   pAd,
 717        IN      PUCHAR                  mac_addr)
 718{
 719        UINT32                  data = 0;
 720        USHORT                  i, value, value2;
 721        UCHAR                   TmpPhy;
 722        EEPROM_TX_PWR_STRUC         Power;
 723        EEPROM_VERSION_STRUC    Version;
 724        EEPROM_ANTENNA_STRUC    Antenna;
 725        EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
 726
 727        DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
 728
 729        if (pAd->chipOps.eeinit)
 730                pAd->chipOps.eeinit(pAd);
 731#ifdef RTMP_EFUSE_SUPPORT
 732#ifdef RT30xx
 733        if(!pAd->bFroceEEPROMBuffer && pAd->bEEPROMFile)
 734        {
 735                DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters::(Efuse)Load  to EEPROM Buffer Mode\n"));
 736                eFuseLoadEEPROM(pAd);
 737        }
 738#endif // RT30xx //
 739#endif // RTMP_EFUSE_SUPPORT //
 740
 741        // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
 742        RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
 743        DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
 744
 745        if((data & 0x30) == 0)
 746                pAd->EEPROMAddressNum = 6;              // 93C46
 747        else if((data & 0x30) == 0x10)
 748                pAd->EEPROMAddressNum = 8;     // 93C66
 749        else
 750                pAd->EEPROMAddressNum = 8;     // 93C86
 751        DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
 752
 753        // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
 754        // MAC address registers according to E2PROM setting
 755        if (mac_addr == NULL ||
 756                strlen((PSTRING) mac_addr) != 17 ||
 757                mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
 758                mac_addr[11] != ':' || mac_addr[14] != ':')
 759        {
 760                USHORT  Addr01,Addr23,Addr45 ;
 761
 762                RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
 763                RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
 764                RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
 765
 766                pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
 767                pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
 768                pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
 769                pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
 770                pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
 771                pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
 772
 773                DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
 774        }
 775        else
 776        {
 777                INT             j;
 778                PSTRING macptr;
 779
 780                macptr = (PSTRING) mac_addr;
 781
 782                for (j=0; j<MAC_ADDR_LEN; j++)
 783                {
 784                        AtoH(macptr, &pAd->PermanentAddress[j], 1);
 785                        macptr=macptr+3;
 786                }
 787
 788                DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
 789        }
 790
 791
 792        {
 793                //more conveninet to test mbssid, so ap's bssid &0xf1
 794                if (pAd->PermanentAddress[0] == 0xff)
 795                        pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
 796
 797                //if (pAd->PermanentAddress[5] == 0xff)
 798                //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
 799
 800                DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 801                        pAd->PermanentAddress[0], pAd->PermanentAddress[1],
 802                        pAd->PermanentAddress[2], pAd->PermanentAddress[3],
 803                        pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
 804                if (pAd->bLocalAdminMAC == FALSE)
 805                {
 806                        MAC_DW0_STRUC csr2;
 807                        MAC_DW1_STRUC csr3;
 808                        COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
 809                        csr2.field.Byte0 = pAd->CurrentAddress[0];
 810                        csr2.field.Byte1 = pAd->CurrentAddress[1];
 811                        csr2.field.Byte2 = pAd->CurrentAddress[2];
 812                        csr2.field.Byte3 = pAd->CurrentAddress[3];
 813                        RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
 814                        csr3.word = 0;
 815                        csr3.field.Byte4 = pAd->CurrentAddress[4];
 816                        csr3.field.Byte5 = pAd->CurrentAddress[5];
 817                        csr3.field.U2MeMask = 0xff;
 818                        RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
 819                        DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 820                                                        PRINT_MAC(pAd->PermanentAddress)));
 821                }
 822        }
 823
 824        // if not return early. cause fail at emulation.
 825        // Init the channel number for TX channel power
 826        RTMPReadChannelPwr(pAd);
 827
 828        // if E2PROM version mismatch with driver's expectation, then skip
 829        // all subsequent E2RPOM retieval and set a system error bit to notify GUI
 830        RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
 831        pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
 832        DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
 833
 834        if (Version.field.Version > VALID_EEPROM_VERSION)
 835        {
 836                DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
 837                /*pAd->SystemErrorBitmap |= 0x00000001;
 838
 839                // hard-code default value when no proper E2PROM installed
 840                pAd->bAutoTxAgcA = FALSE;
 841                pAd->bAutoTxAgcG = FALSE;
 842
 843                // Default the channel power
 844                for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
 845                        pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
 846
 847                // Default the channel power
 848                for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
 849                        pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
 850
 851                for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
 852                        pAd->EEPROMDefaultValue[i] = 0xffff;
 853                return;  */
 854        }
 855
 856        // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
 857        RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
 858        pAd->EEPROMDefaultValue[0] = value;
 859
 860        RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
 861        pAd->EEPROMDefaultValue[1] = value;
 862
 863        RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
 864        pAd->EEPROMDefaultValue[2] = value;
 865
 866        for(i = 0; i < 8; i++)
 867        {
 868                RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
 869                pAd->EEPROMDefaultValue[i+3] = value;
 870        }
 871
 872        // We have to parse NIC configuration 0 at here.
 873        // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
 874        // Therefore, we have to read TxAutoAgc control beforehand.
 875        // Read Tx AGC control bit
 876        Antenna.word = pAd->EEPROMDefaultValue[0];
 877        if (Antenna.word == 0xFFFF)
 878        {
 879#ifdef RT30xx
 880                if(IS_RT3090(pAd)|| IS_RT3390(pAd))
 881                {
 882                        Antenna.word = 0;
 883                        Antenna.field.RfIcType = RFIC_3020;
 884                        Antenna.field.TxPath = 1;
 885                        Antenna.field.RxPath = 1;
 886                }
 887                else
 888#endif // RT30xx //
 889                {
 890
 891                        Antenna.word = 0;
 892                        Antenna.field.RfIcType = RFIC_2820;
 893                        Antenna.field.TxPath = 1;
 894                        Antenna.field.RxPath = 2;
 895                        DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
 896                }
 897        }
 898
 899        // Choose the desired Tx&Rx stream.
 900        if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
 901                pAd->CommonCfg.TxStream = Antenna.field.TxPath;
 902
 903        if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
 904        {
 905                pAd->CommonCfg.RxStream = Antenna.field.RxPath;
 906
 907                if ((pAd->MACVersion < RALINK_2883_VERSION) &&
 908                        (pAd->CommonCfg.RxStream > 2))
 909                {
 910                        // only 2 Rx streams for RT2860 series
 911                        pAd->CommonCfg.RxStream = 2;
 912                }
 913        }
 914
 915        // 3*3
 916        // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
 917        // yet implement
 918        for(i=0; i<3; i++)
 919        {
 920        }
 921
 922        NicConfig2.word = pAd->EEPROMDefaultValue[1];
 923
 924
 925
 926#ifdef CONFIG_STA_SUPPORT
 927        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
 928        {
 929                if ((NicConfig2.word & 0x00ff) == 0xff)
 930                {
 931                        NicConfig2.word &= 0xff00;
 932                }
 933
 934                if ((NicConfig2.word >> 8) == 0xff)
 935                {
 936                        NicConfig2.word &= 0x00ff;
 937                }
 938        }
 939#endif // CONFIG_STA_SUPPORT //
 940
 941        if (NicConfig2.field.DynamicTxAgcControl == 1)
 942                pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
 943        else
 944                pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
 945
 946        DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
 947
 948        // Save the antenna for future use
 949        pAd->Antenna.word = Antenna.word;
 950
 951        // Set the RfICType here, then we can initialize RFIC related operation callbacks
 952        pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
 953        pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
 954
 955#ifdef RTMP_RF_RW_SUPPORT
 956        RtmpChipOpsRFHook(pAd);
 957#endif // RTMP_RF_RW_SUPPORT //
 958
 959        //
 960        // Reset PhyMode if we don't support 802.11a
 961        // Only RFIC_2850 & RFIC_2750 support 802.11a
 962        //
 963        if ((Antenna.field.RfIcType != RFIC_2850)
 964                && (Antenna.field.RfIcType != RFIC_2750)
 965                && (Antenna.field.RfIcType != RFIC_3052))
 966        {
 967                if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
 968                        (pAd->CommonCfg.PhyMode == PHY_11A))
 969                        pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
 970#ifdef DOT11_N_SUPPORT
 971                else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
 972                                 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
 973                                 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
 974                                 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
 975                        pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
 976#endif // DOT11_N_SUPPORT //
 977        }
 978
 979        // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
 980        // 0. 11b/g
 981        {
 982                /* these are tempature reference value (0x00 ~ 0xFE)
 983                   ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
 984                   TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
 985                   TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
 986                RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
 987                pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
 988                pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
 989                RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
 990                pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
 991                pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
 992                RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
 993                pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
 994                pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
 995                RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
 996                pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
 997                pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
 998                RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
 999                pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1000                pAd->TxAgcStepG = Power.field.Byte1;
1001                pAd->TxAgcCompensateG = 0;
1002                pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1003                pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1004
1005                // Disable TxAgc if the based value is not right
1006                if (pAd->TssiRefG == 0xff)
1007                        pAd->bAutoTxAgcG = FALSE;
1008
1009                DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1010                        pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1011                        pAd->TssiRefG,
1012                        pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1013                        pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1014        }
1015        // 1. 11a
1016        {
1017                RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1018                pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1019                pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1020                RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1021                pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1022                pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1023                RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1024                pAd->TssiRefA   = Power.field.Byte0;
1025                pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1026                RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1027                pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1028                pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1029                RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1030                pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1031                pAd->TxAgcStepA = Power.field.Byte1;
1032                pAd->TxAgcCompensateA = 0;
1033                pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1034                pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1035
1036                // Disable TxAgc if the based value is not right
1037                if (pAd->TssiRefA == 0xff)
1038                        pAd->bAutoTxAgcA = FALSE;
1039
1040                DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1041                        pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1042                        pAd->TssiRefA,
1043                        pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1044                        pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1045        }
1046        pAd->BbpRssiToDbmDelta = 0x0;
1047
1048        // Read frequency offset setting for RF
1049        RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1050        if ((value & 0x00FF) != 0x00FF)
1051                pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1052        else
1053                pAd->RfFreqOffset = 0;
1054        DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1055
1056        //CountryRegion byte offset (38h)
1057        value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1058        value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1059
1060        if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1061        {
1062                pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1063                pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1064                TmpPhy = pAd->CommonCfg.PhyMode;
1065                pAd->CommonCfg.PhyMode = 0xff;
1066                RTMPSetPhyMode(pAd, TmpPhy);
1067#ifdef DOT11_N_SUPPORT
1068                SetCommonHT(pAd);
1069#endif // DOT11_N_SUPPORT //
1070        }
1071
1072        //
1073        // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1074        // The valid value are (-10 ~ 10)
1075        //
1076        RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1077        pAd->BGRssiOffset0 = value & 0x00ff;
1078        pAd->BGRssiOffset1 = (value >> 8);
1079        RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1080        pAd->BGRssiOffset2 = value & 0x00ff;
1081        pAd->ALNAGain1 = (value >> 8);
1082        RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1083        pAd->BLNAGain = value & 0x00ff;
1084        pAd->ALNAGain0 = (value >> 8);
1085
1086        // Validate 11b/g RSSI_0 offset.
1087        if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1088                pAd->BGRssiOffset0 = 0;
1089
1090        // Validate 11b/g RSSI_1 offset.
1091        if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1092                pAd->BGRssiOffset1 = 0;
1093
1094        // Validate 11b/g RSSI_2 offset.
1095        if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1096                pAd->BGRssiOffset2 = 0;
1097
1098        RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1099        pAd->ARssiOffset0 = value & 0x00ff;
1100        pAd->ARssiOffset1 = (value >> 8);
1101        RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1102        pAd->ARssiOffset2 = value & 0x00ff;
1103        pAd->ALNAGain2 = (value >> 8);
1104
1105        if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1106                pAd->ALNAGain1 = pAd->ALNAGain0;
1107        if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1108                pAd->ALNAGain2 = pAd->ALNAGain0;
1109
1110        // Validate 11a RSSI_0 offset.
1111        if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1112                pAd->ARssiOffset0 = 0;
1113
1114        // Validate 11a RSSI_1 offset.
1115        if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1116                pAd->ARssiOffset1 = 0;
1117
1118        //Validate 11a RSSI_2 offset.
1119        if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1120                pAd->ARssiOffset2 = 0;
1121
1122#ifdef RT30xx
1123        //
1124        // Get TX mixer gain setting
1125        // 0xff are invalid value
1126        // Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.
1127        //       RT359X default value is 0x02
1128        //
1129        if (IS_RT30xx(pAd) || IS_RT3572(pAd))
1130        {
1131                RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1132                pAd->TxMixerGain24G = 0;
1133                value &= 0x00ff;
1134                if (value != 0xff)
1135                {
1136                        value &= 0x07;
1137                        pAd->TxMixerGain24G = (UCHAR)value;
1138                }
1139        }
1140#endif // RT30xx //
1141
1142        //
1143        // Get LED Setting.
1144        //
1145        RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1146        pAd->LedCntl.word = (value>>8);
1147        RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1148        pAd->Led1 = value;
1149        RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1150        pAd->Led2 = value;
1151        RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1152        pAd->Led3 = value;
1153
1154        RTMPReadTxPwrPerRate(pAd);
1155
1156#ifdef SINGLE_SKU
1157        RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1158#endif // SINGLE_SKU //
1159
1160#ifdef RT30xx
1161#ifdef RTMP_EFUSE_SUPPORT
1162        RtmpEfuseSupportCheck(pAd);
1163#endif // RTMP_EFUSE_SUPPORT //
1164#endif // RT30xx //
1165
1166        DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1167}
1168
1169
1170/*
1171        ========================================================================
1172
1173        Routine Description:
1174                Set default value from EEPROM
1175
1176        Arguments:
1177                Adapter                                         Pointer to our adapter
1178
1179        Return Value:
1180                None
1181
1182        IRQL = PASSIVE_LEVEL
1183
1184        Note:
1185
1186        ========================================================================
1187*/
1188VOID    NICInitAsicFromEEPROM(
1189        IN      PRTMP_ADAPTER   pAd)
1190{
1191#ifdef CONFIG_STA_SUPPORT
1192        UINT32                                  data = 0;
1193        UCHAR   BBPR1 = 0;
1194#endif // CONFIG_STA_SUPPORT //
1195        USHORT                                  i;
1196//      EEPROM_ANTENNA_STRUC    Antenna;
1197        EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1198        UCHAR   BBPR3 = 0;
1199
1200        DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1201        for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1202        {
1203                UCHAR BbpRegIdx, BbpValue;
1204
1205                if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1206                {
1207                        BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1208                        BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1209                        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1210                }
1211        }
1212
1213
1214        NicConfig2.word = pAd->EEPROMDefaultValue[1];
1215
1216
1217#ifdef CONFIG_STA_SUPPORT
1218        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1219        {
1220                if ((NicConfig2.word & 0x00ff) == 0xff)
1221                {
1222                        NicConfig2.word &= 0xff00;
1223                }
1224
1225                if ((NicConfig2.word >> 8) == 0xff)
1226                {
1227                        NicConfig2.word &= 0x00ff;
1228                }
1229        }
1230#endif // CONFIG_STA_SUPPORT //
1231
1232        // Save the antenna for future use
1233        pAd->NicConfig2.word = NicConfig2.word;
1234
1235#ifdef RT30xx
1236        // set default antenna as main
1237        if (pAd->RfIcType == RFIC_3020)
1238                AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1239#endif // RT30xx //
1240
1241        //
1242        // Send LED Setting to MCU.
1243        //
1244        if (pAd->LedCntl.word == 0xFF)
1245        {
1246                pAd->LedCntl.word = 0x01;
1247                pAd->Led1 = 0x5555;
1248                pAd->Led2 = 0x2221;
1249
1250#ifdef RTMP_MAC_PCI
1251                pAd->Led3 = 0xA9F8;
1252#endif // RTMP_MAC_PCI //
1253        }
1254
1255        AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1256        AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1257        AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1258        AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1259
1260        pAd->LedIndicatorStrength = 0xFF;
1261        RTMPSetSignalLED(pAd, -100);    // Force signal strength Led to be turned off, before link up
1262
1263#ifdef CONFIG_STA_SUPPORT
1264        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1265        {
1266                // Read Hardware controlled Radio state enable bit
1267                if (NicConfig2.field.HardwareRadioControl == 1)
1268                {
1269                        pAd->StaCfg.bHardwareRadio = TRUE;
1270
1271                        // Read GPIO pin2 as Hardware controlled radio state
1272                        RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1273                        if ((data & 0x04) == 0)
1274                        {
1275                                pAd->StaCfg.bHwRadio = FALSE;
1276                                pAd->StaCfg.bRadio = FALSE;
1277//                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1278                                RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1279                        }
1280                }
1281                else
1282                        pAd->StaCfg.bHardwareRadio = FALSE;
1283
1284                if (pAd->StaCfg.bRadio == FALSE)
1285                {
1286                        RTMPSetLED(pAd, LED_RADIO_OFF);
1287                }
1288                else
1289                {
1290                        RTMPSetLED(pAd, LED_RADIO_ON);
1291#ifdef RTMP_MAC_PCI
1292#ifdef RT3090
1293                        AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff, 0x02);
1294                        AsicCheckCommanOk(pAd, PowerRadioOffCID);
1295#endif // RT3090 //
1296#ifndef RT3090
1297                        AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1298#endif // RT3090 //
1299                        AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1300                        // 2-1. wait command ok.
1301                        AsicCheckCommanOk(pAd, PowerWakeCID);
1302#endif // RTMP_MAC_PCI //
1303                }
1304        }
1305#ifdef RTMP_MAC_PCI
1306#ifdef RT30xx
1307                if (IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd))
1308                {
1309                        RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
1310                        if (pChipOps->AsicReverseRfFromSleepMode)
1311                                pChipOps->AsicReverseRfFromSleepMode(pAd);
1312                }
1313                // 3090 MCU Wakeup command needs more time to be stable.
1314                // Before stable, don't issue other MCU command to prevent from firmware error.
1315
1316                if ((IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)) && IS_VERSION_AFTER_F(pAd)
1317                        && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1318                        && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
1319                {
1320                        DBGPRINT(RT_DEBUG_TRACE,("%s::%d,release Mcu Lock\n",__FUNCTION__,__LINE__));
1321                        RTMP_SEM_LOCK(&pAd->McuCmdLock);
1322                        pAd->brt30xxBanMcuCmd = FALSE;
1323                        RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1324                }
1325#endif // RT30xx //
1326#endif // RTMP_MAC_PCI //
1327#endif // CONFIG_STA_SUPPORT //
1328
1329        // Turn off patching for cardbus controller
1330        if (NicConfig2.field.CardbusAcceleration == 1)
1331        {
1332//              pAd->bTest1 = TRUE;
1333        }
1334
1335        if (NicConfig2.field.DynamicTxAgcControl == 1)
1336                pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1337        else
1338                pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1339        //
1340        // Since BBP has been progamed, to make sure BBP setting will be
1341        // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1342        //
1343        pAd->CommonCfg.BandState = UNKNOWN_BAND;
1344
1345        RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1346        BBPR3 &= (~0x18);
1347        if(pAd->Antenna.field.RxPath == 3)
1348        {
1349                BBPR3 |= (0x10);
1350        }
1351        else if(pAd->Antenna.field.RxPath == 2)
1352        {
1353                BBPR3 |= (0x8);
1354        }
1355        else if(pAd->Antenna.field.RxPath == 1)
1356        {
1357                BBPR3 |= (0x0);
1358        }
1359        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1360
1361#ifdef CONFIG_STA_SUPPORT
1362        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1363        {
1364                // Handle the difference when 1T
1365                RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1366                if(pAd->Antenna.field.TxPath == 1)
1367                {
1368                BBPR1 &= (~0x18);
1369                }
1370                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1371
1372                DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1373                                        pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1374        }
1375#endif // CONFIG_STA_SUPPORT //
1376
1377
1378        DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1379                                pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1380                                pAd->RfIcType, pAd->LedCntl.word));
1381        DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1382}
1383
1384/*
1385        ========================================================================
1386
1387        Routine Description:
1388                Initialize NIC hardware
1389
1390        Arguments:
1391                Adapter                                         Pointer to our adapter
1392
1393        Return Value:
1394                None
1395
1396        IRQL = PASSIVE_LEVEL
1397
1398        Note:
1399
1400        ========================================================================
1401*/
1402NDIS_STATUS     NICInitializeAdapter(
1403        IN      PRTMP_ADAPTER   pAd,
1404        IN   BOOLEAN    bHardReset)
1405{
1406        NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1407        WPDMA_GLO_CFG_STRUC     GloCfg;
1408#ifdef RTMP_MAC_PCI
1409        UINT32                  Value;
1410        DELAY_INT_CFG_STRUC     IntCfg;
1411#endif // RTMP_MAC_PCI //
1412//      INT_MASK_CSR_STRUC              IntMask;
1413        ULONG   i =0, j=0;
1414        AC_TXOP_CSR0_STRUC      csr0;
1415
1416        DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1417
1418        // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1419retry:
1420        i = 0;
1421        do
1422        {
1423                RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1424                if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1425                        break;
1426
1427                RTMPusecDelay(1000);
1428                i++;
1429        }while ( i<100);
1430        DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1431        GloCfg.word &= 0xff0;
1432        GloCfg.field.EnTXWriteBackDDONE =1;
1433        RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1434
1435        // Record HW Beacon offset
1436        pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1437        pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1438        pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1439        pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1440        pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1441        pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1442        pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1443        pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1444
1445        //
1446        // write all shared Ring's base address into ASIC
1447        //
1448
1449        // asic simulation sequence put this ahead before loading firmware.
1450        // pbf hardware reset
1451#ifdef RTMP_MAC_PCI
1452        RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1453        RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1454        RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1455#endif // RTMP_MAC_PCI //
1456
1457        // Initialze ASIC for TX & Rx operation
1458        if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1459        {
1460                if (j++ == 0)
1461                {
1462                        NICLoadFirmware(pAd);
1463                        goto retry;
1464                }
1465                return NDIS_STATUS_FAILURE;
1466        }
1467
1468
1469#ifdef RTMP_MAC_PCI
1470        // Write AC_BK base address register
1471        Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1472        RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1473        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1474
1475        // Write AC_BE base address register
1476        Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1477        RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1478        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1479
1480        // Write AC_VI base address register
1481        Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1482        RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1483        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1484
1485        // Write AC_VO base address register
1486        Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1487        RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1488        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1489
1490        // Write HCCA base address register
1491        /*
1492        Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1493        RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1494        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1495        */
1496
1497        // Write MGMT_BASE_CSR register
1498        Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1499        RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1500        DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1501
1502        // Write RX_BASE_CSR register
1503        Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1504        RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1505        DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1506
1507        // Init RX Ring index pointer
1508        pAd->RxRing.RxSwReadIdx = 0;
1509        pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1510        RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1511
1512        // Init TX rings index pointer
1513        {
1514                for (i=0; i<NUM_OF_TX_RING; i++)
1515                {
1516                        pAd->TxRing[i].TxSwFreeIdx = 0;
1517                        pAd->TxRing[i].TxCpuIdx = 0;
1518                        RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1519                }
1520        }
1521
1522        // init MGMT ring index pointer
1523        pAd->MgmtRing.TxSwFreeIdx = 0;
1524        pAd->MgmtRing.TxCpuIdx = 0;
1525        RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1526
1527        //
1528        // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1529        //
1530
1531        // Write TX_RING_CSR0 register
1532        Value = TX_RING_SIZE;
1533        RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1534        RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1535        RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1536        RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1537        RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1538        Value = MGMT_RING_SIZE;
1539        RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1540
1541        // Write RX_RING_CSR register
1542        Value = RX_RING_SIZE;
1543        RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1544#endif // RTMP_MAC_PCI //
1545
1546
1547        // WMM parameter
1548        csr0.word = 0;
1549        RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1550        if (pAd->CommonCfg.PhyMode == PHY_11B)
1551        {
1552                csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1553                csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1554        }
1555        else
1556        {
1557                csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1558                csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1559        }
1560        RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1561
1562
1563#ifdef RTMP_MAC_PCI
1564        // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1565        i = 0;
1566        do
1567        {
1568                RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1569                if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1570                        break;
1571
1572                RTMPusecDelay(1000);
1573                i++;
1574        }while ( i < 100);
1575
1576        GloCfg.word &= 0xff0;
1577        GloCfg.field.EnTXWriteBackDDONE =1;
1578        RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1579
1580        IntCfg.word = 0;
1581        RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1582#endif // RTMP_MAC_PCI //
1583
1584
1585        // reset action
1586        // Load firmware
1587        //  Status = NICLoadFirmware(pAd);
1588
1589        DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1590        return Status;
1591}
1592
1593/*
1594        ========================================================================
1595
1596        Routine Description:
1597                Initialize ASIC
1598
1599        Arguments:
1600                Adapter                                         Pointer to our adapter
1601
1602        Return Value:
1603                None
1604
1605        IRQL = PASSIVE_LEVEL
1606
1607        Note:
1608
1609        ========================================================================
1610*/
1611NDIS_STATUS     NICInitializeAsic(
1612        IN      PRTMP_ADAPTER   pAd,
1613        IN  BOOLEAN             bHardReset)
1614{
1615        ULONG                   Index = 0;
1616        UCHAR                   R0 = 0xff;
1617        UINT32                  MacCsr12 = 0, Counter = 0;
1618#ifdef RT30xx
1619        UCHAR                   bbpreg=0;
1620        UCHAR                   RFValue=0;
1621#endif // RT30xx //
1622        USHORT                  KeyIdx;
1623        INT                             i,apidx;
1624
1625        DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1626
1627#ifdef RTMP_MAC_PCI
1628        RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); // To fix driver disable/enable hang issue when radio off
1629        if (bHardReset == TRUE)
1630        {
1631                RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1632        }
1633        else
1634                RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1635
1636        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1637        // Initialize MAC register to default value
1638        for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1639        {
1640#ifdef RT30xx
1641                if ((MACRegTable[Index].Register == TX_SW_CFG0) && ( IS_RT3090(pAd) ||  IS_RT3390(pAd)))
1642                {
1643                        MACRegTable[Index].Value = 0x00000400;
1644                }
1645#endif // RT30xx //
1646                RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1647        }
1648
1649
1650#ifdef CONFIG_STA_SUPPORT
1651        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1652        {
1653                for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1654                {
1655                        RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1656                }
1657        }
1658#endif // CONFIG_STA_SUPPORT //
1659#endif // RTMP_MAC_PCI //
1660
1661
1662#ifdef RT30xx
1663        // Initialize RT3070 serial MAC registers which is different from RT2870 serial
1664        if (IS_RT3090(pAd) || IS_RT3572(pAd)||IS_RT3390(pAd))
1665        {
1666                RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1667
1668                // RT3071 version E has fixed this issue
1669                if ((pAd->MACVersion & 0xffff) < 0x0211)
1670                {
1671                        if (pAd->NicConfig2.field.DACTestBit == 1)
1672                        {
1673                                RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1674                        }
1675                        else
1676                        {
1677                                RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
1678                        }
1679                }
1680                else
1681                {
1682                        RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1683                }
1684        }
1685        else if (IS_RT3070(pAd))
1686        {
1687                if (((pAd->MACVersion & 0xffff) < 0x0201))
1688                {
1689                        RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1690                        RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1691                }
1692                else
1693                {
1694                        RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1695                }
1696        }
1697#endif // RT30xx //
1698
1699        //
1700        // Before program BBP, we need to wait BBP/RF get wake up.
1701        //
1702        Index = 0;
1703        do
1704        {
1705                RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1706
1707                if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1708                        break;
1709
1710                DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1711                RTMPusecDelay(1000);
1712        } while (Index++ < 100);
1713
1714        // The commands to firmware should be after these commands, these commands will init firmware
1715        // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1716        RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1717        RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1718#ifdef RT3090
1719        //2008/11/28:KH add to fix the dead rf frequency offset bug<--
1720        AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1721        //2008/11/28:KH add to fix the dead rf frequency offset bug-->
1722#endif // RT3090 //
1723        RTMPusecDelay(1000);
1724
1725        // Read BBP register, make sure BBP is up and running before write new data
1726        Index = 0;
1727        do
1728        {
1729                RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1730                DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1731        } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1732        //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1733
1734        if ((R0 == 0xff) || (R0 == 0x00))
1735                return NDIS_STATUS_FAILURE;
1736
1737        // Initialize BBP register to default value
1738        for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1739        {
1740                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1741        }
1742
1743#ifdef RTMP_MAC_PCI
1744        // TODO: shiang, check MACVersion, currently, rbus-based chip use this.
1745        if (pAd->MACVersion == 0x28720200)
1746        {
1747                //UCHAR value;
1748                ULONG value2;
1749
1750                //disable MLD by Bruce 20080704
1751                //BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value);
1752                //BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4);
1753
1754                //Maximum PSDU length from 16K to 32K bytes
1755                RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1756                value2 &= ~(0x3<<12);
1757                value2 |= (0x2<<12);
1758                RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1759        }
1760#endif // RTMP_MAC_PCI //
1761
1762        // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1763        // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
1764        //3070/71/72,3090,3090A( are included in RT30xx),3572,3390
1765        if (((pAd->MACVersion & 0xffff) != 0x0101) && !(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)))
1766                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1767
1768#ifdef RT30xx
1769// add by johnli, RF power sequence setup
1770        if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1771        {       //update for RT3070/71/72/90/91/92,3572,3390.
1772                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1773                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1774                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1775        }
1776
1777        if (IS_RT3090(pAd)||IS_RT3390(pAd))     // RT309x, RT3071/72
1778        {
1779                // enable DC filter
1780                if ((pAd->MACVersion & 0xffff) >= 0x0211)
1781                {
1782                        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1783                }
1784
1785                // improve power consumption
1786                RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1787                if (pAd->Antenna.field.TxPath == 1)
1788                {
1789                        // turn off tx DAC_1
1790                        bbpreg = (bbpreg | 0x20);
1791                }
1792
1793                if (pAd->Antenna.field.RxPath == 1)
1794                {
1795                        // turn off tx ADC_1
1796                        bbpreg &= (~0x2);
1797                }
1798                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1799
1800                // improve power consumption in RT3071 Ver.E
1801                if ((pAd->MACVersion & 0xffff) >= 0x0211)
1802                {
1803                        RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1804                        bbpreg &= (~0x3);
1805                        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1806                }
1807        }
1808        else if (IS_RT3070(pAd))
1809        {
1810                if ((pAd->MACVersion & 0xffff) >= 0x0201)
1811                {
1812                        // enable DC filter
1813                        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1814
1815                        // improve power consumption in RT3070 Ver.F
1816                        RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1817                        bbpreg &= (~0x3);
1818                        RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1819                }
1820
1821                // TX_LO1_en, RF R17 register Bit 3 to 0
1822                RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1823                RFValue &= (~0x08);
1824                // to fix rx long range issue
1825                if (pAd->NicConfig2.field.ExternalLNAForG == 0)
1826                {
1827                        RFValue |= 0x20;
1828                }
1829                // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
1830                if (pAd->TxMixerGain24G >= 1)
1831                {
1832                        RFValue &= (~0x7);  // clean bit [2:0]
1833                        RFValue |= pAd->TxMixerGain24G;
1834                }
1835                RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1836        }
1837// end johnli
1838#endif // RT30xx //
1839
1840        if (pAd->MACVersion == 0x28600100)
1841        {
1842                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1843                RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1844        }
1845
1846        if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1847        {
1848                // enlarge MAX_LEN_CFG
1849                UINT32 csr;
1850                RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1851                csr &= 0xFFF;
1852                csr |= 0x2000;
1853                RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1854        }
1855
1856
1857#ifdef CONFIG_STA_SUPPORT
1858        // Add radio off control
1859        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1860        {
1861                if (pAd->StaCfg.bRadio == FALSE)
1862                {
1863//                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1864                        RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1865                        DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1866                }
1867        }
1868#endif // CONFIG_STA_SUPPORT //
1869
1870        // Clear raw counters
1871        RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1872        RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1873        RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1874        RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1875        RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1876        RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1877
1878        // ASIC will keep garbage value after boot
1879        // Clear all shared key table when initial
1880        // This routine can be ignored in radio-ON/OFF operation.
1881        if (bHardReset)
1882        {
1883                for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1884                {
1885                        RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1886                }
1887
1888                // Clear all pairwise key table when initial
1889                for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1890                {
1891                        RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1892                }
1893        }
1894
1895        // assert HOST ready bit
1896//  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
1897//  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
1898
1899        // It isn't necessary to clear this space when not hard reset.
1900        if (bHardReset == TRUE)
1901        {
1902                // clear all on-chip BEACON frame space
1903                for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1904                {
1905                        for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1906                                RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1907                }
1908        }
1909
1910
1911#ifdef CONFIG_STA_SUPPORT
1912        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1913        {
1914                // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1915                if ((pAd->MACVersion&0xffff) != 0x0101)
1916                        RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1917        }
1918#endif // CONFIG_STA_SUPPORT //
1919
1920#ifdef RT30xx
1921#ifdef NEW_FW
1922        if (IS_RT3070(pAd) ||  IS_RT3572(pAd)||IS_RT3390(pAd)||IS_RT3090(pAd))
1923        {
1924                // send 0x36 mcu command after 0x72 for RT3xxx to fix Radio-Off current leakage issue
1925                RTMPusecDelay(200);
1926                if (pAd->buseEfuse)
1927                        AsicSendCommandToMcu(pAd, 0x36, 0xff, 0xff, 0);
1928                else
1929                        AsicSendCommandToMcu(pAd, 0x36, 0xff, 0xff, 0x04);
1930                RTMPusecDelay(10);
1931        }
1932#endif // NEW_FW //
1933#endif // RT30xx //
1934
1935        DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1936        return NDIS_STATUS_SUCCESS;
1937}
1938
1939/*
1940        ========================================================================
1941
1942        Routine Description:
1943                Reset NIC Asics
1944
1945        Arguments:
1946                Adapter                                         Pointer to our adapter
1947
1948        Return Value:
1949                None
1950
1951        IRQL = PASSIVE_LEVEL
1952
1953        Note:
1954                Reset NIC to initial state AS IS system boot up time.
1955
1956        ========================================================================
1957*/
1958VOID    NICIssueReset(
1959        IN      PRTMP_ADAPTER   pAd)
1960{
1961        UINT32  Value = 0;
1962        DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1963
1964        // Abort Tx, prevent ASIC from writing to Host memory
1965        //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
1966
1967        // Disable Rx, register value supposed will remain after reset
1968        RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1969        Value &= (0xfffffff3);
1970        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1971
1972        // Issue reset and clear from reset state
1973        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
1974        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1975
1976        DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
1977}
1978
1979/*
1980        ========================================================================
1981
1982        Routine Description:
1983                Check ASIC registers and find any reason the system might hang
1984
1985        Arguments:
1986                Adapter                                         Pointer to our adapter
1987
1988        Return Value:
1989                None
1990
1991        IRQL = DISPATCH_LEVEL
1992
1993        ========================================================================
1994*/
1995BOOLEAN NICCheckForHang(
1996        IN      PRTMP_ADAPTER   pAd)
1997{
1998        return (FALSE);
1999}
2000
2001VOID NICUpdateFifoStaCounters(
2002        IN PRTMP_ADAPTER pAd)
2003{
2004        TX_STA_FIFO_STRUC       StaFifo;
2005        MAC_TABLE_ENTRY         *pEntry;
2006        UCHAR                           i = 0;
2007        UCHAR                   pid = 0, wcid = 0;
2008        CHAR                            reTry;
2009        UCHAR                           succMCS;
2010
2011#ifdef RALINK_ATE
2012        /* Nothing to do in ATE mode */
2013        if (ATE_ON(pAd))
2014                return;
2015#endif // RALINK_ATE //
2016
2017                do
2018                {
2019                        RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2020
2021                        if (StaFifo.field.bValid == 0)
2022                                break;
2023
2024                        wcid = (UCHAR)StaFifo.field.wcid;
2025
2026
2027                /* ignore NoACK and MGMT frame use 0xFF as WCID */
2028                        if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2029                        {
2030                                i++;
2031                                continue;
2032                        }
2033
2034                        /* PID store Tx MCS Rate */
2035                        pid = (UCHAR)StaFifo.field.PidType;
2036
2037                        pEntry = &pAd->MacTab.Content[wcid];
2038
2039                        pEntry->DebugFIFOCount++;
2040
2041#ifdef DOT11_N_SUPPORT
2042                        if (StaFifo.field.TxBF) // 3*3
2043                                pEntry->TxBFCount++;
2044#endif // DOT11_N_SUPPORT //
2045
2046#ifdef UAPSD_AP_SUPPORT
2047                        UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2048#endif // UAPSD_AP_SUPPORT //
2049
2050                        if (!StaFifo.field.TxSuccess)
2051                        {
2052                                pEntry->FIFOCount++;
2053                                pEntry->OneSecTxFailCount++;
2054
2055                                if (pEntry->FIFOCount >= 1)
2056                                {
2057                                        DBGPRINT(RT_DEBUG_TRACE, ("#"));
2058#ifdef DOT11_N_SUPPORT
2059                                        pEntry->NoBADataCountDown = 64;
2060#endif // DOT11_N_SUPPORT //
2061
2062                                        if(pEntry->PsMode == PWR_ACTIVE)
2063                                        {
2064#ifdef DOT11_N_SUPPORT
2065                                                int tid;
2066                                                for (tid=0; tid<NUM_OF_TID; tid++)
2067                                                {
2068                                                        BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2069                                                }
2070#endif // DOT11_N_SUPPORT //
2071
2072                                                // Update the continuous transmission counter except PS mode
2073                                                pEntry->ContinueTxFailCnt++;
2074
2075#ifdef WDS_SUPPORT
2076                                                // fix WDS Jam issue
2077                                                if((pEntry->ValidAsWDS == TRUE)
2078                                                        && (pEntry->LockEntryTx == FALSE)
2079                                                        && (pEntry->ContinueTxFailCnt >= pAd->ApCfg.EntryLifeCheck))
2080                                                {
2081                                                        DBGPRINT(RT_DEBUG_TRACE, ("Entry %02x:%02x:%02x:%02x:%02x:%02x Blocked!! (Fail Cnt = %d)\n",
2082                                                                pEntry->Addr[0],pEntry->Addr[1],pEntry->Addr[2],pEntry->Addr[3],
2083                                                                pEntry->Addr[4],pEntry->Addr[5],pEntry->ContinueTxFailCnt ));
2084
2085                                                        pEntry->LockEntryTx = TRUE;
2086                                                }
2087#endif // WDS_SUPPORT //
2088                                        }
2089                                        else
2090                                        {
2091                                                // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2092                                                //     this tx error happened due to sta just go to sleep.
2093                                                pEntry->FIFOCount = 0;
2094                                                pEntry->ContinueTxFailCnt = 0;
2095                                        }
2096                                        //pEntry->FIFOCount = 0;
2097                                }
2098                                //pEntry->bSendBAR = TRUE;
2099                        }
2100                        else
2101                        {
2102#ifdef DOT11_N_SUPPORT
2103                                if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2104                                {
2105                                        pEntry->NoBADataCountDown--;
2106                                        if (pEntry->NoBADataCountDown==0)
2107                                        {
2108                                                DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2109                                        }
2110                                }
2111#endif // DOT11_N_SUPPORT //
2112                                pEntry->FIFOCount = 0;
2113                                pEntry->OneSecTxNoRetryOkCount++;
2114                                // update NoDataIdleCount when sucessful send packet to STA.
2115                                pEntry->NoDataIdleCount = 0;
2116                                pEntry->ContinueTxFailCnt = 0;
2117#ifdef WDS_SUPPORT
2118                                pEntry->LockEntryTx = FALSE;
2119#endif // WDS_SUPPORT //
2120                        }
2121
2122                        succMCS = StaFifo.field.SuccessRate & 0x7F;
2123
2124                        reTry = pid - succMCS;
2125
2126                        if (StaFifo.field.TxSuccess)
2127                        {
2128                                pEntry->TXMCSExpected[pid]++;
2129                                if (pid == succMCS)
2130                                {
2131                                        pEntry->TXMCSSuccessful[pid]++;
2132                                }
2133                                else
2134                                {
2135                                        pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2136                                }
2137                        }
2138                        else
2139                        {
2140                                pEntry->TXMCSFailed[pid]++;
2141                        }
2142
2143                        if (reTry > 0)
2144                        {
2145                                if ((pid >= 12) && succMCS <=7)
2146                                {
2147                                        reTry -= 4;
2148                                }
2149                                pEntry->OneSecTxRetryOkCount += reTry;
2150                        }
2151
2152                        i++;
2153                        // ASIC store 16 stack
2154                } while ( i < (TX_RING_SIZE<<1) );
2155
2156}
2157
2158/*
2159        ========================================================================
2160
2161        Routine Description:
2162                Read statistical counters from hardware registers and record them
2163                in software variables for later on query
2164
2165        Arguments:
2166                pAd                                     Pointer to our adapter
2167
2168        Return Value:
2169                None
2170
2171        IRQL = DISPATCH_LEVEL
2172
2173        ========================================================================
2174*/
2175VOID NICUpdateRawCounters(
2176        IN PRTMP_ADAPTER pAd)
2177{
2178        UINT32  OldValue;//, Value2;
2179        //ULONG PageSum, OneSecTransmitCount;
2180        //ULONG TxErrorRatio, Retry, Fail;
2181        RX_STA_CNT0_STRUC        RxStaCnt0;
2182        RX_STA_CNT1_STRUC   RxStaCnt1;
2183        RX_STA_CNT2_STRUC   RxStaCnt2;
2184        TX_STA_CNT0_STRUC        TxStaCnt0;
2185        TX_STA_CNT1_STRUC        StaTx1;
2186        TX_STA_CNT2_STRUC        StaTx2;
2187        TX_AGG_CNT_STRUC        TxAggCnt;
2188        TX_AGG_CNT0_STRUC       TxAggCnt0;
2189        TX_AGG_CNT1_STRUC       TxAggCnt1;
2190        TX_AGG_CNT2_STRUC       TxAggCnt2;
2191        TX_AGG_CNT3_STRUC       TxAggCnt3;
2192        TX_AGG_CNT4_STRUC       TxAggCnt4;
2193        TX_AGG_CNT5_STRUC       TxAggCnt5;
2194        TX_AGG_CNT6_STRUC       TxAggCnt6;
2195        TX_AGG_CNT7_STRUC       TxAggCnt7;
2196        COUNTER_RALINK          *pRalinkCounters;
2197
2198
2199        pRalinkCounters = &pAd->RalinkCounters;
2200
2201        RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2202        RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2203
2204        {
2205                RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2206            // Update RX PLCP error counter
2207            pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2208                // Update False CCA counter
2209                pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2210        }
2211
2212        // Update FCS counters
2213        OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2214        pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2215        if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2216                pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2217
2218        // Add FCS error count to private counters
2219        pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2220        OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2221        pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2222        if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2223                pRalinkCounters->RealFcsErrCount.u.HighPart++;
2224
2225        // Update Duplicate Rcv check
2226        pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2227        pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2228        // Update RX Overflow counter
2229        pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2230
2231        //pAd->RalinkCounters.RxCount = 0;
2232
2233
2234        //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2235        //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2236        if (!pAd->bUpdateBcnCntDone)
2237        {
2238        // Update BEACON sent count
2239        RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2240        RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2241        RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2242        pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2243        pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2244        pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2245        pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2246        pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2247        pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2248        pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2249        }
2250
2251
2252        //if (pAd->bStaFifoTest == TRUE)
2253        {
2254                RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2255        RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2256        RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2257        RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2258        RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2259                RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2260                RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2261                RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2262                RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2263                pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2264                pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2265                pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2266                pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2267
2268                pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2269                pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2270                pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2271                pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2272
2273                pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2274                pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2275                pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2276                pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2277
2278                pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2279                pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2280                pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2281                pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2282
2283                pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2284                pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2285
2286                // Calculate the transmitted A-MPDU count
2287                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2288                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2289
2290                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2291                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2292
2293                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2294                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2295
2296                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2297                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2298
2299                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2300                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2301
2302                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2303                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2304
2305                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2306                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2307
2308                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2309                pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2310        }
2311
2312#ifdef DBG_DIAGNOSE
2313        {
2314                RtmpDiagStruct  *pDiag;
2315                UCHAR                   ArrayCurIdx, i;
2316
2317                pDiag = &pAd->DiagStruct;
2318                ArrayCurIdx = pDiag->ArrayCurIdx;
2319
2320                if (pDiag->inited == 0)
2321                {
2322                        NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2323                        pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2324                        pDiag->inited = 1;
2325                }
2326                else
2327                {
2328                        // Tx
2329                        pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2330                        pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2331                        pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2332                        pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2333                        pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2334                        pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2335                        pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2336                        pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2337                        pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2338                        pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2339                        pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2340                        pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2341                        pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2342                        pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2343                        pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2344                        pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2345                        pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2346                        pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2347                        pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2348
2349                        pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2350
2351                        INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2352                        ArrayCurIdx = pDiag->ArrayCurIdx;
2353                        for (i =0; i < 9; i++)
2354                        {
2355                                pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2356                                pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2357                                pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2358                                pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2359                        }
2360                        pDiag->TxDataCnt[ArrayCurIdx] = 0;
2361                        pDiag->TxFailCnt[ArrayCurIdx] = 0;
2362                        pDiag->RxDataCnt[ArrayCurIdx] = 0;
2363                        pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2364//                      for (i = 9; i < 16; i++)
2365                        for (i = 9; i < 24; i++) // 3*3
2366                        {
2367                                pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2368                                pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2369                                pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2370}
2371
2372                        if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2373                                INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2374                }
2375
2376        }
2377#endif // DBG_DIAGNOSE //
2378
2379
2380}
2381
2382
2383/*
2384        ========================================================================
2385
2386        Routine Description:
2387                Reset NIC from error
2388
2389        Arguments:
2390                Adapter                                         Pointer to our adapter
2391
2392        Return Value:
2393                None
2394
2395        IRQL = PASSIVE_LEVEL
2396
2397        Note:
2398                Reset NIC from error state
2399
2400        ========================================================================
2401*/
2402VOID    NICResetFromError(
2403        IN      PRTMP_ADAPTER   pAd)
2404{
2405        // Reset BBP (according to alex, reset ASIC will force reset BBP
2406        // Therefore, skip the reset BBP
2407        // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2408
2409        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2410        // Remove ASIC from reset state
2411        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2412
2413        NICInitializeAdapter(pAd, FALSE);
2414        NICInitAsicFromEEPROM(pAd);
2415
2416        // Switch to current channel, since during reset process, the connection should remains on.
2417        AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2418        AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2419}
2420
2421
2422NDIS_STATUS NICLoadFirmware(
2423        IN PRTMP_ADAPTER pAd)
2424{
2425        NDIS_STATUS      status = NDIS_STATUS_SUCCESS;
2426        if (pAd->chipOps.loadFirmware)
2427                status = pAd->chipOps.loadFirmware(pAd);
2428
2429        return status;
2430}
2431
2432
2433/*
2434        ========================================================================
2435
2436        Routine Description:
2437                erase 8051 firmware image in MAC ASIC
2438
2439        Arguments:
2440                Adapter                                         Pointer to our adapter
2441
2442        IRQL = PASSIVE_LEVEL
2443
2444        ========================================================================
2445*/
2446VOID NICEraseFirmware(
2447        IN PRTMP_ADAPTER pAd)
2448{
2449        if (pAd->chipOps.eraseFirmware)
2450                pAd->chipOps.eraseFirmware(pAd);
2451
2452}/* End of NICEraseFirmware */
2453
2454
2455/*
2456        ========================================================================
2457
2458        Routine Description:
2459                Load Tx rate switching parameters
2460
2461        Arguments:
2462                Adapter                                         Pointer to our adapter
2463
2464        Return Value:
2465                NDIS_STATUS_SUCCESS         firmware image load ok
2466                NDIS_STATUS_FAILURE         image not found
2467
2468        IRQL = PASSIVE_LEVEL
2469
2470        Rate Table Format:
2471                1. (B0: Valid Item number) (B1:Initial item from zero)
2472                2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2473
2474        ========================================================================
2475*/
2476NDIS_STATUS NICLoadRateSwitchingParams(
2477        IN PRTMP_ADAPTER pAd)
2478{
2479        return NDIS_STATUS_SUCCESS;
2480}
2481
2482
2483/*
2484        ========================================================================
2485
2486        Routine Description:
2487                Compare two memory block
2488
2489        Arguments:
2490                pSrc1           Pointer to first memory address
2491                pSrc2           Pointer to second memory address
2492
2493        Return Value:
2494                0:                      memory is equal
2495                1:                      pSrc1 memory is larger
2496                2:                      pSrc2 memory is larger
2497
2498        IRQL = DISPATCH_LEVEL
2499
2500        Note:
2501
2502        ========================================================================
2503*/
2504ULONG   RTMPCompareMemory(
2505        IN      PVOID   pSrc1,
2506        IN      PVOID   pSrc2,
2507        IN      ULONG   Length)
2508{
2509        PUCHAR  pMem1;
2510        PUCHAR  pMem2;
2511        ULONG   Index = 0;
2512
2513        pMem1 = (PUCHAR) pSrc1;
2514        pMem2 = (PUCHAR) pSrc2;
2515
2516        for (Index = 0; Index < Length; Index++)
2517        {
2518                if (pMem1[Index] > pMem2[Index])
2519                        return (1);
2520                else if (pMem1[Index] < pMem2[Index])
2521                        return (2);
2522        }
2523
2524        // Equal
2525        return (0);
2526}
2527
2528
2529/*
2530        ========================================================================
2531
2532        Routine Description:
2533                Zero out memory block
2534
2535        Arguments:
2536                pSrc1           Pointer to memory address
2537                Length          Size
2538
2539        Return Value:
2540                None
2541
2542        IRQL = PASSIVE_LEVEL
2543        IRQL = DISPATCH_LEVEL
2544
2545        Note:
2546
2547        ========================================================================
2548*/
2549VOID    RTMPZeroMemory(
2550        IN      PVOID   pSrc,
2551        IN      ULONG   Length)
2552{
2553        PUCHAR  pMem;
2554        ULONG   Index = 0;
2555
2556        pMem = (PUCHAR) pSrc;
2557
2558        for (Index = 0; Index < Length; Index++)
2559        {
2560                pMem[Index] = 0x00;
2561        }
2562}
2563
2564
2565/*
2566        ========================================================================
2567
2568        Routine Description:
2569                Copy data from memory block 1 to memory block 2
2570
2571        Arguments:
2572                pDest           Pointer to destination memory address
2573                pSrc            Pointer to source memory address
2574                Length          Copy size
2575
2576        Return Value:
2577                None
2578
2579        IRQL = PASSIVE_LEVEL
2580        IRQL = DISPATCH_LEVEL
2581
2582        Note:
2583
2584        ========================================================================
2585*/
2586VOID RTMPMoveMemory(
2587        OUT     PVOID   pDest,
2588        IN      PVOID   pSrc,
2589        IN      ULONG   Length)
2590{
2591        PUCHAR  pMem1;
2592        PUCHAR  pMem2;
2593        UINT    Index;
2594
2595        ASSERT((Length==0) || (pDest && pSrc));
2596
2597        pMem1 = (PUCHAR) pDest;
2598        pMem2 = (PUCHAR) pSrc;
2599
2600        for (Index = 0; Index < Length; Index++)
2601        {
2602                pMem1[Index] = pMem2[Index];
2603        }
2604}
2605
2606
2607/*
2608        ========================================================================
2609
2610        Routine Description:
2611                Initialize port configuration structure
2612
2613        Arguments:
2614                Adapter                                         Pointer to our adapter
2615
2616        Return Value:
2617                None
2618
2619        IRQL = PASSIVE_LEVEL
2620
2621        Note:
2622
2623        ========================================================================
2624*/
2625VOID    UserCfgInit(
2626        IN      PRTMP_ADAPTER pAd)
2627{
2628//      EDCA_PARM DefaultEdcaParm;
2629    UINT key_index, bss_index;
2630
2631        DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2632
2633        //
2634        //  part I. intialize common configuration
2635        //
2636
2637        for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2638        {
2639                for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2640                {
2641                        pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2642                        pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2643                }
2644        }
2645
2646        pAd->EepromAccess = FALSE;
2647
2648        pAd->Antenna.word = 0;
2649        pAd->CommonCfg.BBPCurrentBW = BW_20;
2650
2651        pAd->LedCntl.word = 0;
2652#ifdef RTMP_MAC_PCI
2653        pAd->LedIndicatorStrength = 0;
2654        pAd->RLnkCtrlOffset = 0;
2655        pAd->HostLnkCtrlOffset = 0;
2656#ifdef CONFIG_STA_SUPPORT
2657        pAd->StaCfg.PSControl.field.EnableNewPS=TRUE;
2658        pAd->CheckDmaBusyCount = 0;
2659#endif // CONFIG_STA_SUPPORT //
2660#endif // RTMP_MAC_PCI //
2661
2662        pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2663        pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2664        pAd->RfIcType = RFIC_2820;
2665
2666        // Init timer for reset complete event
2667        pAd->CommonCfg.CentralChannel = 1;
2668        pAd->bForcePrintTX = FALSE;
2669        pAd->bForcePrintRX = FALSE;
2670        pAd->bStaFifoTest = FALSE;
2671        pAd->bProtectionTest = FALSE;
2672        /*
2673        pAd->bHCCATest = FALSE;
2674        pAd->bGenOneHCCA = FALSE;
2675        */
2676        pAd->CommonCfg.Dsifs = 10;      // in units of usec
2677        pAd->CommonCfg.TxPower = 100; //mW
2678        pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2679        pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2680        pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2681        pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2682        pAd->CommonCfg.RtsThreshold = 2347;
2683        pAd->CommonCfg.FragmentThreshold = 2346;
2684        pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2685        pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2686        pAd->CommonCfg.PhyMode = 0xff;     // unknown
2687        pAd->CommonCfg.BandState = UNKNOWN_BAND;
2688        pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2689        pAd->CommonCfg.RadarDetect.CSCount = 0;
2690        pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2691
2692
2693
2694#ifdef TONE_RADAR_DETECT_SUPPORT
2695#ifdef CARRIER_DETECTION_SUPPORT
2696        pAd->CommonCfg.CarrierDetect.delta = CARRIER_DETECT_DELTA;
2697        pAd->CommonCfg.CarrierDetect.div_flag = CARRIER_DETECT_DIV_FLAG;
2698        pAd->CommonCfg.CarrierDetect.criteria = CARRIER_DETECT_CRITIRIA;
2699#ifdef RT3090
2700        if(IS_RT3090A(pAd))
2701        pAd->CommonCfg.CarrierDetect.threshold = CARRIER_DETECT_THRESHOLD_3090A;
2702        else
2703#endif // RT3090 //
2704        pAd->CommonCfg.CarrierDetect.threshold = CARRIER_DETECT_THRESHOLD;
2705#endif // CARRIER_DETECTION_SUPPORT //
2706#endif // TONE_RADAR_DETECT_SUPPORT //
2707
2708        pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2709#ifdef MERGE_ARCH_TEAM
2710        pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 2;
2711        pAd->CommonCfg.RadarDetect.AvgRssiReq = -75;
2712#else // original rt28xx source code
2713        pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2714#endif // MERGE_ARCH_TEAM //
2715        pAd->CommonCfg.bAPSDCapable = FALSE;
2716        pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2717        pAd->CommonCfg.TriggerTimerCount = 0;
2718        pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2719        pAd->CommonCfg.bCountryFlag = FALSE;
2720        pAd->CommonCfg.TxStream = 0;
2721        pAd->CommonCfg.RxStream = 0;
2722
2723        NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2724
2725#ifdef DOT11_N_SUPPORT
2726        NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2727        pAd->HTCEnable = FALSE;
2728        pAd->bBroadComHT = FALSE;
2729        pAd->CommonCfg.bRdg = FALSE;
2730
2731#ifdef DOT11N_DRAFT3
2732        pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
2733        pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
2734        pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
2735        pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
2736        pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
2737        pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
2738        pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
2739        pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
2740#endif  // DOT11N_DRAFT3 //
2741
2742        NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2743        pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2744        pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2745        pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2746        pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2747        pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2748        DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2749
2750        pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2751        BATableInit(pAd, &pAd->BATable);
2752
2753        pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2754        pAd->CommonCfg.bHTProtect = 1;
2755        pAd->CommonCfg.bMIMOPSEnable = TRUE;
2756        //2008/11/05:KH add to support Antenna power-saving of AP<--
2757        pAd->CommonCfg.bGreenAPEnable=FALSE;
2758        pAd->CommonCfg.bBlockAntDivforGreenAP=FALSE;
2759        //2008/11/05:KH add to support Antenna power-saving of AP-->
2760        pAd->CommonCfg.bBADecline = FALSE;
2761        pAd->CommonCfg.bDisableReordering = FALSE;
2762
2763        if (pAd->MACVersion == 0x28720200)
2764        {
2765                pAd->CommonCfg.TxBASize = 13; //by Jerry recommend
2766        }else{
2767                pAd->CommonCfg.TxBASize = 7;
2768        }
2769
2770        pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2771#endif // DOT11_N_SUPPORT //
2772
2773        //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2774        //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2775        //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2776        //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2777        pAd->CommonCfg.TxRate = RATE_6;
2778
2779        pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2780        pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2781        pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2782
2783        pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2784
2785
2786        //
2787        // part II. intialize STA specific configuration
2788        //
2789#ifdef CONFIG_STA_SUPPORT
2790        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2791        {
2792                RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2793                RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2794                RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2795                RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2796
2797                pAd->StaCfg.Psm = PWR_ACTIVE;
2798
2799                pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2800                pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2801                pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2802                pAd->StaCfg.bMixCipher = FALSE;
2803                pAd->StaCfg.DefaultKeyId = 0;
2804
2805                // 802.1x port control
2806                pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2807                pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2808                pAd->StaCfg.LastMicErrorTime = 0;
2809                pAd->StaCfg.MicErrCnt        = 0;
2810                pAd->StaCfg.bBlockAssoc      = FALSE;
2811                pAd->StaCfg.WpaState         = SS_NOTUSE;
2812
2813                pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2814
2815                pAd->StaCfg.RssiTrigger = 0;
2816                NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2817                pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2818                pAd->StaCfg.AtimWin = 0;
2819                pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2820                pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2821                pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2822                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2823                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2824
2825                pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2826                pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2827        }
2828
2829#ifdef EXT_BUILD_CHANNEL_LIST
2830        pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
2831#endif // EXT_BUILD_CHANNEL_LIST //
2832#ifdef PCIE_PS_SUPPORT
2833pAd->brt30xxBanMcuCmd = FALSE;
2834pAd->b3090ESpecialChip = FALSE;
2835//KH Debug:the following must be removed
2836pAd->StaCfg.PSControl.field.rt30xxPowerMode=3;
2837pAd->StaCfg.PSControl.field.rt30xxForceASPMTest=0;
2838pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM=1;
2839#endif // PCIE_PS_SUPPORT //
2840#endif // CONFIG_STA_SUPPORT //
2841
2842        // global variables mXXXX used in MAC protocol state machines
2843        OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2844        OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2845        OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2846
2847        // PHY specification
2848        pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
2849        OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
2850
2851#ifdef CONFIG_STA_SUPPORT
2852        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2853        {
2854                // user desired power mode
2855                pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2856                pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2857                pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2858
2859                RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
2860                pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2861
2862                // Patch for Ndtest
2863                pAd->StaCfg.ScanCnt = 0;
2864
2865                pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
2866                pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
2867                pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
2868                pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
2869                pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
2870
2871                // Nitro mode control
2872                pAd->StaCfg.bAutoReconnect = TRUE;
2873
2874                // Save the init time as last scan time, the system should do scan after 2 seconds.
2875                // This patch is for driver wake up from standby mode, system will do scan right away.
2876                NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2877                if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2878                        pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2879
2880                NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
2881#ifdef RTMP_MAC_PCI
2882                sprintf((PSTRING) pAd->nickname, "RT2860STA");
2883#endif // RTMP_MAC_PCI //
2884                RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
2885#ifdef WPA_SUPPLICANT_SUPPORT
2886                pAd->StaCfg.IEEE8021X = FALSE;
2887                pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2888                pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2889                pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2890#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
2891                pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2892#endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
2893#endif // WPA_SUPPLICANT_SUPPORT //
2894
2895                NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2896
2897
2898                pAd->StaCfg.bAutoConnectByBssid = FALSE;
2899                pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2900                NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2901                pAd->StaCfg.WpaPassPhraseLen = 0;
2902                pAd->StaCfg.bAutoRoaming = FALSE;
2903                pAd->StaCfg.bForceTxBurst = FALSE;
2904        }
2905#endif // CONFIG_STA_SUPPORT //
2906
2907        // Default for extra information is not valid
2908        pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2909
2910        // Default Config change flag
2911        pAd->bConfigChanged = FALSE;
2912
2913        //
2914        // part III. AP configurations
2915        //
2916
2917
2918        //
2919        // part IV. others
2920        //
2921        // dynamic BBP R66:sensibity tuning to overcome background noise
2922        pAd->BbpTuning.bEnable                = TRUE;
2923        pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2924        pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2925        pAd->BbpTuning.R66Delta               = 4;
2926        pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2927
2928        //
2929        // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
2930        // if not initial this value, the default value will be 0.
2931        //
2932        pAd->BbpTuning.R66CurrentValue = 0x38;
2933
2934        pAd->Bbp94 = BBPR94_DEFAULT;
2935        pAd->BbpForCCK = FALSE;
2936
2937        // Default is FALSE for test bit 1
2938        //pAd->bTest1 = FALSE;
2939
2940        // initialize MAC table and allocate spin lock
2941        NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
2942        InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2943        NdisAllocateSpinLock(&pAd->MacTabLock);
2944
2945        //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
2946        //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
2947
2948#ifdef RALINK_ATE
2949        NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
2950        pAd->ate.Mode = ATE_STOP;
2951        pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
2952        pAd->ate.TxDoneCount = 0;
2953        pAd->ate.RFFreqOffset = 0;
2954        pAd->ate.TxLength = 1024;
2955        pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
2956        pAd->ate.TxWI.PHYMODE = MODE_CCK;
2957        pAd->ate.TxWI.MCS = 3;
2958        pAd->ate.TxWI.BW = BW_20;
2959        pAd->ate.Channel = 1;
2960        pAd->ate.QID = QID_AC_BE;
2961        pAd->ate.Addr1[0] = 0x00;
2962        pAd->ate.Addr1[1] = 0x11;
2963        pAd->ate.Addr1[2] = 0x22;
2964        pAd->ate.Addr1[3] = 0xAA;
2965        pAd->ate.Addr1[4] = 0xBB;
2966        pAd->ate.Addr1[5] = 0xCC;
2967        NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
2968        NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
2969        pAd->ate.bRxFER = 0;
2970        pAd->ate.bQATxStart = FALSE;
2971        pAd->ate.bQARxStart = FALSE;
2972
2973#ifdef RTMP_MAC_PCI
2974        pAd->ate.bFWLoading = FALSE;
2975#endif // RTMP_MAC_PCI //
2976
2977
2978#ifdef RALINK_28xx_QA
2979        pAd->ate.TxStatus = 0;
2980        pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
2981#endif // RALINK_28xx_QA //
2982#endif // RALINK_ATE //
2983
2984
2985        pAd->CommonCfg.bWiFiTest = FALSE;
2986#ifdef RTMP_MAC_PCI
2987    pAd->bPCIclkOff = FALSE;
2988#endif // RTMP_MAC_PCI //
2989
2990#ifdef CONFIG_STA_SUPPORT
2991RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2992#endif // CONFIG_STA_SUPPORT //
2993#ifdef ANT_DIVERSITY_SUPPORT
2994                if ( pAd->CommonCfg.bRxAntDiversity == ANT_FIX_ANT2)
2995                {
2996                        pAd->RxAnt.Pair1PrimaryRxAnt = 1;
2997                        pAd->RxAnt.Pair1SecondaryRxAnt = 0;
2998                }
2999                else // Default
3000                {
3001                        pAd->RxAnt.Pair1PrimaryRxAnt = 0;
3002                        pAd->RxAnt.Pair1SecondaryRxAnt = 1;
3003                }
3004                pAd->RxAnt.EvaluatePeriod = 0;
3005                pAd->RxAnt.RcvPktNumWhenEvaluate = 0;
3006#ifdef CONFIG_STA_SUPPORT
3007                pAd->RxAnt.Pair1AvgRssi[0] = pAd->RxAnt.Pair1AvgRssi[1] = 0;
3008#endif // CONFIG_STA_SUPPORT //
3009#endif // AP_ANTENNA_DIVERSITY_SUPPORT //
3010
3011        DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3012}
3013
3014// IRQL = PASSIVE_LEVEL
3015UCHAR BtoH(STRING ch)
3016{
3017        if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3018        if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3019        if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3020        return(255);
3021}
3022
3023//
3024//  FUNCTION: AtoH(char *, UCHAR *, int)
3025//
3026//  PURPOSE:  Converts ascii string to network order hex
3027//
3028//  PARAMETERS:
3029//    src    - pointer to input ascii string
3030//    dest   - pointer to output hex
3031//    destlen - size of dest
3032//
3033//  COMMENTS:
3034//
3035//    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3036//    into upper nibble and 2nd ascii byte of pair into lower nibble.
3037//
3038// IRQL = PASSIVE_LEVEL
3039
3040void AtoH(PSTRING src, PUCHAR dest, int destlen)
3041{
3042        PSTRING srcptr;
3043        PUCHAR destTemp;
3044
3045        srcptr = src;
3046        destTemp = (PUCHAR) dest;
3047
3048        while(destlen--)
3049        {
3050                *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3051                *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3052                destTemp++;
3053        }
3054}
3055
3056
3057//+++Mark by shiang, not use now, need to remove after confirm
3058//---Mark by shiang, not use now, need to remove after confirm
3059
3060
3061/*
3062        ========================================================================
3063
3064        Routine Description:
3065                Init timer objects
3066
3067        Arguments:
3068                pAd                     Pointer to our adapter
3069                pTimer                          Timer structure
3070                pTimerFunc                      Function to execute when timer expired
3071                Repeat                          Ture for period timer
3072
3073        Return Value:
3074                None
3075
3076        Note:
3077
3078        ========================================================================
3079*/
3080VOID    RTMPInitTimer(
3081        IN      PRTMP_ADAPTER                   pAd,
3082        IN      PRALINK_TIMER_STRUCT    pTimer,
3083        IN      PVOID                                   pTimerFunc,
3084        IN      PVOID                                   pData,
3085        IN      BOOLEAN                                 Repeat)
3086{
3087        //
3088        // Set Valid to TRUE for later used.
3089        // It will crash if we cancel a timer or set a timer
3090        // that we haven't initialize before.
3091        //
3092        pTimer->Valid      = TRUE;
3093
3094        pTimer->PeriodicType = Repeat;
3095        pTimer->State      = FALSE;
3096        pTimer->cookie = (ULONG) pData;
3097
3098#ifdef RTMP_TIMER_TASK_SUPPORT
3099        pTimer->pAd = pAd;
3100#endif // RTMP_TIMER_TASK_SUPPORT //
3101
3102        RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3103}
3104
3105
3106/*
3107        ========================================================================
3108
3109        Routine Description:
3110                Init timer objects
3111
3112        Arguments:
3113                pTimer                          Timer structure
3114                Value                           Timer value in milliseconds
3115
3116        Return Value:
3117                None
3118
3119        Note:
3120                To use this routine, must call RTMPInitTimer before.
3121
3122        ========================================================================
3123*/
3124VOID    RTMPSetTimer(
3125        IN      PRALINK_TIMER_STRUCT    pTimer,
3126        IN      ULONG                                   Value)
3127{
3128        if (pTimer->Valid)
3129        {
3130                pTimer->TimerValue = Value;
3131                pTimer->State      = FALSE;
3132                if (pTimer->PeriodicType == TRUE)
3133                {
3134                        pTimer->Repeat = TRUE;
3135                        RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3136                }
3137                else
3138                {
3139                        pTimer->Repeat = FALSE;
3140                        RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3141                }
3142        }
3143        else
3144        {
3145                DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3146        }
3147}
3148
3149
3150/*
3151        ========================================================================
3152
3153        Routine Description:
3154                Init timer objects
3155
3156        Arguments:
3157                pTimer                          Timer structure
3158                Value                           Timer value in milliseconds
3159
3160        Return Value:
3161                None
3162
3163        Note:
3164                To use this routine, must call RTMPInitTimer before.
3165
3166        ========================================================================
3167*/
3168VOID    RTMPModTimer(
3169        IN      PRALINK_TIMER_STRUCT    pTimer,
3170        IN      ULONG                                   Value)
3171{
3172        BOOLEAN Cancel;
3173
3174        if (pTimer->Valid)
3175        {
3176                pTimer->TimerValue = Value;
3177                pTimer->State      = FALSE;
3178                if (pTimer->PeriodicType == TRUE)
3179                {
3180                        RTMPCancelTimer(pTimer, &Cancel);
3181                        RTMPSetTimer(pTimer, Value);
3182                }
3183                else
3184                {
3185                        RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3186                }
3187        }
3188        else
3189        {
3190                DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3191        }
3192}
3193
3194
3195/*
3196        ========================================================================
3197
3198        Routine Description:
3199                Cancel timer objects
3200
3201        Arguments:
3202                Adapter                                         Pointer to our adapter
3203
3204        Return Value:
3205                None
3206
3207        IRQL = PASSIVE_LEVEL
3208        IRQL = DISPATCH_LEVEL
3209
3210        Note:
3211                1.) To use this routine, must call RTMPInitTimer before.
3212                2.) Reset NIC to initial state AS IS system boot up time.
3213
3214        ========================================================================
3215*/
3216VOID    RTMPCancelTimer(
3217        IN      PRALINK_TIMER_STRUCT    pTimer,
3218        OUT     BOOLEAN                                 *pCancelled)
3219{
3220        if (pTimer->Valid)
3221        {
3222                if (pTimer->State == FALSE)
3223                        pTimer->Repeat = FALSE;
3224
3225                RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3226
3227                if (*pCancelled == TRUE)
3228                        pTimer->State = TRUE;
3229
3230#ifdef RTMP_TIMER_TASK_SUPPORT
3231                // We need to go-through the TimerQ to findout this timer handler and remove it if
3232                //              it's still waiting for execution.
3233                RtmpTimerQRemove(pTimer->pAd, pTimer);
3234#endif // RTMP_TIMER_TASK_SUPPORT //
3235        }
3236        else
3237        {
3238                DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3239        }
3240}
3241
3242
3243/*
3244        ========================================================================
3245
3246        Routine Description:
3247                Set LED Status
3248
3249        Arguments:
3250                pAd                                             Pointer to our adapter
3251                Status                                  LED Status
3252
3253        Return Value:
3254                None
3255
3256        IRQL = PASSIVE_LEVEL
3257        IRQL = DISPATCH_LEVEL
3258
3259        Note:
3260
3261        ========================================================================
3262*/
3263VOID RTMPSetLED(
3264        IN PRTMP_ADAPTER        pAd,
3265        IN UCHAR                        Status)
3266{
3267        //ULONG                 data;
3268        UCHAR                   HighByte = 0;
3269        UCHAR                   LowByte;
3270        BOOLEAN                 bIgnored = FALSE;
3271
3272#ifdef RALINK_ATE
3273        /*
3274                In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3275                So LED mode is not supported when ATE is running.
3276        */
3277        if (!IS_RT3572(pAd))
3278        {
3279                if (ATE_ON(pAd))
3280                        return;
3281        }
3282#endif // RALINK_ATE //
3283
3284        LowByte = pAd->LedCntl.field.LedMode&0x7f;
3285        switch (Status)
3286        {
3287                case LED_LINK_DOWN:
3288                        HighByte = 0x20;
3289                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3290                        pAd->LedIndicatorStrength = 0;
3291                        break;
3292                case LED_LINK_UP:
3293                        if (pAd->CommonCfg.Channel > 14)
3294                                HighByte = 0xa0;
3295                        else
3296                                HighByte = 0x60;
3297                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3298                        break;
3299                case LED_RADIO_ON:
3300                        HighByte = 0x20;
3301                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3302                        break;
3303                case LED_HALT:
3304                        LowByte = 0; // Driver sets MAC register and MAC controls LED
3305                case LED_RADIO_OFF:
3306                        HighByte = 0;
3307                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3308                        break;
3309                case LED_WPS:
3310                        HighByte = 0x10;
3311                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3312                        break;
3313                case LED_ON_SITE_SURVEY:
3314                        HighByte = 0x08;
3315                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3316                        break;
3317                case LED_POWER_UP:
3318                        HighByte = 0x04;
3319                        AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3320                        break;
3321#ifdef RALINK_ATE
3322#endif // RALINK_ATE //
3323                default:
3324                        DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3325                        break;
3326        }
3327
3328    //
3329        // Keep LED status for LED SiteSurvey mode.
3330        // After SiteSurvey, we will set the LED mode to previous status.
3331        //
3332        if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP) && (bIgnored == FALSE))
3333                pAd->LedStatus = Status;
3334
3335        DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3336}
3337
3338/*
3339        ========================================================================
3340
3341        Routine Description:
3342                Set LED Signal Stregth
3343
3344        Arguments:
3345                pAd                                             Pointer to our adapter
3346                Dbm                                             Signal Stregth
3347
3348        Return Value:
3349                None
3350
3351        IRQL = PASSIVE_LEVEL
3352
3353        Note:
3354                Can be run on any IRQL level.
3355
3356                According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3357                <= -90  No Signal
3358                <= -81  Very Low
3359                <= -71  Low
3360                <= -67  Good
3361                <= -57  Very Good
3362                 > -57  Excellent
3363        ========================================================================
3364*/
3365VOID RTMPSetSignalLED(
3366        IN PRTMP_ADAPTER        pAd,
3367        IN NDIS_802_11_RSSI Dbm)
3368{
3369        UCHAR           nLed = 0;
3370
3371        if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
3372        {
3373                if (Dbm <= -90)
3374                        nLed = 0;
3375                else if (Dbm <= -81)
3376                        nLed = 1;
3377                else if (Dbm <= -71)
3378                        nLed = 3;
3379                else if (Dbm <= -67)
3380                        nLed = 7;
3381                else if (Dbm <= -57)
3382                        nLed = 15;
3383                else
3384                        nLed = 31;
3385
3386                //
3387                // Update Signal Stregth to firmware if changed.
3388                //
3389                if (pAd->LedIndicatorStrength != nLed)
3390                {
3391                        AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3392                        pAd->LedIndicatorStrength = nLed;
3393                }
3394        }
3395}
3396
3397
3398
3399/*
3400        ========================================================================
3401
3402        Routine Description:
3403                Enable RX
3404
3405        Arguments:
3406                pAd                                             Pointer to our adapter
3407
3408        Return Value:
3409                None
3410
3411        IRQL <= DISPATCH_LEVEL
3412
3413        Note:
3414                Before Enable RX, make sure you have enabled Interrupt.
3415        ========================================================================
3416*/
3417VOID RTMPEnableRxTx(
3418        IN PRTMP_ADAPTER        pAd)
3419{
3420//      WPDMA_GLO_CFG_STRUC     GloCfg;
3421//      ULONG   i = 0;
3422        UINT32 rx_filter_flag;
3423
3424        DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3425
3426        // Enable Rx DMA.
3427        RT28XXDMAEnable(pAd);
3428
3429        // enable RX of MAC block
3430        if (pAd->OpMode == OPMODE_AP)
3431        {
3432                rx_filter_flag = APNORMAL;
3433
3434
3435                RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3436        }
3437        else
3438        {
3439                if (pAd->CommonCfg.PSPXlink)
3440                        rx_filter_flag = PSPXLINK;
3441                else
3442                        rx_filter_flag = STANORMAL;     // Staion not drop control frame will fail WiFi Certification.
3443                RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3444        }
3445
3446        RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3447        DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3448}
3449
3450
3451//+++Add by shiang, move from os/linux/rt_main_dev.c
3452void CfgInitHook(PRTMP_ADAPTER pAd)
3453{
3454        pAd->bBroadComHT = TRUE;
3455}
3456
3457
3458int rt28xx_init(
3459        IN PRTMP_ADAPTER pAd,
3460        IN PSTRING pDefaultMac,
3461        IN PSTRING pHostName)
3462{
3463        UINT                                    index;
3464        UCHAR                                   TmpPhy;
3465        NDIS_STATUS                             Status;
3466        UINT32                                  MacCsr0 = 0;
3467
3468#ifdef CONFIG_STA_SUPPORT
3469#ifdef RTMP_MAC_PCI
3470        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3471        {
3472        // If dirver doesn't wake up firmware here,
3473        // NICLoadFirmware will hang forever when interface is up again.
3474        // RT2860 PCI
3475        if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3476                OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3477        {
3478                AUTO_WAKEUP_STRUC AutoWakeupCfg;
3479                        AsicForceWakeup(pAd, TRUE);
3480                AutoWakeupCfg.word = 0;
3481                RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
3482                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3483        }
3484        }
3485#endif // RTMP_MAC_PCI //
3486#endif // CONFIG_STA_SUPPORT //
3487
3488
3489        // reset Adapter flags
3490        RTMP_CLEAR_FLAGS(pAd);
3491
3492        // Init BssTab & ChannelInfo tabbles for auto channel select.
3493
3494#ifdef DOT11_N_SUPPORT
3495        // Allocate BA Reordering memory
3496        ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3497#endif // DOT11_N_SUPPORT //
3498
3499        // Make sure MAC gets ready.
3500        index = 0;
3501        do
3502        {
3503                RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3504                pAd->MACVersion = MacCsr0;
3505
3506                if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
3507                        break;
3508
3509                RTMPusecDelay(10);
3510        } while (index++ < 100);
3511        DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3512
3513#ifdef RTMP_MAC_PCI
3514#ifdef PCIE_PS_SUPPORT
3515        /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register  at pcie L.1 level */
3516        if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))&&OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3517        {
3518                RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3519                MacCsr0 |= 0x402;
3520                RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3521                DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3522        }
3523#endif // PCIE_PS_SUPPORT //
3524
3525        // To fix driver disable/enable hang issue when radio off
3526        RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3527#endif // RTMP_MAC_PCI //
3528
3529        // Disable DMA
3530        RT28XXDMADisable(pAd);
3531
3532
3533        // Load 8051 firmware
3534        Status = NICLoadFirmware(pAd);
3535        if (Status != NDIS_STATUS_SUCCESS)
3536        {
3537                DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
3538                goto err1;
3539        }
3540
3541        NICLoadRateSwitchingParams(pAd);
3542
3543        // Disable interrupts here which is as soon as possible
3544        // This statement should never be true. We might consider to remove it later
3545#ifdef RTMP_MAC_PCI
3546        if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
3547        {
3548                RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3549        }
3550#endif // RTMP_MAC_PCI //
3551
3552        Status = RTMPAllocTxRxRingMemory(pAd);
3553        if (Status != NDIS_STATUS_SUCCESS)
3554        {
3555                DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status));
3556                goto err1;
3557        }
3558
3559        RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3560
3561        // initialize MLME
3562        //
3563
3564        Status = RtmpMgmtTaskInit(pAd);
3565        if (Status != NDIS_STATUS_SUCCESS)
3566                goto err2;
3567
3568        Status = MlmeInit(pAd);
3569        if (Status != NDIS_STATUS_SUCCESS)
3570        {
3571                DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3572                goto err2;
3573        }
3574
3575        // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default
3576        //
3577        UserCfgInit(pAd);
3578        Status = RtmpNetTaskInit(pAd);
3579        if (Status != NDIS_STATUS_SUCCESS)
3580                goto err3;
3581
3582//      COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);
3583//      pAd->bForcePrintTX = TRUE;
3584
3585        CfgInitHook(pAd);
3586
3587
3588#ifdef BLOCK_NET_IF
3589        initblockQueueTab(pAd);
3590#endif // BLOCK_NET_IF //
3591
3592#ifdef CONFIG_STA_SUPPORT
3593        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3594                NdisAllocateSpinLock(&pAd->MacTabLock);
3595#endif // CONFIG_STA_SUPPORT //
3596
3597        MeasureReqTabInit(pAd);
3598        TpcReqTabInit(pAd);
3599
3600        //
3601        // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset
3602        //
3603        Status = NICInitializeAdapter(pAd, TRUE);
3604        if (Status != NDIS_STATUS_SUCCESS)
3605        {
3606                DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
3607                if (Status != NDIS_STATUS_SUCCESS)
3608                goto err3;
3609        }
3610
3611        // Read parameters from Config File
3612        Status = RTMPReadParametersHook(pAd);
3613
3614        DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3615        if (Status != NDIS_STATUS_SUCCESS)
3616        {
3617                DBGPRINT_ERR(("NICReadRegParameters failed, Status[=0x%08x]\n",Status));
3618                goto err4;
3619        }
3620
3621
3622
3623#ifdef DOT11_N_SUPPORT
3624        //Init Ba Capability parameters.
3625//      RT28XX_BA_INIT(pAd);
3626        pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3627        pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
3628        pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3629        pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3630        // UPdata to HT IE
3631        pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3632        pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3633        pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3634#endif // DOT11_N_SUPPORT //
3635
3636        // after reading Registry, we now know if in AP mode or STA mode
3637
3638        // Load 8051 firmware; crash when FW image not existent
3639        // Status = NICLoadFirmware(pAd);
3640        // if (Status != NDIS_STATUS_SUCCESS)
3641        //    break;
3642
3643        DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3644
3645        // We should read EEPROM for all cases.  rt2860b
3646        NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac);
3647#ifdef CONFIG_STA_SUPPORT
3648#endif // CONFIG_STA_SUPPORT //
3649
3650        DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3651
3652        NICInitAsicFromEEPROM(pAd); //rt2860b
3653
3654        // Set PHY to appropriate mode
3655        TmpPhy = pAd->CommonCfg.PhyMode;
3656        pAd->CommonCfg.PhyMode = 0xff;
3657        RTMPSetPhyMode(pAd, TmpPhy);
3658#ifdef DOT11_N_SUPPORT
3659        SetCommonHT(pAd);
3660#endif // DOT11_N_SUPPORT //
3661
3662        // No valid channels.
3663        if (pAd->ChannelListNum == 0)
3664        {
3665                DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3666                goto err4;
3667        }
3668
3669#ifdef DOT11_N_SUPPORT
3670        DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
3671           pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
3672           pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
3673#endif // DOT11_N_SUPPORT //
3674
3675#ifdef RTMP_RF_RW_SUPPORT
3676        //Init RT30xx RFRegisters after read RFIC type from EEPROM
3677        NICInitRFRegisters(pAd);
3678#endif // RTMP_RF_RW_SUPPORT //
3679
3680
3681
3682//              APInitialize(pAd);
3683
3684#ifdef IKANOS_VX_1X0
3685        VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress);
3686#endif // IKANOS_VX_1X0 //
3687
3688                //
3689        // Initialize RF register to default value
3690        //
3691        AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3692        AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3693
3694        // 8051 firmware require the signal during booting time.
3695        //2008/11/28:KH marked the following codes to patch Frequency offset bug
3696        //AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00);
3697
3698        if (pAd && (Status != NDIS_STATUS_SUCCESS))
3699        {
3700                //
3701                // Undo everything if it failed
3702                //
3703                if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
3704                {
3705//                      NdisMDeregisterInterrupt(&pAd->Interrupt);
3706                        RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3707                }
3708//              RTMPFreeAdapter(pAd); // we will free it in disconnect()
3709        }
3710        else if (pAd)
3711        {
3712                // Microsoft HCT require driver send a disconnect event after driver initialization.
3713                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3714//              pAd->IndicateMediaState = NdisMediaStateDisconnected;
3715                RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3716
3717                DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3718
3719
3720        }// end of else
3721
3722
3723        // Set up the Mac address
3724        RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3725
3726        // Various AP function init
3727
3728
3729
3730#ifdef CONFIG_STA_SUPPORT
3731        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3732        {
3733#ifdef WPA_SUPPLICANT_SUPPORT
3734#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
3735                // send wireless event to wpa_supplicant for infroming interface up.
3736                RtmpOSWrielessEventSend(pAd, IWEVCUSTOM, RT_INTERFACE_UP, NULL, NULL, 0);
3737#endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3738#endif // WPA_SUPPLICANT_SUPPORT //
3739
3740        }
3741#endif // CONFIG_STA_SUPPORT //
3742
3743
3744
3745        DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3746
3747        return TRUE;
3748
3749
3750err4:
3751err3:
3752        MlmeHalt(pAd);
3753err2:
3754        RTMPFreeTxRxRingMemory(pAd);
3755err1:
3756
3757#ifdef DOT11_N_SUPPORT
3758        os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool
3759#endif // DOT11_N_SUPPORT //
3760
3761        // shall not set priv to NULL here because the priv didn't been free yet.
3762        //net_dev->priv = 0;
3763#ifdef INF_AMAZON_SE
3764err0:
3765#endif // INF_AMAZON_SE //
3766#ifdef ST
3767err0:
3768#endif // ST //
3769
3770        DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
3771        return FALSE;
3772}
3773//---Add by shiang, move from os/linux/rt_main_dev.c
3774
3775
3776static INT RtmpChipOpsRegister(
3777        IN RTMP_ADAPTER *pAd,
3778        IN INT                  infType)
3779{
3780        RTMP_CHIP_OP    *pChipOps = &pAd->chipOps;
3781        int status;
3782
3783        memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
3784
3785        /* set eeprom related hook functions */
3786        status = RtmpChipOpsEepromHook(pAd, infType);
3787
3788        /* set mcu related hook functions */
3789        switch(infType)
3790        {
3791#ifdef RTMP_PCI_SUPPORT
3792                case RTMP_DEV_INF_PCI:
3793                        pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3794                        pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3795                        pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3796                        break;
3797#endif // RTMP_PCI_SUPPORT //
3798
3799
3800                default:
3801                        break;
3802        }
3803
3804        return status;
3805}
3806
3807
3808INT RtmpRaDevCtrlInit(
3809        IN RTMP_ADAPTER *pAd,
3810        IN RTMP_INF_TYPE infType)
3811{
3812        //VOID  *handle;
3813
3814        // Assign the interface type. We need use it when do register/EEPROM access.
3815        pAd->infType = infType;
3816
3817
3818#ifdef CONFIG_STA_SUPPORT
3819        pAd->OpMode = OPMODE_STA;
3820        DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3821#endif // CONFIG_STA_SUPPORT //
3822
3823
3824
3825        RtmpChipOpsRegister(pAd, infType);
3826
3827#ifdef MULTIPLE_CARD_SUPPORT
3828{
3829        extern BOOLEAN RTMP_CardInfoRead(PRTMP_ADAPTER pAd);
3830
3831        // find its profile path
3832        pAd->MC_RowID = -1; // use default profile path
3833        RTMP_CardInfoRead(pAd);
3834
3835        if (pAd->MC_RowID == -1)
3836#ifdef CONFIG_STA_SUPPORT
3837                strcpy(pAd->MC_FileName, STA_PROFILE_PATH);
3838#endif // CONFIG_STA_SUPPORT //
3839
3840        DBGPRINT(RT_DEBUG_TRACE, ("MC> ROW = %d, PATH = %s\n", pAd->MC_RowID, pAd->MC_FileName));
3841}
3842#endif // MULTIPLE_CARD_SUPPORT //
3843
3844        return 0;
3845}
3846
3847
3848BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER *pAd)
3849{
3850#ifdef MULTIPLE_CARD_SUPPORT
3851extern UINT8  MC_CardUsed[MAX_NUM_OF_MULTIPLE_CARD];
3852
3853        if ((pAd->MC_RowID >= 0) && (pAd->MC_RowID <= MAX_NUM_OF_MULTIPLE_CARD))
3854                MC_CardUsed[pAd->MC_RowID] = 0; // not clear MAC address
3855#endif // MULTIPLE_CARD_SUPPORT //
3856
3857
3858        RTMPFreeAdapter(pAd);
3859
3860        return TRUE;
3861}
3862
3863
3864// not yet support MBSS
3865PNET_DEV get_netdev_from_bssid(
3866        IN      PRTMP_ADAPTER   pAd,
3867        IN      UCHAR                   FromWhichBSSID)
3868{
3869        PNET_DEV dev_p = NULL;
3870
3871
3872
3873#ifdef CONFIG_STA_SUPPORT
3874        IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3875        {
3876                dev_p = pAd->net_dev;
3877        }
3878#endif // CONFIG_STA_SUPPORT //
3879
3880        ASSERT(dev_p);
3881        return dev_p; /* return one of MBSS */
3882}
3883