LXR linux/drivers/staging/winbond/wb35reg.c

   1#include "sysdef.h"
   2#include "wb35reg_f.h"
   3
   4#include <linux/usb.h>
   5
   6extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
   7
   8// true  : read command process successfully
   9// false : register not support
  10// RegisterNo : start base
  11// pRegisterData : data point
  12// NumberOfData : number of register data
  13// Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
  14//                NO_INCREMENT - Function will write data into the same register
  15unsigned char
  16Wb35Reg_BurstWrite(struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterData, u8 NumberOfData, u8 Flag)
  17{
  18        struct wb35_reg *reg = &pHwData->reg;
  19        struct urb      *urb = NULL;
  20        struct wb35_reg_queue *reg_queue = NULL;
  21        u16             UrbSize;
  22        struct      usb_ctrlrequest *dr;
  23        u16             i, DataSize = NumberOfData*4;
  24
  25        // Module shutdown
  26        if (pHwData->SurpriseRemove)
  27                return false;
  28
  29        // Trying to use burst write function if use new hardware
  30        UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
  31        reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
  32        urb = usb_alloc_urb(0, GFP_ATOMIC);
  33        if( urb && reg_queue ) {
  34                reg_queue->DIRECT = 2;// burst write register
  35                reg_queue->INDEX = RegisterNo;
  36                reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
  37                memcpy( reg_queue->pBuffer, pRegisterData, DataSize );
  38                //the function for reversing register data from little endian to big endian
  39                for( i=0; i<NumberOfData ; i++ )
  40                        reg_queue->pBuffer[i] = cpu_to_le32( reg_queue->pBuffer[i] );
  41
  42                dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
  43                dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
  44                dr->bRequest = 0x04; // USB or vendor-defined request code, burst mode
  45                dr->wValue = cpu_to_le16( Flag ); // 0: Register number auto-increment, 1: No auto increment
  46                dr->wIndex = cpu_to_le16( RegisterNo );
  47                dr->wLength = cpu_to_le16( DataSize );
  48                reg_queue->Next = NULL;
  49                reg_queue->pUsbReq = dr;
  50                reg_queue->urb = urb;
  51
  52                spin_lock_irq( &reg->EP0VM_spin_lock );
  53                if (reg->reg_first == NULL)
  54                        reg->reg_first = reg_queue;
  55                else
  56                        reg->reg_last->Next = reg_queue;
  57                reg->reg_last = reg_queue;
  58
  59                spin_unlock_irq( &reg->EP0VM_spin_lock );
  60
  61                // Start EP0VM
  62                Wb35Reg_EP0VM_start(pHwData);
  63
  64                return true;
  65        } else {
  66                if (urb)
  67                        usb_free_urb(urb);
  68                if (reg_queue)
  69                        kfree(reg_queue);
  70                return false;
  71        }
  72   return false;
  73}
  74
  75void
  76Wb35Reg_Update(struct hw_data * pHwData,  u16 RegisterNo,  u32 RegisterValue)
  77{
  78        struct wb35_reg *reg = &pHwData->reg;
  79        switch (RegisterNo) {
  80        case 0x3b0: reg->U1B0 = RegisterValue; break;
  81        case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
  82        case 0x400: reg->D00_DmaControl = RegisterValue; break;
  83        case 0x800: reg->M00_MacControl = RegisterValue; break;
  84        case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
  85        case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
  86        case 0x824: reg->M24_MacControl = RegisterValue; break;
  87        case 0x828: reg->M28_MacControl = RegisterValue; break;
  88        case 0x82c: reg->M2C_MacControl = RegisterValue; break;
  89        case 0x838: reg->M38_MacControl = RegisterValue; break;
  90        case 0x840: reg->M40_MacControl = RegisterValue; break;
  91        case 0x844: reg->M44_MacControl = RegisterValue; break;
  92        case 0x848: reg->M48_MacControl = RegisterValue; break;
  93        case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
  94        case 0x860: reg->M60_MacControl = RegisterValue; break;
  95        case 0x868: reg->M68_MacControl = RegisterValue; break;
  96        case 0x870: reg->M70_MacControl = RegisterValue; break;
  97        case 0x874: reg->M74_MacControl = RegisterValue; break;
  98        case 0x878: reg->M78_ERPInformation = RegisterValue; break;
  99        case 0x87C: reg->M7C_MacControl = RegisterValue; break;
 100        case 0x880: reg->M80_MacControl = RegisterValue; break;
 101        case 0x884: reg->M84_MacControl = RegisterValue; break;
 102        case 0x888: reg->M88_MacControl = RegisterValue; break;
 103        case 0x898: reg->M98_MacControl = RegisterValue; break;
 104        case 0x100c: reg->BB0C = RegisterValue; break;
 105        case 0x102c: reg->BB2C = RegisterValue; break;
 106        case 0x1030: reg->BB30 = RegisterValue; break;
 107        case 0x103c: reg->BB3C = RegisterValue; break;
 108        case 0x1048: reg->BB48 = RegisterValue; break;
 109        case 0x104c: reg->BB4C = RegisterValue; break;
 110        case 0x1050: reg->BB50 = RegisterValue; break;
 111        case 0x1054: reg->BB54 = RegisterValue; break;
 112        case 0x1058: reg->BB58 = RegisterValue; break;
 113        case 0x105c: reg->BB5C = RegisterValue; break;
 114        case 0x1060: reg->BB60 = RegisterValue; break;
 115        }
 116}
 117
 118// true  : read command process successfully
 119// false : register not support
 120unsigned char
 121Wb35Reg_WriteSync(  struct hw_data * pHwData,  u16 RegisterNo,  u32 RegisterValue )
 122{
 123        struct wb35_reg *reg = &pHwData->reg;
 124        int ret = -1;
 125
 126        // Module shutdown
 127        if (pHwData->SurpriseRemove)
 128                return false;
 129
 130        RegisterValue = cpu_to_le32(RegisterValue);
 131
 132        // update the register by send usb message------------------------------------
 133        reg->SyncIoPause = 1;
 134
 135        // 20060717.5 Wait until EP0VM stop
 136        while (reg->EP0vm_state != VM_STOP)
 137                msleep(10);
 138
 139        // Sync IoCallDriver
 140        reg->EP0vm_state = VM_RUNNING;
 141        ret = usb_control_msg( pHwData->WbUsb.udev,
 142                               usb_sndctrlpipe( pHwData->WbUsb.udev, 0 ),
 143                               0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
 144                               0x0,RegisterNo, &RegisterValue, 4, HZ*100 );
 145        reg->EP0vm_state = VM_STOP;
 146        reg->SyncIoPause = 0;
 147
 148        Wb35Reg_EP0VM_start(pHwData);
 149
 150        if (ret < 0) {
 151                #ifdef _PE_REG_DUMP_
 152                printk("EP0 Write register usb message sending error\n");
 153                #endif
 154
 155                pHwData->SurpriseRemove = 1; // 20060704.2
 156                return false;
 157        }
 158
 159        return true;
 160}
 161
 162// true  : read command process successfully
 163// false : register not support
 164unsigned char
 165Wb35Reg_Write(  struct hw_data * pHwData,  u16 RegisterNo,  u32 RegisterValue )
 166{
 167        struct wb35_reg *reg = &pHwData->reg;
 168        struct usb_ctrlrequest *dr;
 169        struct urb      *urb = NULL;
 170        struct wb35_reg_queue *reg_queue = NULL;
 171        u16             UrbSize;
 172
 173
 174        // Module shutdown
 175        if (pHwData->SurpriseRemove)
 176                return false;
 177
 178        // update the register by send urb request------------------------------------
 179        UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 180        reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 181        urb = usb_alloc_urb(0, GFP_ATOMIC);
 182        if (urb && reg_queue) {
 183                reg_queue->DIRECT = 1;// burst write register
 184                reg_queue->INDEX = RegisterNo;
 185                reg_queue->VALUE = cpu_to_le32(RegisterValue);
 186                reg_queue->RESERVED_VALID = false;
 187                dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 188                dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
 189                dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
 190                dr->wValue = cpu_to_le16(0x0);
 191                dr->wIndex = cpu_to_le16(RegisterNo);
 192                dr->wLength = cpu_to_le16(4);
 193
 194                // Enter the sending queue
 195                reg_queue->Next = NULL;
 196                reg_queue->pUsbReq = dr;
 197                reg_queue->urb = urb;
 198
 199                spin_lock_irq(&reg->EP0VM_spin_lock );
 200                if (reg->reg_first == NULL)
 201                        reg->reg_first = reg_queue;
 202                else
 203                        reg->reg_last->Next = reg_queue;
 204                reg->reg_last = reg_queue;
 205
 206                spin_unlock_irq( &reg->EP0VM_spin_lock );
 207
 208                // Start EP0VM
 209                Wb35Reg_EP0VM_start(pHwData);
 210
 211                return true;
 212        } else {
 213                if (urb)
 214                        usb_free_urb(urb);
 215                kfree(reg_queue);
 216                return false;
 217        }
 218}
 219
 220//This command will be executed with a user defined value. When it completes,
 221//this value is useful. For example, hal_set_current_channel will use it.
 222// true  : read command process successfully
 223// false : register not support
 224unsigned char
 225Wb35Reg_WriteWithCallbackValue( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue,
 226                                s8 *pValue, s8 Len)
 227{
 228        struct wb35_reg *reg = &pHwData->reg;
 229        struct usb_ctrlrequest *dr;
 230        struct urb      *urb = NULL;
 231        struct wb35_reg_queue *reg_queue = NULL;
 232        u16             UrbSize;
 233
 234        // Module shutdown
 235        if (pHwData->SurpriseRemove)
 236                return false;
 237
 238        // update the register by send urb request------------------------------------
 239        UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 240        reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 241        urb = usb_alloc_urb(0, GFP_ATOMIC);
 242        if (urb && reg_queue) {
 243                reg_queue->DIRECT = 1;// burst write register
 244                reg_queue->INDEX = RegisterNo;
 245                reg_queue->VALUE = cpu_to_le32(RegisterValue);
 246                //NOTE : Users must guarantee the size of value will not exceed the buffer size.
 247                memcpy(reg_queue->RESERVED, pValue, Len);
 248                reg_queue->RESERVED_VALID = true;
 249                dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 250                dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
 251                dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
 252                dr->wValue = cpu_to_le16(0x0);
 253                dr->wIndex = cpu_to_le16(RegisterNo);
 254                dr->wLength = cpu_to_le16(4);
 255
 256                // Enter the sending queue
 257                reg_queue->Next = NULL;
 258                reg_queue->pUsbReq = dr;
 259                reg_queue->urb = urb;
 260                spin_lock_irq (&reg->EP0VM_spin_lock );
 261                if( reg->reg_first == NULL )
 262                        reg->reg_first = reg_queue;
 263                else
 264                        reg->reg_last->Next = reg_queue;
 265                reg->reg_last = reg_queue;
 266
 267                spin_unlock_irq ( &reg->EP0VM_spin_lock );
 268
 269                // Start EP0VM
 270                Wb35Reg_EP0VM_start(pHwData);
 271                return true;
 272        } else {
 273                if (urb)
 274                        usb_free_urb(urb);
 275                kfree(reg_queue);
 276                return false;
 277        }
 278}
 279
 280// true  : read command process successfully
 281// false : register not support
 282// pRegisterValue : It must be a resident buffer due to asynchronous read register.
 283unsigned char
 284Wb35Reg_ReadSync(  struct hw_data * pHwData,  u16 RegisterNo,   u32 * pRegisterValue )
 285{
 286        struct wb35_reg *reg = &pHwData->reg;
 287        u32 *   pltmp = pRegisterValue;
 288        int ret = -1;
 289
 290        // Module shutdown
 291        if (pHwData->SurpriseRemove)
 292                return false;
 293
 294        // Read the register by send usb message------------------------------------
 295
 296        reg->SyncIoPause = 1;
 297
 298        // 20060717.5 Wait until EP0VM stop
 299        while (reg->EP0vm_state != VM_STOP)
 300                msleep(10);
 301
 302        reg->EP0vm_state = VM_RUNNING;
 303        ret = usb_control_msg( pHwData->WbUsb.udev,
 304                               usb_rcvctrlpipe(pHwData->WbUsb.udev, 0),
 305                               0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
 306                               0x0, RegisterNo, pltmp, 4, HZ*100 );
 307
 308        *pRegisterValue = cpu_to_le32(*pltmp);
 309
 310        reg->EP0vm_state = VM_STOP;
 311
 312        Wb35Reg_Update( pHwData, RegisterNo, *pRegisterValue );
 313        reg->SyncIoPause = 0;
 314
 315        Wb35Reg_EP0VM_start( pHwData );
 316
 317        if (ret < 0) {
 318                #ifdef _PE_REG_DUMP_
 319                printk("EP0 Read register usb message sending error\n");
 320                #endif
 321
 322                pHwData->SurpriseRemove = 1; // 20060704.2
 323                return false;
 324        }
 325
 326        return true;
 327}
 328
 329// true  : read command process successfully
 330// false : register not support
 331// pRegisterValue : It must be a resident buffer due to asynchronous read register.
 332unsigned char
 333Wb35Reg_Read(struct hw_data * pHwData, u16 RegisterNo,  u32 * pRegisterValue )
 334{
 335        struct wb35_reg *reg = &pHwData->reg;
 336        struct usb_ctrlrequest * dr;
 337        struct urb      *urb;
 338        struct wb35_reg_queue *reg_queue;
 339        u16             UrbSize;
 340
 341        // Module shutdown
 342        if (pHwData->SurpriseRemove)
 343                return false;
 344
 345        // update the variable by send Urb to read register ------------------------------------
 346        UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 347        reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 348        urb = usb_alloc_urb(0, GFP_ATOMIC);
 349        if( urb && reg_queue )
 350        {
 351                reg_queue->DIRECT = 0;// read register
 352                reg_queue->INDEX = RegisterNo;
 353                reg_queue->pBuffer = pRegisterValue;
 354                dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 355                dr->bRequestType = USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN;
 356                dr->bRequest = 0x01; // USB or vendor-defined request code, burst mode
 357                dr->wValue = cpu_to_le16(0x0);
 358                dr->wIndex = cpu_to_le16 (RegisterNo);
 359                dr->wLength = cpu_to_le16 (4);
 360
 361                // Enter the sending queue
 362                reg_queue->Next = NULL;
 363                reg_queue->pUsbReq = dr;
 364                reg_queue->urb = urb;
 365                spin_lock_irq ( &reg->EP0VM_spin_lock );
 366                if( reg->reg_first == NULL )
 367                        reg->reg_first = reg_queue;
 368                else
 369                        reg->reg_last->Next = reg_queue;
 370                reg->reg_last = reg_queue;
 371
 372                spin_unlock_irq( &reg->EP0VM_spin_lock );
 373
 374                // Start EP0VM
 375                Wb35Reg_EP0VM_start( pHwData );
 376
 377                return true;
 378        } else {
 379                if (urb)
 380                        usb_free_urb( urb );
 381                kfree(reg_queue);
 382                return false;
 383        }
 384}
 385
 386
 387void
 388Wb35Reg_EP0VM_start(  struct hw_data * pHwData )
 389{
 390        struct wb35_reg *reg = &pHwData->reg;
 391
 392        if (atomic_inc_return(&reg->RegFireCount) == 1) {
 393                reg->EP0vm_state = VM_RUNNING;
 394                Wb35Reg_EP0VM(pHwData);
 395        } else
 396                atomic_dec(&reg->RegFireCount);
 397}
 398
 399void
 400Wb35Reg_EP0VM(struct hw_data * pHwData )
 401{
 402        struct wb35_reg *reg = &pHwData->reg;
 403        struct urb      *urb;
 404        struct usb_ctrlrequest *dr;
 405        u32 *           pBuffer;
 406        int                     ret = -1;
 407        struct wb35_reg_queue *reg_queue;
 408
 409
 410        if (reg->SyncIoPause)
 411                goto cleanup;
 412
 413        if (pHwData->SurpriseRemove)
 414                goto cleanup;
 415
 416        // Get the register data and send to USB through Irp
 417        spin_lock_irq( &reg->EP0VM_spin_lock );
 418        reg_queue = reg->reg_first;
 419        spin_unlock_irq( &reg->EP0VM_spin_lock );
 420
 421        if (!reg_queue)
 422                goto cleanup;
 423
 424        // Get an Urb, send it
 425        urb = (struct urb *)reg_queue->urb;
 426
 427        dr = reg_queue->pUsbReq;
 428        urb = reg_queue->urb;
 429        pBuffer = reg_queue->pBuffer;
 430        if (reg_queue->DIRECT == 1) // output
 431                pBuffer = &reg_queue->VALUE;
 432
 433        usb_fill_control_urb( urb, pHwData->WbUsb.udev,
 434                              REG_DIRECTION(pHwData->WbUsb.udev,reg_queue),
 435                              (u8 *)dr,pBuffer,cpu_to_le16(dr->wLength),
 436                              Wb35Reg_EP0VM_complete, (void*)pHwData);
 437
 438        reg->EP0vm_state = VM_RUNNING;
 439
 440        ret = usb_submit_urb(urb, GFP_ATOMIC);
 441
 442        if (ret < 0) {
 443#ifdef _PE_REG_DUMP_
 444                printk("EP0 Irp sending error\n");
 445#endif
 446                goto cleanup;
 447        }
 448
 449        return;
 450
 451 cleanup:
 452        reg->EP0vm_state = VM_STOP;
 453        atomic_dec(&reg->RegFireCount);
 454}
 455
 456
 457void
 458Wb35Reg_EP0VM_complete(struct urb *urb)
 459{
 460        struct hw_data *  pHwData = (struct hw_data *)urb->context;
 461        struct wb35_reg *reg = &pHwData->reg;
 462        struct wb35_reg_queue *reg_queue;
 463
 464
 465        // Variable setting
 466        reg->EP0vm_state = VM_COMPLETED;
 467        reg->EP0VM_status = urb->status;
 468
 469        if (pHwData->SurpriseRemove) { // Let WbWlanHalt to handle surprise remove
 470                reg->EP0vm_state = VM_STOP;
 471                atomic_dec(&reg->RegFireCount);
 472        } else {
 473                // Complete to send, remove the URB from the first
 474                spin_lock_irq( &reg->EP0VM_spin_lock );
 475                reg_queue = reg->reg_first;
 476                if (reg_queue == reg->reg_last)
 477                        reg->reg_last = NULL;
 478                reg->reg_first = reg->reg_first->Next;
 479                spin_unlock_irq( &reg->EP0VM_spin_lock );
 480
 481                if (reg->EP0VM_status) {
 482#ifdef _PE_REG_DUMP_
 483                        printk("EP0 IoCompleteRoutine return error\n");
 484#endif
 485                        reg->EP0vm_state = VM_STOP;
 486                        pHwData->SurpriseRemove = 1;
 487                } else {
 488                        // Success. Update the result
 489
 490                        // Start the next send
 491                        Wb35Reg_EP0VM(pHwData);
 492                }
 493
 494                kfree(reg_queue);
 495        }
 496
 497        usb_free_urb(urb);
 498}
 499
 500
 501void
 502Wb35Reg_destroy(struct hw_data * pHwData)
 503{
 504        struct wb35_reg *reg = &pHwData->reg;
 505        struct urb      *urb;
 506        struct wb35_reg_queue *reg_queue;
 507
 508
 509        Uxx_power_off_procedure(pHwData);
 510
 511        // Wait for Reg operation completed
 512        do {
 513                msleep(10); // Delay for waiting function enter 940623.1.a
 514        } while (reg->EP0vm_state != VM_STOP);
 515        msleep(10);  // Delay for waiting function enter 940623.1.b
 516
 517        // Release all the data in RegQueue
 518        spin_lock_irq( &reg->EP0VM_spin_lock );
 519        reg_queue = reg->reg_first;
 520        while (reg_queue) {
 521                if (reg_queue == reg->reg_last)
 522                        reg->reg_last = NULL;
 523                reg->reg_first = reg->reg_first->Next;
 524
 525                urb = reg_queue->urb;
 526                spin_unlock_irq( &reg->EP0VM_spin_lock );
 527                if (urb) {
 528                        usb_free_urb(urb);
 529                        kfree(reg_queue);
 530                } else {
 531                        #ifdef _PE_REG_DUMP_
 532                        printk("EP0 queue release error\n");
 533                        #endif
 534                }
 535                spin_lock_irq( &reg->EP0VM_spin_lock );
 536
 537                reg_queue = reg->reg_first;
 538        }
 539        spin_unlock_irq( &reg->EP0VM_spin_lock );
 540}
 541
 542//====================================================================================
 543// The function can be run in passive-level only.
 544//====================================================================================
 545unsigned char Wb35Reg_initial(struct hw_data * pHwData)
 546{
 547        struct wb35_reg *reg=&pHwData->reg;
 548        u32 ltmp;
 549        u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
 550
 551        // Spin lock is acquired for read and write IRP command
 552        spin_lock_init( &reg->EP0VM_spin_lock );
 553
 554        // Getting RF module type from EEPROM ------------------------------------
 555        Wb35Reg_WriteSync( pHwData, 0x03b4, 0x080d0000 ); // Start EEPROM access + Read + address(0x0d)
 556        Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp );
 557
 558        //Update RF module type and determine the PHY type by inf or EEPROM
 559        reg->EEPROMPhyType = (u8)( ltmp & 0xff );
 560        // 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
 561        // 16V AL2230, 17 - AL7230, 18 - AL2230S
 562        // 32 Reserved
 563        // 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
 564        if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
 565                if( (reg->EEPROMPhyType == RF_MAXIM_2825)       ||
 566                        (reg->EEPROMPhyType == RF_MAXIM_2827)   ||
 567                        (reg->EEPROMPhyType == RF_MAXIM_2828)   ||
 568                        (reg->EEPROMPhyType == RF_MAXIM_2829)   ||
 569                        (reg->EEPROMPhyType == RF_MAXIM_V1)     ||
 570                        (reg->EEPROMPhyType == RF_AIROHA_2230)  ||
 571                        (reg->EEPROMPhyType == RF_AIROHA_2230S)    ||
 572                        (reg->EEPROMPhyType == RF_AIROHA_7230)  ||
 573                        (reg->EEPROMPhyType == RF_WB_242)               ||
 574                        (reg->EEPROMPhyType == RF_WB_242_1))
 575                        pHwData->phy_type = reg->EEPROMPhyType;
 576        }
 577
 578        // Power On procedure running. The relative parameter will be set according to phy_type
 579        Uxx_power_on_procedure( pHwData );
 580
 581        // Reading MAC address
 582        Uxx_ReadEthernetAddress( pHwData );
 583
 584        // Read VCO trim for RF parameter
 585        Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08200000 );
 586        Wb35Reg_ReadSync( pHwData, 0x03b4, &VCO_trim );
 587
 588        // Read Antenna On/Off of software flag
 589        Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08210000 );
 590        Wb35Reg_ReadSync( pHwData, 0x03b4, &SoftwareSet );
 591
 592        // Read TXVGA
 593        Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08100000 );
 594        Wb35Reg_ReadSync( pHwData, 0x03b4, &TxVga );
 595
 596        // Get Scan interval setting from EEPROM offset 0x1c
 597        Wb35Reg_WriteSync( pHwData, 0x03b4, 0x081d0000 );
 598        Wb35Reg_ReadSync( pHwData, 0x03b4, &Region_ScanInterval );
 599
 600        // Update Ethernet address
 601        memcpy( pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN );
 602
 603        // Update software variable
 604        pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
 605        TxVga &= 0x000000ff;
 606        pHwData->PowerIndexFromEEPROM = (u8)TxVga;
 607        pHwData->VCO_trim = (u8)VCO_trim & 0xff;
 608        if (pHwData->VCO_trim == 0xff)
 609                pHwData->VCO_trim = 0x28;
 610
 611        reg->EEPROMRegion = (u8)(Region_ScanInterval>>8); // 20060720
 612        if( reg->EEPROMRegion<1 || reg->EEPROMRegion>6 )
 613                reg->EEPROMRegion = REGION_AUTO;
 614
 615        //For Get Tx VGA from EEPROM 20060315.5 move here
 616        GetTxVgaFromEEPROM( pHwData );
 617
 618        // Set Scan Interval
 619        pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
 620        if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) // Is default setting 0xff * 10
 621                pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
 622
 623        // Initial register
 624        RFSynthesizer_initial(pHwData);
 625
 626        BBProcessor_initial(pHwData); // Async write, must wait until complete
 627
 628        Wb35Reg_phy_calibration(pHwData);
 629
 630        Mxx_initial(pHwData);
 631        Dxx_initial(pHwData);
 632
 633        if (pHwData->SurpriseRemove)
 634                return false;
 635        else
 636                return true; // Initial fail
 637}
 638
 639//===================================================================================
 640//  CardComputeCrc --
 641//
 642//  Description:
 643//    Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
 644//
 645//  Arguments:
 646//    Buffer - the input buffer
 647//    Length - the length of Buffer
 648//
 649//  Return Value:
 650//    The 32-bit CRC value.
 651//
 652//  Note:
 653//    This is adapted from the comments in the assembly language
 654//    version in _GENREQ.ASM of the DWB NE1000/2000 driver.
 655//==================================================================================
 656u32
 657CardComputeCrc(u8 * Buffer, u32 Length)
 658{
 659    u32 Crc, Carry;
 660    u32  i, j;
 661    u8 CurByte;
 662
 663    Crc = 0xffffffff;
 664
 665    for (i = 0; i < Length; i++) {
 666
 667        CurByte = Buffer[i];
 668
 669        for (j = 0; j < 8; j++) {
 670
 671            Carry     = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
 672            Crc     <<= 1;
 673            CurByte >>= 1;
 674
 675            if (Carry) {
 676                Crc =(Crc ^ 0x04c11db6) | Carry;
 677            }
 678        }
 679    }
 680
 681    return Crc;
 682}
 683
 684
 685//==================================================================
 686// BitReverse --
 687//   Reverse the bits in the input argument, dwData, which is
 688//   regarded as a string of bits with the length, DataLength.
 689//
 690// Arguments:
 691//   dwData     :
 692//   DataLength :
 693//
 694// Return:
 695//   The converted value.
 696//==================================================================
 697u32 BitReverse( u32 dwData, u32 DataLength)
 698{
 699        u32   HalfLength, i, j;
 700        u32   BitA, BitB;
 701
 702        if ( DataLength <= 0)       return 0;   // No conversion is done.
 703        dwData = dwData & (0xffffffff >> (32 - DataLength));
 704
 705        HalfLength = DataLength / 2;
 706        for ( i = 0, j = DataLength-1 ; i < HalfLength; i++, j--)
 707        {
 708                BitA = GetBit( dwData, i);
 709                BitB = GetBit( dwData, j);
 710                if (BitA && !BitB) {
 711                        dwData = ClearBit( dwData, i);
 712                        dwData = SetBit( dwData, j);
 713                } else if (!BitA && BitB) {
 714                        dwData = SetBit( dwData, i);
 715                        dwData = ClearBit( dwData, j);
 716                } else
 717                {
 718                        // Do nothing since these two bits are of the save values.
 719                }
 720        }
 721
 722        return dwData;
 723}
 724
 725void Wb35Reg_phy_calibration(  struct hw_data * pHwData )
 726{
 727        u32 BB3c, BB54;
 728
 729        if ((pHwData->phy_type == RF_WB_242) ||
 730                (pHwData->phy_type == RF_WB_242_1)) {
 731                phy_calibration_winbond ( pHwData, 2412 ); // Sync operation
 732                Wb35Reg_ReadSync( pHwData, 0x103c, &BB3c );
 733                Wb35Reg_ReadSync( pHwData, 0x1054, &BB54 );
 734
 735                pHwData->BB3c_cal = BB3c;
 736                pHwData->BB54_cal = BB54;
 737
 738                RFSynthesizer_initial(pHwData);
 739                BBProcessor_initial(pHwData); // Async operation
 740
 741                Wb35Reg_WriteSync( pHwData, 0x103c, BB3c );
 742                Wb35Reg_WriteSync( pHwData, 0x1054, BB54 );
 743        }
 744}
 745
 746
 747