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22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/errno.h>
26#include <linux/platform_device.h>
27#include <linux/delay.h>
28#include <linux/list.h>
29#include <linux/interrupt.h>
30#include <linux/proc_fs.h>
31#include <linux/clk.h>
32#include <linux/irq.h>
33#include <linux/gpio.h>
34
35#include <asm/byteorder.h>
36#include <mach/hardware.h>
37
38#include <linux/usb.h>
39#include <linux/usb/ch9.h>
40#include <linux/usb/gadget.h>
41#include <mach/udc.h>
42
43#include "pxa27x_udc.h"
44
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81
82#define DRIVER_VERSION "2008-04-18"
83#define DRIVER_DESC "PXA 27x USB Device Controller driver"
84
85static const char driver_name[] = "pxa27x_udc";
86static struct pxa_udc *the_controller;
87
88static void handle_ep(struct pxa_ep *ep);
89
90
91
92
93#ifdef CONFIG_USB_GADGET_DEBUG_FS
94
95#include <linux/debugfs.h>
96#include <linux/uaccess.h>
97#include <linux/seq_file.h>
98
99static int state_dbg_show(struct seq_file *s, void *p)
100{
101 struct pxa_udc *udc = s->private;
102 int pos = 0, ret;
103 u32 tmp;
104
105 ret = -ENODEV;
106 if (!udc->driver)
107 goto out;
108
109
110 pos += seq_printf(s, DRIVER_DESC "\n"
111 "%s version: %s\nGadget driver: %s\n",
112 driver_name, DRIVER_VERSION,
113 udc->driver ? udc->driver->driver.name : "(none)");
114
115 tmp = udc_readl(udc, UDCCR);
116 pos += seq_printf(s,
117 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
118 "con=%d,inter=%d,altinter=%d\n", tmp,
119 (tmp & UDCCR_OEN) ? " oen":"",
120 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
121 (tmp & UDCCR_AHNP) ? " rem" : "",
122 (tmp & UDCCR_BHNP) ? " rstir" : "",
123 (tmp & UDCCR_DWRE) ? " dwre" : "",
124 (tmp & UDCCR_SMAC) ? " smac" : "",
125 (tmp & UDCCR_EMCE) ? " emce" : "",
126 (tmp & UDCCR_UDR) ? " udr" : "",
127 (tmp & UDCCR_UDA) ? " uda" : "",
128 (tmp & UDCCR_UDE) ? " ude" : "",
129 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
130 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
131 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
132
133 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
134 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
135 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
136 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
137 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
138 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
139 "reconfig=%lu\n",
140 udc->stats.irqs_reset, udc->stats.irqs_suspend,
141 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
142
143 ret = 0;
144out:
145 return ret;
146}
147
148static int queues_dbg_show(struct seq_file *s, void *p)
149{
150 struct pxa_udc *udc = s->private;
151 struct pxa_ep *ep;
152 struct pxa27x_request *req;
153 int pos = 0, i, maxpkt, ret;
154
155 ret = -ENODEV;
156 if (!udc->driver)
157 goto out;
158
159
160 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
161 ep = &udc->pxa_ep[i];
162 maxpkt = ep->fifo_size;
163 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
164 EPNAME(ep), maxpkt, "pio");
165
166 if (list_empty(&ep->queue)) {
167 pos += seq_printf(s, "\t(nothing queued)\n");
168 continue;
169 }
170
171 list_for_each_entry(req, &ep->queue, queue) {
172 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
173 &req->req, req->req.actual,
174 req->req.length, req->req.buf);
175 }
176 }
177
178 ret = 0;
179out:
180 return ret;
181}
182
183static int eps_dbg_show(struct seq_file *s, void *p)
184{
185 struct pxa_udc *udc = s->private;
186 struct pxa_ep *ep;
187 int pos = 0, i, ret;
188 u32 tmp;
189
190 ret = -ENODEV;
191 if (!udc->driver)
192 goto out;
193
194 ep = &udc->pxa_ep[0];
195 tmp = udc_ep_readl(ep, UDCCSR);
196 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
197 (tmp & UDCCSR0_SA) ? " sa" : "",
198 (tmp & UDCCSR0_RNE) ? " rne" : "",
199 (tmp & UDCCSR0_FST) ? " fst" : "",
200 (tmp & UDCCSR0_SST) ? " sst" : "",
201 (tmp & UDCCSR0_DME) ? " dme" : "",
202 (tmp & UDCCSR0_IPR) ? " ipr" : "",
203 (tmp & UDCCSR0_OPC) ? " opc" : "");
204 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
205 ep = &udc->pxa_ep[i];
206 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
207 pos += seq_printf(s, "%-12s: "
208 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
209 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
210 "udcbcr=%d\n",
211 EPNAME(ep),
212 ep->stats.in_bytes, ep->stats.in_ops,
213 ep->stats.out_bytes, ep->stats.out_ops,
214 ep->stats.irqs,
215 tmp, udc_ep_readl(ep, UDCCSR),
216 udc_ep_readl(ep, UDCBCR));
217 }
218
219 ret = 0;
220out:
221 return ret;
222}
223
224static int eps_dbg_open(struct inode *inode, struct file *file)
225{
226 return single_open(file, eps_dbg_show, inode->i_private);
227}
228
229static int queues_dbg_open(struct inode *inode, struct file *file)
230{
231 return single_open(file, queues_dbg_show, inode->i_private);
232}
233
234static int state_dbg_open(struct inode *inode, struct file *file)
235{
236 return single_open(file, state_dbg_show, inode->i_private);
237}
238
239static const struct file_operations state_dbg_fops = {
240 .owner = THIS_MODULE,
241 .open = state_dbg_open,
242 .llseek = seq_lseek,
243 .read = seq_read,
244 .release = single_release,
245};
246
247static const struct file_operations queues_dbg_fops = {
248 .owner = THIS_MODULE,
249 .open = queues_dbg_open,
250 .llseek = seq_lseek,
251 .read = seq_read,
252 .release = single_release,
253};
254
255static const struct file_operations eps_dbg_fops = {
256 .owner = THIS_MODULE,
257 .open = eps_dbg_open,
258 .llseek = seq_lseek,
259 .read = seq_read,
260 .release = single_release,
261};
262
263static void pxa_init_debugfs(struct pxa_udc *udc)
264{
265 struct dentry *root, *state, *queues, *eps;
266
267 root = debugfs_create_dir(udc->gadget.name, NULL);
268 if (IS_ERR(root) || !root)
269 goto err_root;
270
271 state = debugfs_create_file("udcstate", 0400, root, udc,
272 &state_dbg_fops);
273 if (!state)
274 goto err_state;
275 queues = debugfs_create_file("queues", 0400, root, udc,
276 &queues_dbg_fops);
277 if (!queues)
278 goto err_queues;
279 eps = debugfs_create_file("epstate", 0400, root, udc,
280 &eps_dbg_fops);
281 if (!eps)
282 goto err_eps;
283
284 udc->debugfs_root = root;
285 udc->debugfs_state = state;
286 udc->debugfs_queues = queues;
287 udc->debugfs_eps = eps;
288 return;
289err_eps:
290 debugfs_remove(eps);
291err_queues:
292 debugfs_remove(queues);
293err_state:
294 debugfs_remove(root);
295err_root:
296 dev_err(udc->dev, "debugfs is not available\n");
297}
298
299static void pxa_cleanup_debugfs(struct pxa_udc *udc)
300{
301 debugfs_remove(udc->debugfs_eps);
302 debugfs_remove(udc->debugfs_queues);
303 debugfs_remove(udc->debugfs_state);
304 debugfs_remove(udc->debugfs_root);
305 udc->debugfs_eps = NULL;
306 udc->debugfs_queues = NULL;
307 udc->debugfs_state = NULL;
308 udc->debugfs_root = NULL;
309}
310
311#else
312static inline void pxa_init_debugfs(struct pxa_udc *udc)
313{
314}
315
316static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
317{
318}
319#endif
320
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329
330
331static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
332 int config, int interface, int altsetting)
333{
334 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
335 return 0;
336 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
337 return 0;
338 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
339 return 0;
340 if ((ep->config != config) || (ep->interface != interface)
341 || (ep->alternate != altsetting))
342 return 0;
343 return 1;
344}
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370
371static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
372 struct udc_usb_ep *udc_usb_ep)
373{
374 int i;
375 struct pxa_ep *ep;
376 int cfg = udc->config;
377 int iface = udc->last_interface;
378 int alt = udc->last_alternate;
379
380 if (udc_usb_ep == &udc->udc_usb_ep[0])
381 return &udc->pxa_ep[0];
382
383 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
384 ep = &udc->pxa_ep[i];
385 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
386 return ep;
387 }
388 return NULL;
389}
390
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399
400
401static void update_pxa_ep_matches(struct pxa_udc *udc)
402{
403 int i;
404 struct udc_usb_ep *udc_usb_ep;
405
406 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
407 udc_usb_ep = &udc->udc_usb_ep[i];
408 if (udc_usb_ep->pxa_ep)
409 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
410 }
411}
412
413
414
415
416
417static void pio_irq_enable(struct pxa_ep *ep)
418{
419 struct pxa_udc *udc = ep->dev;
420 int index = EPIDX(ep);
421 u32 udcicr0 = udc_readl(udc, UDCICR0);
422 u32 udcicr1 = udc_readl(udc, UDCICR1);
423
424 if (index < 16)
425 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
426 else
427 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
428}
429
430
431
432
433
434static void pio_irq_disable(struct pxa_ep *ep)
435{
436 struct pxa_udc *udc = ep->dev;
437 int index = EPIDX(ep);
438 u32 udcicr0 = udc_readl(udc, UDCICR0);
439 u32 udcicr1 = udc_readl(udc, UDCICR1);
440
441 if (index < 16)
442 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
443 else
444 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
445}
446
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452
453
454static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
455{
456 u32 udccr = udc_readl(udc, UDCCR);
457 udc_writel(udc, UDCCR,
458 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
459}
460
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467
468static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
469{
470 u32 udccr = udc_readl(udc, UDCCR);
471 udc_writel(udc, UDCCR,
472 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
473}
474
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484
485static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
486{
487 if (is_ep0(ep))
488 mask |= UDCCSR0_ACM;
489 udc_ep_writel(ep, UDCCSR, mask);
490}
491
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497
498static int ep_count_bytes_remain(struct pxa_ep *ep)
499{
500 if (ep->dir_in)
501 return -EOPNOTSUPP;
502 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
503}
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514
515static int ep_is_empty(struct pxa_ep *ep)
516{
517 int ret;
518
519 if (!is_ep0(ep) && ep->dir_in)
520 return -EOPNOTSUPP;
521 if (is_ep0(ep))
522 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
523 else
524 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
525 return ret;
526}
527
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536
537static int ep_is_full(struct pxa_ep *ep)
538{
539 if (is_ep0(ep))
540 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
541 if (!ep->dir_in)
542 return -EOPNOTSUPP;
543 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
544}
545
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551
552static int epout_has_pkt(struct pxa_ep *ep)
553{
554 if (!is_ep0(ep) && ep->dir_in)
555 return -EOPNOTSUPP;
556 if (is_ep0(ep))
557 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
558 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
559}
560
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565
566static void set_ep0state(struct pxa_udc *udc, int state)
567{
568 struct pxa_ep *ep = &udc->pxa_ep[0];
569 char *old_stname = EP0_STNAME(udc);
570
571 udc->ep0state = state;
572 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
573 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
574 udc_ep_readl(ep, UDCBCR));
575}
576
577
578
579
580
581static void ep0_idle(struct pxa_udc *dev)
582{
583 set_ep0state(dev, WAIT_FOR_SETUP);
584}
585
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592
593static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
594{
595 if (is_in)
596 ep->stats.in_ops++;
597 else
598 ep->stats.out_ops++;
599}
600
601
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605
606
607static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
608{
609 if (is_in)
610 ep->stats.in_bytes += count;
611 else
612 ep->stats.out_bytes += count;
613}
614
615
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618
619
620
621static __init void pxa_ep_setup(struct pxa_ep *ep)
622{
623 u32 new_udccr;
624
625 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
626 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
627 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
628 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
629 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
630 | ((ep->dir_in) ? UDCCONR_ED : 0)
631 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
632 | UDCCONR_EE;
633
634 udc_ep_writel(ep, UDCCR, new_udccr);
635}
636
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641
642
643static __init void pxa_eps_setup(struct pxa_udc *dev)
644{
645 unsigned int i;
646
647 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
648
649 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
650 pxa_ep_setup(&dev->pxa_ep[i]);
651}
652
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661
662static struct usb_request *
663pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
664{
665 struct pxa27x_request *req;
666
667 req = kzalloc(sizeof *req, gfp_flags);
668 if (!req)
669 return NULL;
670
671 INIT_LIST_HEAD(&req->queue);
672 req->in_use = 0;
673 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
674
675 return &req->req;
676}
677
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679
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684
685static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
686{
687 struct pxa27x_request *req;
688
689 req = container_of(_req, struct pxa27x_request, req);
690 WARN_ON(!list_empty(&req->queue));
691 kfree(req);
692}
693
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703
704static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
705{
706 if (unlikely(!req))
707 return;
708 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
709 req->req.length, udc_ep_readl(ep, UDCCSR));
710
711 req->in_use = 1;
712 list_add_tail(&req->queue, &ep->queue);
713 pio_irq_enable(ep);
714}
715
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723
724
725
726
727static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
728{
729 if (unlikely(!req))
730 return;
731 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
732 req->req.length, udc_ep_readl(ep, UDCCSR));
733
734 list_del_init(&req->queue);
735 req->in_use = 0;
736 if (!is_ep0(ep) && list_empty(&ep->queue))
737 pio_irq_disable(ep);
738}
739
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746
747
748
749
750static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status)
751{
752 ep_del_request(ep, req);
753 if (likely(req->req.status == -EINPROGRESS))
754 req->req.status = status;
755 else
756 status = req->req.status;
757
758 if (status && status != -ESHUTDOWN)
759 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
760 &req->req, status,
761 req->req.actual, req->req.length);
762
763 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
764}
765
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774
775static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
776{
777 inc_ep_stats_reqs(ep, !USB_DIR_IN);
778 req_done(ep, req, 0);
779}
780
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790
791static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req)
792{
793 set_ep0state(ep->dev, OUT_STATUS_STAGE);
794 ep_end_out_req(ep, req);
795 ep0_idle(ep->dev);
796}
797
798
799
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806
807static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
808{
809 inc_ep_stats_reqs(ep, USB_DIR_IN);
810 req_done(ep, req, 0);
811}
812
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822
823static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req)
824{
825 set_ep0state(ep->dev, IN_STATUS_STAGE);
826 ep_end_in_req(ep, req);
827}
828
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838
839static void nuke(struct pxa_ep *ep, int status)
840{
841 struct pxa27x_request *req;
842
843 while (!list_empty(&ep->queue)) {
844 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
845 req_done(ep, req, status);
846 }
847}
848
849
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858
859
860static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
861{
862 u32 *buf;
863 int bytes_ep, bufferspace, count, i;
864
865 bytes_ep = ep_count_bytes_remain(ep);
866 bufferspace = req->req.length - req->req.actual;
867
868 buf = (u32 *)(req->req.buf + req->req.actual);
869 prefetchw(buf);
870
871 if (likely(!ep_is_empty(ep)))
872 count = min(bytes_ep, bufferspace);
873 else
874 count = 0;
875
876 for (i = count; i > 0; i -= 4)
877 *buf++ = udc_ep_readl(ep, UDCDR);
878 req->req.actual += count;
879
880 ep_write_UDCCSR(ep, UDCCSR_PC);
881
882 return count;
883}
884
885
886
887
888
889
890
891
892
893
894
895
896
897static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
898 unsigned int max)
899{
900 int length, count, remain, i;
901 u32 *buf;
902 u8 *buf_8;
903
904 buf = (u32 *)(req->req.buf + req->req.actual);
905 prefetch(buf);
906
907 length = min(req->req.length - req->req.actual, max);
908 req->req.actual += length;
909
910 remain = length & 0x3;
911 count = length & ~(0x3);
912 for (i = count; i > 0 ; i -= 4)
913 udc_ep_writel(ep, UDCDR, *buf++);
914
915 buf_8 = (u8 *)buf;
916 for (i = remain; i > 0; i--)
917 udc_ep_writeb(ep, UDCDR, *buf_8++);
918
919 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
920 udc_ep_readl(ep, UDCCSR));
921
922 return length;
923}
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
940{
941 int count, is_short, completed = 0;
942
943 while (epout_has_pkt(ep)) {
944 count = read_packet(ep, req);
945 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
946
947 is_short = (count < ep->fifo_size);
948 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
949 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
950 &req->req, req->req.actual, req->req.length);
951
952
953 if (is_short || req->req.actual == req->req.length) {
954 completed = 1;
955 break;
956 }
957
958 }
959 return completed;
960}
961
962
963
964
965
966
967
968
969
970
971
972
973
974static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
975{
976 unsigned max;
977 int count, is_short, is_last = 0, completed = 0, totcount = 0;
978 u32 udccsr;
979
980 max = ep->fifo_size;
981 do {
982 is_short = 0;
983
984 udccsr = udc_ep_readl(ep, UDCCSR);
985 if (udccsr & UDCCSR_PC) {
986 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
987 udccsr);
988 ep_write_UDCCSR(ep, UDCCSR_PC);
989 }
990 if (udccsr & UDCCSR_TRN) {
991 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
992 udccsr);
993 ep_write_UDCCSR(ep, UDCCSR_TRN);
994 }
995
996 count = write_packet(ep, req, max);
997 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
998 totcount += count;
999
1000
1001 if (unlikely(count < max)) {
1002 is_last = 1;
1003 is_short = 1;
1004 } else {
1005 if (likely(req->req.length > req->req.actual)
1006 || req->req.zero)
1007 is_last = 0;
1008 else
1009 is_last = 1;
1010
1011 is_short = unlikely(max < ep->fifo_size);
1012 }
1013
1014 if (is_short)
1015 ep_write_UDCCSR(ep, UDCCSR_SP);
1016
1017
1018 if (is_last) {
1019 completed = 1;
1020 break;
1021 }
1022 } while (!ep_is_full(ep));
1023
1024 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1025 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1026 req->req.length - req->req.actual, &req->req);
1027
1028 return completed;
1029}
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1043{
1044 int count, is_short, completed = 0;
1045
1046 while (epout_has_pkt(ep)) {
1047 count = read_packet(ep, req);
1048 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1049 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1050
1051 is_short = (count < ep->fifo_size);
1052 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1053 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1054 &req->req, req->req.actual, req->req.length);
1055
1056 if (is_short || req->req.actual >= req->req.length) {
1057 completed = 1;
1058 break;
1059 }
1060 }
1061
1062 return completed;
1063}
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1081{
1082 unsigned count;
1083 int is_last, is_short;
1084
1085 count = write_packet(ep, req, EP0_FIFO_SIZE);
1086 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1087
1088 is_short = (count < EP0_FIFO_SIZE);
1089 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1090
1091
1092 if (unlikely(is_short))
1093 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1094
1095 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1096 count, is_short ? "/S" : "", is_last ? "/L" : "",
1097 req->req.length - req->req.actual,
1098 &req->req, udc_ep_readl(ep, UDCCSR));
1099
1100 return is_last;
1101}
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1116 gfp_t gfp_flags)
1117{
1118 struct udc_usb_ep *udc_usb_ep;
1119 struct pxa_ep *ep;
1120 struct pxa27x_request *req;
1121 struct pxa_udc *dev;
1122 unsigned long flags;
1123 int rc = 0;
1124 int is_first_req;
1125 unsigned length;
1126
1127 req = container_of(_req, struct pxa27x_request, req);
1128 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1129
1130 if (unlikely(!_req || !_req->complete || !_req->buf))
1131 return -EINVAL;
1132
1133 if (unlikely(!_ep))
1134 return -EINVAL;
1135
1136 dev = udc_usb_ep->dev;
1137 ep = udc_usb_ep->pxa_ep;
1138 if (unlikely(!ep))
1139 return -EINVAL;
1140
1141 dev = ep->dev;
1142 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1143 ep_dbg(ep, "bogus device state\n");
1144 return -ESHUTDOWN;
1145 }
1146
1147
1148
1149
1150 if (unlikely(EPXFERTYPE_is_ISO(ep)
1151 && req->req.length > ep->fifo_size))
1152 return -EMSGSIZE;
1153
1154 spin_lock_irqsave(&ep->lock, flags);
1155
1156 is_first_req = list_empty(&ep->queue);
1157 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1158 _req, is_first_req ? "yes" : "no",
1159 _req->length, _req->buf);
1160
1161 if (!ep->enabled) {
1162 _req->status = -ESHUTDOWN;
1163 rc = -ESHUTDOWN;
1164 goto out;
1165 }
1166
1167 if (req->in_use) {
1168 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1169 goto out;
1170 }
1171
1172 length = _req->length;
1173 _req->status = -EINPROGRESS;
1174 _req->actual = 0;
1175
1176 ep_add_request(ep, req);
1177
1178 if (is_ep0(ep)) {
1179 switch (dev->ep0state) {
1180 case WAIT_ACK_SET_CONF_INTERF:
1181 if (length == 0) {
1182 ep_end_in_req(ep, req);
1183 } else {
1184 ep_err(ep, "got a request of %d bytes while"
1185 "in state WAIT_ACK_SET_CONF_INTERF\n",
1186 length);
1187 ep_del_request(ep, req);
1188 rc = -EL2HLT;
1189 }
1190 ep0_idle(ep->dev);
1191 break;
1192 case IN_DATA_STAGE:
1193 if (!ep_is_full(ep))
1194 if (write_ep0_fifo(ep, req))
1195 ep0_end_in_req(ep, req);
1196 break;
1197 case OUT_DATA_STAGE:
1198 if ((length == 0) || !epout_has_pkt(ep))
1199 if (read_ep0_fifo(ep, req))
1200 ep0_end_out_req(ep, req);
1201 break;
1202 default:
1203 ep_err(ep, "odd state %s to send me a request\n",
1204 EP0_STNAME(ep->dev));
1205 ep_del_request(ep, req);
1206 rc = -EL2HLT;
1207 break;
1208 }
1209 } else {
1210 handle_ep(ep);
1211 }
1212
1213out:
1214 spin_unlock_irqrestore(&ep->lock, flags);
1215 return rc;
1216}
1217
1218
1219
1220
1221
1222
1223
1224
1225static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1226{
1227 struct pxa_ep *ep;
1228 struct udc_usb_ep *udc_usb_ep;
1229 struct pxa27x_request *req;
1230 unsigned long flags;
1231 int rc = -EINVAL;
1232
1233 if (!_ep)
1234 return rc;
1235 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1236 ep = udc_usb_ep->pxa_ep;
1237 if (!ep || is_ep0(ep))
1238 return rc;
1239
1240 spin_lock_irqsave(&ep->lock, flags);
1241
1242
1243 list_for_each_entry(req, &ep->queue, queue) {
1244 if (&req->req == _req) {
1245 req_done(ep, req, -ECONNRESET);
1246 rc = 0;
1247 break;
1248 }
1249 }
1250
1251 spin_unlock_irqrestore(&ep->lock, flags);
1252 return rc;
1253}
1254
1255
1256
1257
1258
1259
1260
1261
1262static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1263{
1264 struct pxa_ep *ep;
1265 struct udc_usb_ep *udc_usb_ep;
1266 unsigned long flags;
1267 int rc;
1268
1269
1270 if (!_ep)
1271 return -EINVAL;
1272 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1273 ep = udc_usb_ep->pxa_ep;
1274 if (!ep || is_ep0(ep))
1275 return -EINVAL;
1276
1277 if (value == 0) {
1278
1279
1280
1281
1282
1283
1284 ep_dbg(ep, "only host can clear halt\n");
1285 return -EROFS;
1286 }
1287
1288 spin_lock_irqsave(&ep->lock, flags);
1289
1290 rc = -EAGAIN;
1291 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1292 goto out;
1293
1294
1295 rc = 0;
1296 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1297 if (is_ep0(ep))
1298 set_ep0state(ep->dev, STALL);
1299
1300out:
1301 spin_unlock_irqrestore(&ep->lock, flags);
1302 return rc;
1303}
1304
1305
1306
1307
1308
1309
1310
1311static int pxa_ep_fifo_status(struct usb_ep *_ep)
1312{
1313 struct pxa_ep *ep;
1314 struct udc_usb_ep *udc_usb_ep;
1315
1316 if (!_ep)
1317 return -ENODEV;
1318 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1319 ep = udc_usb_ep->pxa_ep;
1320 if (!ep || is_ep0(ep))
1321 return -ENODEV;
1322
1323 if (ep->dir_in)
1324 return -EOPNOTSUPP;
1325 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1326 return 0;
1327 else
1328 return ep_count_bytes_remain(ep) + 1;
1329}
1330
1331
1332
1333
1334
1335
1336
1337static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1338{
1339 struct pxa_ep *ep;
1340 struct udc_usb_ep *udc_usb_ep;
1341 unsigned long flags;
1342
1343 if (!_ep)
1344 return;
1345 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1346 ep = udc_usb_ep->pxa_ep;
1347 if (!ep || is_ep0(ep))
1348 return;
1349
1350 spin_lock_irqsave(&ep->lock, flags);
1351
1352 if (unlikely(!list_empty(&ep->queue)))
1353 ep_dbg(ep, "called while queue list not empty\n");
1354 ep_dbg(ep, "called\n");
1355
1356
1357 if (!ep->dir_in) {
1358 while (!ep_is_empty(ep))
1359 udc_ep_readl(ep, UDCDR);
1360 } else {
1361
1362 ep_write_UDCCSR(ep,
1363 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1364 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1365 }
1366
1367 spin_unlock_irqrestore(&ep->lock, flags);
1368
1369 return;
1370}
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382static int pxa_ep_enable(struct usb_ep *_ep,
1383 const struct usb_endpoint_descriptor *desc)
1384{
1385 struct pxa_ep *ep;
1386 struct udc_usb_ep *udc_usb_ep;
1387 struct pxa_udc *udc;
1388
1389 if (!_ep || !desc)
1390 return -EINVAL;
1391
1392 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1393 if (udc_usb_ep->pxa_ep) {
1394 ep = udc_usb_ep->pxa_ep;
1395 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1396 _ep->name);
1397 } else {
1398 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1399 }
1400
1401 if (!ep || is_ep0(ep)) {
1402 dev_err(udc_usb_ep->dev->dev,
1403 "unable to match pxa_ep for ep %s\n",
1404 _ep->name);
1405 return -EINVAL;
1406 }
1407
1408 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1409 || (ep->type != usb_endpoint_type(desc))) {
1410 ep_err(ep, "type mismatch\n");
1411 return -EINVAL;
1412 }
1413
1414 if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
1415 ep_err(ep, "bad maxpacket\n");
1416 return -ERANGE;
1417 }
1418
1419 udc_usb_ep->pxa_ep = ep;
1420 udc = ep->dev;
1421
1422 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1423 ep_err(ep, "bogus device state\n");
1424 return -ESHUTDOWN;
1425 }
1426
1427 ep->enabled = 1;
1428
1429
1430 pxa_ep_fifo_flush(_ep);
1431
1432 ep_dbg(ep, "enabled\n");
1433 return 0;
1434}
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444static int pxa_ep_disable(struct usb_ep *_ep)
1445{
1446 struct pxa_ep *ep;
1447 struct udc_usb_ep *udc_usb_ep;
1448 unsigned long flags;
1449
1450 if (!_ep)
1451 return -EINVAL;
1452
1453 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1454 ep = udc_usb_ep->pxa_ep;
1455 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1456 return -EINVAL;
1457
1458 spin_lock_irqsave(&ep->lock, flags);
1459 ep->enabled = 0;
1460 nuke(ep, -ESHUTDOWN);
1461 spin_unlock_irqrestore(&ep->lock, flags);
1462
1463 pxa_ep_fifo_flush(_ep);
1464 udc_usb_ep->pxa_ep = NULL;
1465
1466 ep_dbg(ep, "disabled\n");
1467 return 0;
1468}
1469
1470static struct usb_ep_ops pxa_ep_ops = {
1471 .enable = pxa_ep_enable,
1472 .disable = pxa_ep_disable,
1473
1474 .alloc_request = pxa_ep_alloc_request,
1475 .free_request = pxa_ep_free_request,
1476
1477 .queue = pxa_ep_queue,
1478 .dequeue = pxa_ep_dequeue,
1479
1480 .set_halt = pxa_ep_set_halt,
1481 .fifo_status = pxa_ep_fifo_status,
1482 .fifo_flush = pxa_ep_fifo_flush,
1483};
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494static void dplus_pullup(struct pxa_udc *udc, int on)
1495{
1496 if (on) {
1497 if (gpio_is_valid(udc->mach->gpio_pullup))
1498 gpio_set_value(udc->mach->gpio_pullup,
1499 !udc->mach->gpio_pullup_inverted);
1500 if (udc->mach->udc_command)
1501 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1502 } else {
1503 if (gpio_is_valid(udc->mach->gpio_pullup))
1504 gpio_set_value(udc->mach->gpio_pullup,
1505 udc->mach->gpio_pullup_inverted);
1506 if (udc->mach->udc_command)
1507 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1508 }
1509 udc->pullup_on = on;
1510}
1511
1512
1513
1514
1515
1516static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1517{
1518 struct pxa_udc *udc = to_gadget_udc(_gadget);
1519
1520 return (udc_readl(udc, UDCFNR) & 0x7ff);
1521}
1522
1523
1524
1525
1526
1527
1528
1529static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1530{
1531 struct pxa_udc *udc = to_gadget_udc(_gadget);
1532
1533
1534 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1535 return -EHOSTUNREACH;
1536 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1537 return 0;
1538}
1539
1540static void udc_enable(struct pxa_udc *udc);
1541static void udc_disable(struct pxa_udc *udc);
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556static int should_enable_udc(struct pxa_udc *udc)
1557{
1558 int put_on;
1559
1560 put_on = ((udc->pullup_on) && (udc->driver));
1561 put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
1562 return put_on;
1563}
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577static int should_disable_udc(struct pxa_udc *udc)
1578{
1579 int put_off;
1580
1581 put_off = ((!udc->pullup_on) || (!udc->driver));
1582 put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
1583 return put_off;
1584}
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1595{
1596 struct pxa_udc *udc = to_gadget_udc(_gadget);
1597
1598 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1599 return -EOPNOTSUPP;
1600
1601 dplus_pullup(udc, is_active);
1602
1603 if (should_enable_udc(udc))
1604 udc_enable(udc);
1605 if (should_disable_udc(udc))
1606 udc_disable(udc);
1607 return 0;
1608}
1609
1610static void udc_enable(struct pxa_udc *udc);
1611static void udc_disable(struct pxa_udc *udc);
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1624{
1625 struct pxa_udc *udc = to_gadget_udc(_gadget);
1626
1627 udc->vbus_sensed = is_active;
1628 if (should_enable_udc(udc))
1629 udc_enable(udc);
1630 if (should_disable_udc(udc))
1631 udc_disable(udc);
1632
1633 return 0;
1634}
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1649{
1650 struct pxa_udc *udc;
1651
1652 udc = to_gadget_udc(_gadget);
1653 if (udc->transceiver)
1654 return otg_set_power(udc->transceiver, mA);
1655 return -EOPNOTSUPP;
1656}
1657
1658static const struct usb_gadget_ops pxa_udc_ops = {
1659 .get_frame = pxa_udc_get_frame,
1660 .wakeup = pxa_udc_wakeup,
1661 .pullup = pxa_udc_pullup,
1662 .vbus_session = pxa_udc_vbus_session,
1663 .vbus_draw = pxa_udc_vbus_draw,
1664};
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674static void udc_disable(struct pxa_udc *udc)
1675{
1676 if (!udc->enabled)
1677 return;
1678
1679 udc_writel(udc, UDCICR0, 0);
1680 udc_writel(udc, UDCICR1, 0);
1681
1682 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1683 clk_disable(udc->clk);
1684
1685 ep0_idle(udc);
1686 udc->gadget.speed = USB_SPEED_UNKNOWN;
1687
1688 udc->enabled = 0;
1689}
1690
1691
1692
1693
1694
1695
1696
1697
1698static __init void udc_init_data(struct pxa_udc *dev)
1699{
1700 int i;
1701 struct pxa_ep *ep;
1702
1703
1704 INIT_LIST_HEAD(&dev->gadget.ep_list);
1705 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1706 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1707 ep0_idle(dev);
1708
1709
1710 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1711 ep = &dev->pxa_ep[i];
1712
1713 ep->enabled = is_ep0(ep);
1714 INIT_LIST_HEAD(&ep->queue);
1715 spin_lock_init(&ep->lock);
1716 }
1717
1718
1719 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1720 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1721 &dev->gadget.ep_list);
1722}
1723
1724
1725
1726
1727
1728
1729
1730
1731static void udc_enable(struct pxa_udc *udc)
1732{
1733 if (udc->enabled)
1734 return;
1735
1736 udc_writel(udc, UDCICR0, 0);
1737 udc_writel(udc, UDCICR1, 0);
1738 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1739
1740 clk_enable(udc->clk);
1741
1742 ep0_idle(udc);
1743 udc->gadget.speed = USB_SPEED_FULL;
1744 memset(&udc->stats, 0, sizeof(udc->stats));
1745
1746 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1747 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1748 udelay(2);
1749 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1750 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1751
1752
1753
1754
1755 msleep(100);
1756
1757
1758 udc_writel(udc, UDCICR1,
1759 UDCICR1_IECC | UDCICR1_IERU
1760 | UDCICR1_IESU | UDCICR1_IERS);
1761
1762
1763 pio_irq_enable(&udc->pxa_ep[0]);
1764
1765 udc->enabled = 1;
1766}
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1783{
1784 struct pxa_udc *udc = the_controller;
1785 int retval;
1786
1787 if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind
1788 || !driver->disconnect || !driver->setup)
1789 return -EINVAL;
1790 if (!udc)
1791 return -ENODEV;
1792 if (udc->driver)
1793 return -EBUSY;
1794
1795
1796 udc->driver = driver;
1797 udc->gadget.dev.driver = &driver->driver;
1798 dplus_pullup(udc, 1);
1799
1800 retval = device_add(&udc->gadget.dev);
1801 if (retval) {
1802 dev_err(udc->dev, "device_add error %d\n", retval);
1803 goto add_fail;
1804 }
1805 retval = driver->bind(&udc->gadget);
1806 if (retval) {
1807 dev_err(udc->dev, "bind to driver %s --> error %d\n",
1808 driver->driver.name, retval);
1809 goto bind_fail;
1810 }
1811 dev_dbg(udc->dev, "registered gadget driver '%s'\n",
1812 driver->driver.name);
1813
1814 if (udc->transceiver) {
1815 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1816 if (retval) {
1817 dev_err(udc->dev, "can't bind to transceiver\n");
1818 goto transceiver_fail;
1819 }
1820 }
1821
1822 if (should_enable_udc(udc))
1823 udc_enable(udc);
1824 return 0;
1825
1826transceiver_fail:
1827 if (driver->unbind)
1828 driver->unbind(&udc->gadget);
1829bind_fail:
1830 device_del(&udc->gadget.dev);
1831add_fail:
1832 udc->driver = NULL;
1833 udc->gadget.dev.driver = NULL;
1834 return retval;
1835}
1836EXPORT_SYMBOL(usb_gadget_register_driver);
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1848{
1849 int i;
1850
1851
1852 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1853 driver = NULL;
1854 udc->gadget.speed = USB_SPEED_UNKNOWN;
1855
1856 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1857 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1858
1859 if (driver)
1860 driver->disconnect(&udc->gadget);
1861}
1862
1863
1864
1865
1866
1867
1868
1869int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1870{
1871 struct pxa_udc *udc = the_controller;
1872
1873 if (!udc)
1874 return -ENODEV;
1875 if (!driver || driver != udc->driver || !driver->unbind)
1876 return -EINVAL;
1877
1878 stop_activity(udc, driver);
1879 udc_disable(udc);
1880 dplus_pullup(udc, 0);
1881
1882 driver->unbind(&udc->gadget);
1883 udc->driver = NULL;
1884
1885 device_del(&udc->gadget.dev);
1886 dev_info(udc->dev, "unregistered gadget driver '%s'\n",
1887 driver->driver.name);
1888
1889 if (udc->transceiver)
1890 return otg_set_peripheral(udc->transceiver, NULL);
1891 return 0;
1892}
1893EXPORT_SYMBOL(usb_gadget_unregister_driver);
1894
1895
1896
1897
1898
1899
1900static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1901 struct pxa27x_request *req)
1902{
1903 struct pxa_ep *ep = &udc->pxa_ep[0];
1904 union {
1905 struct usb_ctrlrequest r;
1906 u32 word[2];
1907 } u;
1908 int i;
1909 int have_extrabytes = 0;
1910
1911 nuke(ep, -EPROTO);
1912
1913
1914
1915
1916
1917
1918
1919 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1920 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1921
1922
1923 for (i = 0; i < 2; i++) {
1924 if (unlikely(ep_is_empty(ep)))
1925 goto stall;
1926 u.word[i] = udc_ep_readl(ep, UDCDR);
1927 }
1928
1929 have_extrabytes = !ep_is_empty(ep);
1930 while (!ep_is_empty(ep)) {
1931 i = udc_ep_readl(ep, UDCDR);
1932 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1933 }
1934
1935 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1936 u.r.bRequestType, u.r.bRequest,
1937 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1938 le16_to_cpu(u.r.wLength));
1939 if (unlikely(have_extrabytes))
1940 goto stall;
1941
1942 if (u.r.bRequestType & USB_DIR_IN)
1943 set_ep0state(udc, IN_DATA_STAGE);
1944 else
1945 set_ep0state(udc, OUT_DATA_STAGE);
1946
1947
1948 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1949
1950 i = udc->driver->setup(&udc->gadget, &u.r);
1951 if (i < 0)
1952 goto stall;
1953out:
1954 return;
1955stall:
1956 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1957 udc_ep_readl(ep, UDCCSR), i);
1958 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1959 set_ep0state(udc, STALL);
1960 goto out;
1961}
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2012{
2013 u32 udccsr0;
2014 struct pxa_ep *ep = &udc->pxa_ep[0];
2015 struct pxa27x_request *req = NULL;
2016 int completed = 0;
2017
2018 if (!list_empty(&ep->queue))
2019 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2020
2021 udccsr0 = udc_ep_readl(ep, UDCCSR);
2022 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2023 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2024 (fifo_irq << 1 | opc_irq));
2025
2026 if (udccsr0 & UDCCSR0_SST) {
2027 ep_dbg(ep, "clearing stall status\n");
2028 nuke(ep, -EPIPE);
2029 ep_write_UDCCSR(ep, UDCCSR0_SST);
2030 ep0_idle(udc);
2031 }
2032
2033 if (udccsr0 & UDCCSR0_SA) {
2034 nuke(ep, 0);
2035 set_ep0state(udc, SETUP_STAGE);
2036 }
2037
2038 switch (udc->ep0state) {
2039 case WAIT_FOR_SETUP:
2040
2041
2042
2043
2044
2045
2046 break;
2047 case SETUP_STAGE:
2048 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2049 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2050 handle_ep0_ctrl_req(udc, req);
2051 break;
2052 case IN_DATA_STAGE:
2053 if (epout_has_pkt(ep))
2054 ep_write_UDCCSR(ep, UDCCSR0_OPC);
2055 if (req && !ep_is_full(ep))
2056 completed = write_ep0_fifo(ep, req);
2057 if (completed)
2058 ep0_end_in_req(ep, req);
2059 break;
2060 case OUT_DATA_STAGE:
2061 if (epout_has_pkt(ep) && req)
2062 completed = read_ep0_fifo(ep, req);
2063 if (completed)
2064 ep0_end_out_req(ep, req);
2065 break;
2066 case STALL:
2067 ep_write_UDCCSR(ep, UDCCSR0_FST);
2068 break;
2069 case IN_STATUS_STAGE:
2070
2071
2072
2073
2074
2075 if (opc_irq)
2076 ep0_idle(udc);
2077 break;
2078 case OUT_STATUS_STAGE:
2079 case WAIT_ACK_SET_CONF_INTERF:
2080 ep_warn(ep, "should never get in %s state here!!!\n",
2081 EP0_STNAME(ep->dev));
2082 ep0_idle(udc);
2083 break;
2084 }
2085}
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096static void handle_ep(struct pxa_ep *ep)
2097{
2098 struct pxa27x_request *req;
2099 int completed;
2100 u32 udccsr;
2101 int is_in = ep->dir_in;
2102 int loop = 0;
2103
2104 do {
2105 completed = 0;
2106 udccsr = udc_ep_readl(ep, UDCCSR);
2107 if (likely(!list_empty(&ep->queue)))
2108 req = list_entry(ep->queue.next,
2109 struct pxa27x_request, queue);
2110 else
2111 req = NULL;
2112
2113 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2114 req, udccsr, loop++);
2115
2116 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2117 udc_ep_writel(ep, UDCCSR,
2118 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2119 if (!req)
2120 break;
2121
2122 if (unlikely(is_in)) {
2123 if (likely(!ep_is_full(ep)))
2124 completed = write_fifo(ep, req);
2125 if (completed)
2126 ep_end_in_req(ep, req);
2127 } else {
2128 if (likely(epout_has_pkt(ep)))
2129 completed = read_fifo(ep, req);
2130 if (completed)
2131 ep_end_out_req(ep, req);
2132 }
2133 } while (completed);
2134}
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2145{
2146 struct usb_ctrlrequest req ;
2147
2148 dev_dbg(udc->dev, "config=%d\n", config);
2149
2150 udc->config = config;
2151 udc->last_interface = 0;
2152 udc->last_alternate = 0;
2153
2154 req.bRequestType = 0;
2155 req.bRequest = USB_REQ_SET_CONFIGURATION;
2156 req.wValue = config;
2157 req.wIndex = 0;
2158 req.wLength = 0;
2159
2160 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2161 udc->driver->setup(&udc->gadget, &req);
2162 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2163}
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2175{
2176 struct usb_ctrlrequest req;
2177
2178 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2179
2180 udc->last_interface = iface;
2181 udc->last_alternate = alt;
2182
2183 req.bRequestType = USB_RECIP_INTERFACE;
2184 req.bRequest = USB_REQ_SET_INTERFACE;
2185 req.wValue = alt;
2186 req.wIndex = iface;
2187 req.wLength = 0;
2188
2189 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2190 udc->driver->setup(&udc->gadget, &req);
2191 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2192}
2193
2194
2195
2196
2197
2198
2199
2200
2201static void irq_handle_data(int irq, struct pxa_udc *udc)
2202{
2203 int i;
2204 struct pxa_ep *ep;
2205 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2206 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2207
2208 if (udcisr0 & UDCISR_INT_MASK) {
2209 udc->pxa_ep[0].stats.irqs++;
2210 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2211 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2212 !!(udcisr0 & UDCICR_PKTCOMPL));
2213 }
2214
2215 udcisr0 >>= 2;
2216 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2217 if (!(udcisr0 & UDCISR_INT_MASK))
2218 continue;
2219
2220 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2221 ep = &udc->pxa_ep[i];
2222 ep->stats.irqs++;
2223 handle_ep(ep);
2224 }
2225
2226 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2227 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2228 if (!(udcisr1 & UDCISR_INT_MASK))
2229 continue;
2230
2231 ep = &udc->pxa_ep[i];
2232 ep->stats.irqs++;
2233 handle_ep(ep);
2234 }
2235
2236}
2237
2238
2239
2240
2241
2242static void irq_udc_suspend(struct pxa_udc *udc)
2243{
2244 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2245 udc->stats.irqs_suspend++;
2246
2247 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2248 && udc->driver && udc->driver->suspend)
2249 udc->driver->suspend(&udc->gadget);
2250 ep0_idle(udc);
2251}
2252
2253
2254
2255
2256
2257static void irq_udc_resume(struct pxa_udc *udc)
2258{
2259 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2260 udc->stats.irqs_resume++;
2261
2262 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2263 && udc->driver && udc->driver->resume)
2264 udc->driver->resume(&udc->gadget);
2265}
2266
2267
2268
2269
2270
2271static void irq_udc_reconfig(struct pxa_udc *udc)
2272{
2273 unsigned config, interface, alternate, config_change;
2274 u32 udccr = udc_readl(udc, UDCCR);
2275
2276 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2277 udc->stats.irqs_reconfig++;
2278
2279 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2280 config_change = (config != udc->config);
2281 pxa27x_change_configuration(udc, config);
2282
2283 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2284 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2285 pxa27x_change_interface(udc, interface, alternate);
2286
2287 if (config_change)
2288 update_pxa_ep_matches(udc);
2289 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2290}
2291
2292
2293
2294
2295
2296static void irq_udc_reset(struct pxa_udc *udc)
2297{
2298 u32 udccr = udc_readl(udc, UDCCR);
2299 struct pxa_ep *ep = &udc->pxa_ep[0];
2300
2301 dev_info(udc->dev, "USB reset\n");
2302 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2303 udc->stats.irqs_reset++;
2304
2305 if ((udccr & UDCCR_UDA) == 0) {
2306 dev_dbg(udc->dev, "USB reset start\n");
2307 stop_activity(udc, udc->driver);
2308 }
2309 udc->gadget.speed = USB_SPEED_FULL;
2310 memset(&udc->stats, 0, sizeof udc->stats);
2311
2312 nuke(ep, -EPROTO);
2313 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2314 ep0_idle(udc);
2315}
2316
2317
2318
2319
2320
2321
2322
2323
2324static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2325{
2326 struct pxa_udc *udc = _dev;
2327 u32 udcisr0 = udc_readl(udc, UDCISR0);
2328 u32 udcisr1 = udc_readl(udc, UDCISR1);
2329 u32 udccr = udc_readl(udc, UDCCR);
2330 u32 udcisr1_spec;
2331
2332 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2333 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2334
2335 udcisr1_spec = udcisr1 & 0xf8000000;
2336 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2337 irq_udc_suspend(udc);
2338 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2339 irq_udc_resume(udc);
2340 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2341 irq_udc_reconfig(udc);
2342 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2343 irq_udc_reset(udc);
2344
2345 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2346 irq_handle_data(irq, udc);
2347
2348 return IRQ_HANDLED;
2349}
2350
2351static struct pxa_udc memory = {
2352 .gadget = {
2353 .ops = &pxa_udc_ops,
2354 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2355 .name = driver_name,
2356 .dev = {
2357 .init_name = "gadget",
2358 },
2359 },
2360
2361 .udc_usb_ep = {
2362 USB_EP_CTRL,
2363 USB_EP_OUT_BULK(1),
2364 USB_EP_IN_BULK(2),
2365 USB_EP_IN_ISO(3),
2366 USB_EP_OUT_ISO(4),
2367 USB_EP_IN_INT(5),
2368 },
2369
2370 .pxa_ep = {
2371 PXA_EP_CTRL,
2372
2373 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2374 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2375
2376 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2377 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2378 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2379 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2380 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2381
2382 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2383 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2384 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2385
2386
2387
2388
2389
2390 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2391 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2392
2393 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2394 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2395 }
2396};
2397
2398
2399
2400
2401
2402
2403
2404
2405static int __init pxa_udc_probe(struct platform_device *pdev)
2406{
2407 struct resource *regs;
2408 struct pxa_udc *udc = &memory;
2409 int retval = 0, gpio;
2410
2411 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2412 if (!regs)
2413 return -ENXIO;
2414 udc->irq = platform_get_irq(pdev, 0);
2415 if (udc->irq < 0)
2416 return udc->irq;
2417
2418 udc->dev = &pdev->dev;
2419 udc->mach = pdev->dev.platform_data;
2420 udc->transceiver = otg_get_transceiver();
2421
2422 gpio = udc->mach->gpio_pullup;
2423 if (gpio_is_valid(gpio)) {
2424 retval = gpio_request(gpio, "USB D+ pullup");
2425 if (retval == 0)
2426 gpio_direction_output(gpio,
2427 udc->mach->gpio_pullup_inverted);
2428 }
2429 if (retval) {
2430 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2431 gpio, retval);
2432 return retval;
2433 }
2434
2435 udc->clk = clk_get(&pdev->dev, NULL);
2436 if (IS_ERR(udc->clk)) {
2437 retval = PTR_ERR(udc->clk);
2438 goto err_clk;
2439 }
2440
2441 retval = -ENOMEM;
2442 udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
2443 if (!udc->regs) {
2444 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2445 goto err_map;
2446 }
2447
2448 device_initialize(&udc->gadget.dev);
2449 udc->gadget.dev.parent = &pdev->dev;
2450 udc->gadget.dev.dma_mask = NULL;
2451 udc->vbus_sensed = 0;
2452
2453 the_controller = udc;
2454 platform_set_drvdata(pdev, udc);
2455 udc_init_data(udc);
2456 pxa_eps_setup(udc);
2457
2458
2459 retval = request_irq(udc->irq, pxa_udc_irq,
2460 IRQF_SHARED, driver_name, udc);
2461 if (retval != 0) {
2462 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2463 driver_name, IRQ_USB, retval);
2464 goto err_irq;
2465 }
2466
2467 pxa_init_debugfs(udc);
2468 return 0;
2469err_irq:
2470 iounmap(udc->regs);
2471err_map:
2472 clk_put(udc->clk);
2473 udc->clk = NULL;
2474err_clk:
2475 return retval;
2476}
2477
2478
2479
2480
2481
2482static int __exit pxa_udc_remove(struct platform_device *_dev)
2483{
2484 struct pxa_udc *udc = platform_get_drvdata(_dev);
2485 int gpio = udc->mach->gpio_pullup;
2486
2487 usb_gadget_unregister_driver(udc->driver);
2488 free_irq(udc->irq, udc);
2489 pxa_cleanup_debugfs(udc);
2490 if (gpio_is_valid(gpio))
2491 gpio_free(gpio);
2492
2493 otg_put_transceiver(udc->transceiver);
2494
2495 udc->transceiver = NULL;
2496 platform_set_drvdata(_dev, NULL);
2497 the_controller = NULL;
2498 clk_put(udc->clk);
2499 iounmap(udc->regs);
2500
2501 return 0;
2502}
2503
2504static void pxa_udc_shutdown(struct platform_device *_dev)
2505{
2506 struct pxa_udc *udc = platform_get_drvdata(_dev);
2507
2508 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2509 udc_disable(udc);
2510}
2511
2512#ifdef CONFIG_CPU_PXA27x
2513extern void pxa27x_clear_otgph(void);
2514#else
2515#define pxa27x_clear_otgph() do {} while (0)
2516#endif
2517
2518#ifdef CONFIG_PM
2519
2520
2521
2522
2523
2524
2525
2526
2527static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2528{
2529 int i;
2530 struct pxa_udc *udc = platform_get_drvdata(_dev);
2531 struct pxa_ep *ep;
2532
2533 ep = &udc->pxa_ep[0];
2534 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2535 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2536 ep = &udc->pxa_ep[i];
2537 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2538 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2539 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2540 ep->udccsr_value, ep->udccr_value);
2541 }
2542
2543 udc_disable(udc);
2544 udc->pullup_resume = udc->pullup_on;
2545 dplus_pullup(udc, 0);
2546
2547 return 0;
2548}
2549
2550
2551
2552
2553
2554
2555
2556
2557static int pxa_udc_resume(struct platform_device *_dev)
2558{
2559 int i;
2560 struct pxa_udc *udc = platform_get_drvdata(_dev);
2561 struct pxa_ep *ep;
2562
2563 ep = &udc->pxa_ep[0];
2564 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2565 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2566 ep = &udc->pxa_ep[i];
2567 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2568 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2569 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2570 ep->udccsr_value, ep->udccr_value);
2571 }
2572
2573 dplus_pullup(udc, udc->pullup_resume);
2574 if (should_enable_udc(udc))
2575 udc_enable(udc);
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585 pxa27x_clear_otgph();
2586
2587 return 0;
2588}
2589#endif
2590
2591
2592MODULE_ALIAS("platform:pxa27x-udc");
2593
2594static struct platform_driver udc_driver = {
2595 .driver = {
2596 .name = "pxa27x-udc",
2597 .owner = THIS_MODULE,
2598 },
2599 .remove = __exit_p(pxa_udc_remove),
2600 .shutdown = pxa_udc_shutdown,
2601#ifdef CONFIG_PM
2602 .suspend = pxa_udc_suspend,
2603 .resume = pxa_udc_resume
2604#endif
2605};
2606
2607static int __init udc_init(void)
2608{
2609 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2610 return -ENODEV;
2611
2612 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2613 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2614}
2615module_init(udc_init);
2616
2617
2618static void __exit udc_exit(void)
2619{
2620 platform_driver_unregister(&udc_driver);
2621}
2622module_exit(udc_exit);
2623
2624MODULE_DESCRIPTION(DRIVER_DESC);
2625MODULE_AUTHOR("Robert Jarzmik");
2626MODULE_LICENSE("GPL");
2627