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23#include <linux/device.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/version.h>
27#include <linux/errno.h>
28#include <linux/string.h>
29#include <linux/mm.h>
30#include <linux/fb.h>
31#include <linux/init.h>
32#include <linux/dma-mapping.h>
33#include <linux/of_device.h>
34#include <linux/of_platform.h>
35#include <linux/io.h>
36#include <linux/xilinxfb.h>
37#include <asm/dcr.h>
38
39#define DRIVER_NAME "xilinxfb"
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59#define NUM_REGS 2
60#define REG_FB_ADDR 0
61#define REG_CTRL 1
62#define REG_CTRL_ENABLE 0x0001
63#define REG_CTRL_ROTATE 0x0002
64
65
66
67
68
69
70
71
72
73
74#define BYTES_PER_PIXEL 4
75#define BITS_PER_PIXEL (BYTES_PER_PIXEL * 8)
76
77#define RED_SHIFT 16
78#define GREEN_SHIFT 8
79#define BLUE_SHIFT 0
80
81#define PALETTE_ENTRIES_NO 16
82
83
84
85
86static struct xilinxfb_platform_data xilinx_fb_default_pdata = {
87 .xres = 640,
88 .yres = 480,
89 .xvirt = 1024,
90 .yvirt = 480,
91};
92
93
94
95
96static struct fb_fix_screeninfo xilinx_fb_fix = {
97 .id = "Xilinx",
98 .type = FB_TYPE_PACKED_PIXELS,
99 .visual = FB_VISUAL_TRUECOLOR,
100 .accel = FB_ACCEL_NONE
101};
102
103static struct fb_var_screeninfo xilinx_fb_var = {
104 .bits_per_pixel = BITS_PER_PIXEL,
105
106 .red = { RED_SHIFT, 8, 0 },
107 .green = { GREEN_SHIFT, 8, 0 },
108 .blue = { BLUE_SHIFT, 8, 0 },
109 .transp = { 0, 0, 0 },
110
111 .activate = FB_ACTIVATE_NOW
112};
113
114
115#define PLB_ACCESS_FLAG 0x1
116
117struct xilinxfb_drvdata {
118
119 struct fb_info info;
120
121 phys_addr_t regs_phys;
122
123 void __iomem *regs;
124
125
126 dcr_host_t dcr_host;
127 unsigned int dcr_len;
128
129 void *fb_virt;
130 dma_addr_t fb_phys;
131 int fb_alloced;
132
133 u8 flags;
134
135 u32 reg_ctrl_default;
136
137 u32 pseudo_palette[PALETTE_ENTRIES_NO];
138
139};
140
141#define to_xilinxfb_drvdata(_info) \
142 container_of(_info, struct xilinxfb_drvdata, info)
143
144
145
146
147
148
149static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
150 u32 val)
151{
152 if (drvdata->flags & PLB_ACCESS_FLAG)
153 out_be32(drvdata->regs + (offset << 2), val);
154 else
155 dcr_write(drvdata->dcr_host, offset, val);
156
157}
158
159static int
160xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
161 unsigned transp, struct fb_info *fbi)
162{
163 u32 *palette = fbi->pseudo_palette;
164
165 if (regno >= PALETTE_ENTRIES_NO)
166 return -EINVAL;
167
168 if (fbi->var.grayscale) {
169
170
171 red = green = blue =
172 (red * 77 + green * 151 + blue * 28 + 127) >> 8;
173 }
174
175
176
177
178 red >>= 8;
179 green >>= 8;
180 blue >>= 8;
181 palette[regno] = (red << RED_SHIFT) | (green << GREEN_SHIFT) |
182 (blue << BLUE_SHIFT);
183
184 return 0;
185}
186
187static int
188xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
189{
190 struct xilinxfb_drvdata *drvdata = to_xilinxfb_drvdata(fbi);
191
192 switch (blank_mode) {
193 case FB_BLANK_UNBLANK:
194
195 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
196 break;
197
198 case FB_BLANK_NORMAL:
199 case FB_BLANK_VSYNC_SUSPEND:
200 case FB_BLANK_HSYNC_SUSPEND:
201 case FB_BLANK_POWERDOWN:
202
203 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
204 default:
205 break;
206
207 }
208 return 0;
209}
210
211static struct fb_ops xilinxfb_ops =
212{
213 .owner = THIS_MODULE,
214 .fb_setcolreg = xilinx_fb_setcolreg,
215 .fb_blank = xilinx_fb_blank,
216 .fb_fillrect = cfb_fillrect,
217 .fb_copyarea = cfb_copyarea,
218 .fb_imageblit = cfb_imageblit,
219};
220
221
222
223
224
225static int xilinxfb_assign(struct device *dev,
226 struct xilinxfb_drvdata *drvdata,
227 unsigned long physaddr,
228 struct xilinxfb_platform_data *pdata)
229{
230 int rc;
231 int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
232
233 if (drvdata->flags & PLB_ACCESS_FLAG) {
234
235
236
237
238 if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
239 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
240 physaddr);
241 rc = -ENODEV;
242 goto err_region;
243 }
244
245 drvdata->regs_phys = physaddr;
246 drvdata->regs = ioremap(physaddr, 8);
247 if (!drvdata->regs) {
248 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
249 physaddr);
250 rc = -ENODEV;
251 goto err_map;
252 }
253 }
254
255
256 if (pdata->fb_phys) {
257 drvdata->fb_phys = pdata->fb_phys;
258 drvdata->fb_virt = ioremap(pdata->fb_phys, fbsize);
259 } else {
260 drvdata->fb_alloced = 1;
261 drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(fbsize),
262 &drvdata->fb_phys, GFP_KERNEL);
263 }
264
265 if (!drvdata->fb_virt) {
266 dev_err(dev, "Could not allocate frame buffer memory\n");
267 rc = -ENOMEM;
268 if (drvdata->flags & PLB_ACCESS_FLAG)
269 goto err_fbmem;
270 else
271 goto err_region;
272 }
273
274
275 memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
276
277
278 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
279
280
281 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
282 if (pdata->rotate_screen)
283 drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
284 xilinx_fb_out_be32(drvdata, REG_CTRL,
285 drvdata->reg_ctrl_default);
286
287
288 drvdata->info.device = dev;
289 drvdata->info.screen_base = (void __iomem *)drvdata->fb_virt;
290 drvdata->info.fbops = &xilinxfb_ops;
291 drvdata->info.fix = xilinx_fb_fix;
292 drvdata->info.fix.smem_start = drvdata->fb_phys;
293 drvdata->info.fix.smem_len = fbsize;
294 drvdata->info.fix.line_length = pdata->xvirt * BYTES_PER_PIXEL;
295
296 drvdata->info.pseudo_palette = drvdata->pseudo_palette;
297 drvdata->info.flags = FBINFO_DEFAULT;
298 drvdata->info.var = xilinx_fb_var;
299 drvdata->info.var.height = pdata->screen_height_mm;
300 drvdata->info.var.width = pdata->screen_width_mm;
301 drvdata->info.var.xres = pdata->xres;
302 drvdata->info.var.yres = pdata->yres;
303 drvdata->info.var.xres_virtual = pdata->xvirt;
304 drvdata->info.var.yres_virtual = pdata->yvirt;
305
306
307 rc = fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0);
308 if (rc) {
309 dev_err(dev, "Fail to allocate colormap (%d entries)\n",
310 PALETTE_ENTRIES_NO);
311 goto err_cmap;
312 }
313
314
315 rc = register_framebuffer(&drvdata->info);
316 if (rc) {
317 dev_err(dev, "Could not register frame buffer\n");
318 goto err_regfb;
319 }
320
321 if (drvdata->flags & PLB_ACCESS_FLAG) {
322
323 dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
324 drvdata->regs);
325 }
326
327 dev_dbg(dev, "fb: phys=%llx, virt=%p, size=%x\n",
328 (unsigned long long)drvdata->fb_phys, drvdata->fb_virt, fbsize);
329
330 return 0;
331
332err_regfb:
333 fb_dealloc_cmap(&drvdata->info.cmap);
334
335err_cmap:
336 if (drvdata->fb_alloced)
337 dma_free_coherent(dev, PAGE_ALIGN(fbsize), drvdata->fb_virt,
338 drvdata->fb_phys);
339 else
340 iounmap(drvdata->fb_virt);
341
342
343 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
344
345err_fbmem:
346 if (drvdata->flags & PLB_ACCESS_FLAG)
347 iounmap(drvdata->regs);
348
349err_map:
350 if (drvdata->flags & PLB_ACCESS_FLAG)
351 release_mem_region(physaddr, 8);
352
353err_region:
354 kfree(drvdata);
355 dev_set_drvdata(dev, NULL);
356
357 return rc;
358}
359
360static int xilinxfb_release(struct device *dev)
361{
362 struct xilinxfb_drvdata *drvdata = dev_get_drvdata(dev);
363
364#if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
365 xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
366#endif
367
368 unregister_framebuffer(&drvdata->info);
369
370 fb_dealloc_cmap(&drvdata->info.cmap);
371
372 if (drvdata->fb_alloced)
373 dma_free_coherent(dev, PAGE_ALIGN(drvdata->info.fix.smem_len),
374 drvdata->fb_virt, drvdata->fb_phys);
375 else
376 iounmap(drvdata->fb_virt);
377
378
379 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
380
381
382 if (drvdata->flags & PLB_ACCESS_FLAG) {
383 iounmap(drvdata->regs);
384 release_mem_region(drvdata->regs_phys, 8);
385 } else
386 dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
387
388 kfree(drvdata);
389 dev_set_drvdata(dev, NULL);
390
391 return 0;
392}
393
394
395
396
397
398static int __devinit
399xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
400{
401 const u32 *prop;
402 u32 *p;
403 u32 tft_access;
404 struct xilinxfb_platform_data pdata;
405 struct resource res;
406 int size, rc, start;
407 struct xilinxfb_drvdata *drvdata;
408
409
410 pdata = xilinx_fb_default_pdata;
411
412 dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match);
413
414
415 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
416 if (!drvdata) {
417 dev_err(&op->dev, "Couldn't allocate device private record\n");
418 return -ENOMEM;
419 }
420
421
422
423
424
425 p = (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave-if", NULL);
426 tft_access = p ? *p : 0;
427
428
429
430
431
432 if (tft_access) {
433 drvdata->flags |= PLB_ACCESS_FLAG;
434 rc = of_address_to_resource(op->node, 0, &res);
435 if (rc) {
436 dev_err(&op->dev, "invalid address\n");
437 goto err;
438 }
439 } else {
440 res.start = 0;
441 start = dcr_resource_start(op->node, 0);
442 drvdata->dcr_len = dcr_resource_len(op->node, 0);
443 drvdata->dcr_host = dcr_map(op->node, start, drvdata->dcr_len);
444 if (!DCR_MAP_OK(drvdata->dcr_host)) {
445 dev_err(&op->dev, "invalid DCR address\n");
446 goto err;
447 }
448 }
449
450 prop = of_get_property(op->node, "phys-size", &size);
451 if ((prop) && (size >= sizeof(u32)*2)) {
452 pdata.screen_width_mm = prop[0];
453 pdata.screen_height_mm = prop[1];
454 }
455
456 prop = of_get_property(op->node, "resolution", &size);
457 if ((prop) && (size >= sizeof(u32)*2)) {
458 pdata.xres = prop[0];
459 pdata.yres = prop[1];
460 }
461
462 prop = of_get_property(op->node, "virtual-resolution", &size);
463 if ((prop) && (size >= sizeof(u32)*2)) {
464 pdata.xvirt = prop[0];
465 pdata.yvirt = prop[1];
466 }
467
468 if (of_find_property(op->node, "rotate-display", NULL))
469 pdata.rotate_screen = 1;
470
471 dev_set_drvdata(&op->dev, drvdata);
472 return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
473
474 err:
475 kfree(drvdata);
476 return -ENODEV;
477}
478
479static int __devexit xilinxfb_of_remove(struct of_device *op)
480{
481 return xilinxfb_release(&op->dev);
482}
483
484
485static struct of_device_id xilinxfb_of_match[] __devinitdata = {
486 { .compatible = "xlnx,xps-tft-1.00.a", },
487 { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", },
488 { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", },
489 {},
490};
491MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
492
493static struct of_platform_driver xilinxfb_of_driver = {
494 .owner = THIS_MODULE,
495 .name = DRIVER_NAME,
496 .match_table = xilinxfb_of_match,
497 .probe = xilinxfb_of_probe,
498 .remove = __devexit_p(xilinxfb_of_remove),
499 .driver = {
500 .name = DRIVER_NAME,
501 },
502};
503
504
505
506
507
508
509static int __init
510xilinxfb_init(void)
511{
512 return of_register_platform_driver(&xilinxfb_of_driver);
513}
514
515static void __exit
516xilinxfb_cleanup(void)
517{
518 of_unregister_platform_driver(&xilinxfb_of_driver);
519}
520
521module_init(xilinxfb_init);
522module_exit(xilinxfb_cleanup);
523
524MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
525MODULE_DESCRIPTION("Xilinx TFT frame buffer driver");
526MODULE_LICENSE("GPL");
527