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26#ifndef __SAVAGE_DRM_H__
27#define __SAVAGE_DRM_H__
28
29#ifndef __SAVAGE_SAREA_DEFINES__
30#define __SAVAGE_SAREA_DEFINES__
31
32
33
34
35
36
37
38
39#define SAVAGE_CARD_HEAP 0
40#define SAVAGE_AGP_HEAP 1
41#define SAVAGE_NR_TEX_HEAPS 2
42#define SAVAGE_NR_TEX_REGIONS 16
43#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
44
45#endif
46
47typedef struct _drm_savage_sarea {
48
49
50 struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
51 1];
52 unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
53
54
55
56 int ctxOwner;
57} drm_savage_sarea_t, *drm_savage_sarea_ptr;
58
59
60
61#define DRM_SAVAGE_BCI_INIT 0x00
62#define DRM_SAVAGE_BCI_CMDBUF 0x01
63#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
64#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
65
66#define DRM_IOCTL_SAVAGE_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
67#define DRM_IOCTL_SAVAGE_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
68#define DRM_IOCTL_SAVAGE_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
69#define DRM_IOCTL_SAVAGE_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
70
71#define SAVAGE_DMA_PCI 1
72#define SAVAGE_DMA_AGP 3
73typedef struct drm_savage_init {
74 enum {
75 SAVAGE_INIT_BCI = 1,
76 SAVAGE_CLEANUP_BCI = 2
77 } func;
78 unsigned int sarea_priv_offset;
79
80
81 unsigned int cob_size;
82 unsigned int bci_threshold_lo, bci_threshold_hi;
83 unsigned int dma_type;
84
85
86 unsigned int fb_bpp;
87 unsigned int front_offset, front_pitch;
88 unsigned int back_offset, back_pitch;
89 unsigned int depth_bpp;
90 unsigned int depth_offset, depth_pitch;
91
92
93 unsigned int texture_offset;
94 unsigned int texture_size;
95
96
97 unsigned long status_offset;
98 unsigned long buffers_offset;
99 unsigned long agp_textures_offset;
100 unsigned long cmd_dma_offset;
101} drm_savage_init_t;
102
103typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
104typedef struct drm_savage_cmdbuf {
105
106 drm_savage_cmd_header_t __user *cmd_addr;
107 unsigned int size;
108
109 unsigned int dma_idx;
110 int discard;
111
112 unsigned int __user *vb_addr;
113 unsigned int vb_size;
114 unsigned int vb_stride;
115
116 struct drm_clip_rect __user *box_addr;
117 unsigned int nbox;
118} drm_savage_cmdbuf_t;
119
120#define SAVAGE_WAIT_2D 0x1
121#define SAVAGE_WAIT_3D 0x2
122#define SAVAGE_WAIT_IRQ 0x4
123typedef struct drm_savage_event {
124 unsigned int count;
125 unsigned int flags;
126} drm_savage_event_emit_t, drm_savage_event_wait_t;
127
128
129
130#define SAVAGE_CMD_STATE 0
131#define SAVAGE_CMD_DMA_PRIM 1
132#define SAVAGE_CMD_VB_PRIM 2
133#define SAVAGE_CMD_DMA_IDX 3
134#define SAVAGE_CMD_VB_IDX 4
135#define SAVAGE_CMD_CLEAR 5
136#define SAVAGE_CMD_SWAP 6
137
138
139
140#define SAVAGE_PRIM_TRILIST 0
141#define SAVAGE_PRIM_TRISTRIP 1
142#define SAVAGE_PRIM_TRIFAN 2
143#define SAVAGE_PRIM_TRILIST_201 3
144
145
146
147
148#define SAVAGE_SKIP_Z 0x01
149#define SAVAGE_SKIP_W 0x02
150#define SAVAGE_SKIP_C0 0x04
151#define SAVAGE_SKIP_C1 0x08
152#define SAVAGE_SKIP_S0 0x10
153#define SAVAGE_SKIP_T0 0x20
154#define SAVAGE_SKIP_ST0 0x30
155#define SAVAGE_SKIP_S1 0x40
156#define SAVAGE_SKIP_T1 0x80
157#define SAVAGE_SKIP_ST1 0xc0
158#define SAVAGE_SKIP_ALL_S3D 0x3f
159#define SAVAGE_SKIP_ALL_S4 0xff
160
161
162
163#define SAVAGE_FRONT 0x1
164#define SAVAGE_BACK 0x2
165#define SAVAGE_DEPTH 0x4
166
167
168
169union drm_savage_cmd_header {
170 struct {
171 unsigned char cmd;
172 unsigned char pad0;
173 unsigned short pad1;
174 unsigned short pad2;
175 unsigned short pad3;
176 } cmd;
177 struct {
178 unsigned char cmd;
179 unsigned char global;
180 unsigned short count;
181 unsigned short start;
182 unsigned short pad3;
183 } state;
184 struct {
185 unsigned char cmd;
186 unsigned char prim;
187 unsigned short skip;
188 unsigned short count;
189 unsigned short start;
190 } prim;
191 struct {
192 unsigned char cmd;
193 unsigned char prim;
194 unsigned short skip;
195 unsigned short count;
196 unsigned short pad3;
197 } idx;
198 struct {
199 unsigned char cmd;
200 unsigned char pad0;
201 unsigned short pad1;
202 unsigned int flags;
203 } clear0;
204 struct {
205 unsigned int mask;
206 unsigned int value;
207 } clear1;
208};
209
210#endif
211