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29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <asm/byteorder.h>
36
37
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42
43 ATA_MAX_DEVICES = 2,
44 ATA_MAX_PRD = 256,
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_LBA48 = 65535,
49 ATA_MAX_SECTORS_TAPE = 65535,
50
51 ATA_ID_WORDS = 256,
52 ATA_ID_CONFIG = 0,
53 ATA_ID_CYLS = 1,
54 ATA_ID_HEADS = 3,
55 ATA_ID_SECTORS = 6,
56 ATA_ID_SERNO = 10,
57 ATA_ID_BUF_SIZE = 21,
58 ATA_ID_FW_REV = 23,
59 ATA_ID_PROD = 27,
60 ATA_ID_MAX_MULTSECT = 47,
61 ATA_ID_DWORD_IO = 48,
62 ATA_ID_CAPABILITY = 49,
63 ATA_ID_OLD_PIO_MODES = 51,
64 ATA_ID_OLD_DMA_MODES = 52,
65 ATA_ID_FIELD_VALID = 53,
66 ATA_ID_CUR_CYLS = 54,
67 ATA_ID_CUR_HEADS = 55,
68 ATA_ID_CUR_SECTORS = 56,
69 ATA_ID_MULTSECT = 59,
70 ATA_ID_LBA_CAPACITY = 60,
71 ATA_ID_SWDMA_MODES = 62,
72 ATA_ID_MWDMA_MODES = 63,
73 ATA_ID_PIO_MODES = 64,
74 ATA_ID_EIDE_DMA_MIN = 65,
75 ATA_ID_EIDE_DMA_TIME = 66,
76 ATA_ID_EIDE_PIO = 67,
77 ATA_ID_EIDE_PIO_IORDY = 68,
78 ATA_ID_QUEUE_DEPTH = 75,
79 ATA_ID_MAJOR_VER = 80,
80 ATA_ID_COMMAND_SET_1 = 82,
81 ATA_ID_COMMAND_SET_2 = 83,
82 ATA_ID_CFSSE = 84,
83 ATA_ID_CFS_ENABLE_1 = 85,
84 ATA_ID_CFS_ENABLE_2 = 86,
85 ATA_ID_CSF_DEFAULT = 87,
86 ATA_ID_UDMA_MODES = 88,
87 ATA_ID_HW_CONFIG = 93,
88 ATA_ID_SPG = 98,
89 ATA_ID_LBA_CAPACITY_2 = 100,
90 ATA_ID_LAST_LUN = 126,
91 ATA_ID_DLF = 128,
92 ATA_ID_CSFO = 129,
93 ATA_ID_CFA_POWER = 160,
94 ATA_ID_CFA_KEY_MGMT = 162,
95 ATA_ID_CFA_MODES = 163,
96 ATA_ID_DATA_SET_MGMT = 169,
97 ATA_ID_ROT_SPEED = 217,
98 ATA_ID_PIO4 = (1 << 1),
99
100 ATA_ID_SERNO_LEN = 20,
101 ATA_ID_FW_REV_LEN = 8,
102 ATA_ID_PROD_LEN = 40,
103
104 ATA_PCI_CTL_OFS = 2,
105
106 ATA_PIO0 = (1 << 0),
107 ATA_PIO1 = ATA_PIO0 | (1 << 1),
108 ATA_PIO2 = ATA_PIO1 | (1 << 2),
109 ATA_PIO3 = ATA_PIO2 | (1 << 3),
110 ATA_PIO4 = ATA_PIO3 | (1 << 4),
111 ATA_PIO5 = ATA_PIO4 | (1 << 5),
112 ATA_PIO6 = ATA_PIO5 | (1 << 6),
113
114 ATA_PIO4_ONLY = (1 << 4),
115
116 ATA_SWDMA0 = (1 << 0),
117 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
118 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
119
120 ATA_SWDMA2_ONLY = (1 << 2),
121
122 ATA_MWDMA0 = (1 << 0),
123 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
124 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
125 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
126 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
127
128 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
129 ATA_MWDMA2_ONLY = (1 << 2),
130
131 ATA_UDMA0 = (1 << 0),
132 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
133 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
134 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
135 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
136 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
137 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
138 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
139
140
141 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
142
143 ATA_UDMA_MASK_40C = ATA_UDMA2,
144
145
146 ATA_PRD_SZ = 8,
147 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
148 ATA_PRD_EOT = (1 << 31),
149
150 ATA_DMA_TABLE_OFS = 4,
151 ATA_DMA_STATUS = 2,
152 ATA_DMA_CMD = 0,
153 ATA_DMA_WR = (1 << 3),
154 ATA_DMA_START = (1 << 0),
155 ATA_DMA_INTR = (1 << 2),
156 ATA_DMA_ERR = (1 << 1),
157 ATA_DMA_ACTIVE = (1 << 0),
158
159
160 ATA_HOB = (1 << 7),
161 ATA_NIEN = (1 << 1),
162 ATA_LBA = (1 << 6),
163 ATA_DEV1 = (1 << 4),
164 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
165 ATA_DEVCTL_OBS = (1 << 3),
166 ATA_BUSY = (1 << 7),
167 ATA_DRDY = (1 << 6),
168 ATA_DF = (1 << 5),
169 ATA_DSC = (1 << 4),
170 ATA_DRQ = (1 << 3),
171 ATA_CORR = (1 << 2),
172 ATA_IDX = (1 << 1),
173 ATA_ERR = (1 << 0),
174 ATA_SRST = (1 << 2),
175 ATA_ICRC = (1 << 7),
176 ATA_BBK = ATA_ICRC,
177 ATA_UNC = (1 << 6),
178 ATA_MC = (1 << 5),
179 ATA_IDNF = (1 << 4),
180 ATA_MCR = (1 << 3),
181 ATA_ABORTED = (1 << 2),
182 ATA_TRK0NF = (1 << 1),
183 ATA_AMNF = (1 << 0),
184 ATAPI_LFS = 0xF0,
185 ATAPI_EOM = ATA_TRK0NF,
186 ATAPI_ILI = ATA_AMNF,
187 ATAPI_IO = (1 << 1),
188 ATAPI_COD = (1 << 0),
189
190
191 ATA_REG_DATA = 0x00,
192 ATA_REG_ERR = 0x01,
193 ATA_REG_NSECT = 0x02,
194 ATA_REG_LBAL = 0x03,
195 ATA_REG_LBAM = 0x04,
196 ATA_REG_LBAH = 0x05,
197 ATA_REG_DEVICE = 0x06,
198 ATA_REG_STATUS = 0x07,
199
200 ATA_REG_FEATURE = ATA_REG_ERR,
201 ATA_REG_CMD = ATA_REG_STATUS,
202 ATA_REG_BYTEL = ATA_REG_LBAM,
203 ATA_REG_BYTEH = ATA_REG_LBAH,
204 ATA_REG_DEVSEL = ATA_REG_DEVICE,
205 ATA_REG_IRQ = ATA_REG_NSECT,
206
207
208 ATA_CMD_DEV_RESET = 0x08,
209 ATA_CMD_CHK_POWER = 0xE5,
210 ATA_CMD_STANDBY = 0xE2,
211 ATA_CMD_IDLE = 0xE3,
212 ATA_CMD_EDD = 0x90,
213 ATA_CMD_DOWNLOAD_MICRO = 0x92,
214 ATA_CMD_NOP = 0x00,
215 ATA_CMD_FLUSH = 0xE7,
216 ATA_CMD_FLUSH_EXT = 0xEA,
217 ATA_CMD_ID_ATA = 0xEC,
218 ATA_CMD_ID_ATAPI = 0xA1,
219 ATA_CMD_SERVICE = 0xA2,
220 ATA_CMD_READ = 0xC8,
221 ATA_CMD_READ_EXT = 0x25,
222 ATA_CMD_READ_QUEUED = 0x26,
223 ATA_CMD_READ_STREAM_EXT = 0x2B,
224 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
225 ATA_CMD_WRITE = 0xCA,
226 ATA_CMD_WRITE_EXT = 0x35,
227 ATA_CMD_WRITE_QUEUED = 0x36,
228 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
229 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
230 ATA_CMD_WRITE_FUA_EXT = 0x3D,
231 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
232 ATA_CMD_FPDMA_READ = 0x60,
233 ATA_CMD_FPDMA_WRITE = 0x61,
234 ATA_CMD_PIO_READ = 0x20,
235 ATA_CMD_PIO_READ_EXT = 0x24,
236 ATA_CMD_PIO_WRITE = 0x30,
237 ATA_CMD_PIO_WRITE_EXT = 0x34,
238 ATA_CMD_READ_MULTI = 0xC4,
239 ATA_CMD_READ_MULTI_EXT = 0x29,
240 ATA_CMD_WRITE_MULTI = 0xC5,
241 ATA_CMD_WRITE_MULTI_EXT = 0x39,
242 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
243 ATA_CMD_SET_FEATURES = 0xEF,
244 ATA_CMD_SET_MULTI = 0xC6,
245 ATA_CMD_PACKET = 0xA0,
246 ATA_CMD_VERIFY = 0x40,
247 ATA_CMD_VERIFY_EXT = 0x42,
248 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
249 ATA_CMD_STANDBYNOW1 = 0xE0,
250 ATA_CMD_IDLEIMMEDIATE = 0xE1,
251 ATA_CMD_SLEEP = 0xE6,
252 ATA_CMD_INIT_DEV_PARAMS = 0x91,
253 ATA_CMD_READ_NATIVE_MAX = 0xF8,
254 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
255 ATA_CMD_SET_MAX = 0xF9,
256 ATA_CMD_SET_MAX_EXT = 0x37,
257 ATA_CMD_READ_LOG_EXT = 0x2F,
258 ATA_CMD_WRITE_LOG_EXT = 0x3F,
259 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
260 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
261 ATA_CMD_TRUSTED_RCV = 0x5C,
262 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
263 ATA_CMD_TRUSTED_SND = 0x5E,
264 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
265 ATA_CMD_PMP_READ = 0xE4,
266 ATA_CMD_PMP_WRITE = 0xE8,
267 ATA_CMD_CONF_OVERLAY = 0xB1,
268 ATA_CMD_SEC_SET_PASS = 0xF1,
269 ATA_CMD_SEC_UNLOCK = 0xF2,
270 ATA_CMD_SEC_ERASE_PREP = 0xF3,
271 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
272 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
273 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
274 ATA_CMD_CONFIG_STREAM = 0x51,
275 ATA_CMD_SMART = 0xB0,
276 ATA_CMD_MEDIA_LOCK = 0xDE,
277 ATA_CMD_MEDIA_UNLOCK = 0xDF,
278 ATA_CMD_DSM = 0x06,
279 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
280 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
281 ATA_CMD_CFA_WRITE_NE = 0x38,
282 ATA_CMD_CFA_TRANS_SECT = 0x87,
283 ATA_CMD_CFA_ERASE = 0xC0,
284 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
285
286 ATA_CMD_RESTORE = 0x10,
287
288
289 ATA_LOG_SATA_NCQ = 0x10,
290
291
292 ATA_CMD_READ_LONG = 0x22,
293 ATA_CMD_READ_LONG_ONCE = 0x23,
294 ATA_CMD_WRITE_LONG = 0x32,
295 ATA_CMD_WRITE_LONG_ONCE = 0x33,
296
297
298 SETFEATURES_XFER = 0x03,
299 XFER_UDMA_7 = 0x47,
300 XFER_UDMA_6 = 0x46,
301 XFER_UDMA_5 = 0x45,
302 XFER_UDMA_4 = 0x44,
303 XFER_UDMA_3 = 0x43,
304 XFER_UDMA_2 = 0x42,
305 XFER_UDMA_1 = 0x41,
306 XFER_UDMA_0 = 0x40,
307 XFER_MW_DMA_4 = 0x24,
308 XFER_MW_DMA_3 = 0x23,
309 XFER_MW_DMA_2 = 0x22,
310 XFER_MW_DMA_1 = 0x21,
311 XFER_MW_DMA_0 = 0x20,
312 XFER_SW_DMA_2 = 0x12,
313 XFER_SW_DMA_1 = 0x11,
314 XFER_SW_DMA_0 = 0x10,
315 XFER_PIO_6 = 0x0E,
316 XFER_PIO_5 = 0x0D,
317 XFER_PIO_4 = 0x0C,
318 XFER_PIO_3 = 0x0B,
319 XFER_PIO_2 = 0x0A,
320 XFER_PIO_1 = 0x09,
321 XFER_PIO_0 = 0x08,
322 XFER_PIO_SLOW = 0x00,
323
324 SETFEATURES_WC_ON = 0x02,
325 SETFEATURES_WC_OFF = 0x82,
326
327
328 SETFEATURES_AAM_ON = 0x42,
329 SETFEATURES_AAM_OFF = 0xC2,
330
331 SETFEATURES_SPINUP = 0x07,
332
333 SETFEATURES_SATA_ENABLE = 0x10,
334 SETFEATURES_SATA_DISABLE = 0x90,
335
336
337 SATA_FPDMA_OFFSET = 0x01,
338 SATA_FPDMA_AA = 0x02,
339 SATA_DIPM = 0x03,
340 SATA_FPDMA_IN_ORDER = 0x04,
341 SATA_AN = 0x05,
342 SATA_SSP = 0x06,
343
344
345 ATA_SET_MAX_ADDR = 0x00,
346 ATA_SET_MAX_PASSWD = 0x01,
347 ATA_SET_MAX_LOCK = 0x02,
348 ATA_SET_MAX_UNLOCK = 0x03,
349 ATA_SET_MAX_FREEZE_LOCK = 0x04,
350
351
352 ATA_DCO_RESTORE = 0xC0,
353 ATA_DCO_FREEZE_LOCK = 0xC1,
354 ATA_DCO_IDENTIFY = 0xC2,
355 ATA_DCO_SET = 0xC3,
356
357
358 ATA_SMART_ENABLE = 0xD8,
359 ATA_SMART_READ_VALUES = 0xD0,
360 ATA_SMART_READ_THRESHOLDS = 0xD1,
361
362
363 ATA_DSM_TRIM = 0x01,
364
365
366 ATA_SMART_LBAM_PASS = 0x4F,
367 ATA_SMART_LBAH_PASS = 0xC2,
368
369
370 ATAPI_PKT_DMA = (1 << 0),
371 ATAPI_DMADIR = (1 << 2),
372
373 ATAPI_CDB_LEN = 16,
374
375
376 SATA_PMP_MAX_PORTS = 15,
377 SATA_PMP_CTRL_PORT = 15,
378
379 SATA_PMP_GSCR_DWORDS = 128,
380 SATA_PMP_GSCR_PROD_ID = 0,
381 SATA_PMP_GSCR_REV = 1,
382 SATA_PMP_GSCR_PORT_INFO = 2,
383 SATA_PMP_GSCR_ERROR = 32,
384 SATA_PMP_GSCR_ERROR_EN = 33,
385 SATA_PMP_GSCR_FEAT = 64,
386 SATA_PMP_GSCR_FEAT_EN = 96,
387
388 SATA_PMP_PSCR_STATUS = 0,
389 SATA_PMP_PSCR_ERROR = 1,
390 SATA_PMP_PSCR_CONTROL = 2,
391
392 SATA_PMP_FEAT_BIST = (1 << 0),
393 SATA_PMP_FEAT_PMREQ = (1 << 1),
394 SATA_PMP_FEAT_DYNSSC = (1 << 2),
395 SATA_PMP_FEAT_NOTIFY = (1 << 3),
396
397
398 ATA_CBL_NONE = 0,
399 ATA_CBL_PATA40 = 1,
400 ATA_CBL_PATA80 = 2,
401 ATA_CBL_PATA40_SHORT = 3,
402 ATA_CBL_PATA_UNK = 4,
403 ATA_CBL_PATA_IGN = 5,
404 ATA_CBL_SATA = 6,
405
406
407 SCR_STATUS = 0,
408 SCR_ERROR = 1,
409 SCR_CONTROL = 2,
410 SCR_ACTIVE = 3,
411 SCR_NOTIFICATION = 4,
412
413
414 SERR_DATA_RECOVERED = (1 << 0),
415 SERR_COMM_RECOVERED = (1 << 1),
416 SERR_DATA = (1 << 8),
417 SERR_PERSISTENT = (1 << 9),
418 SERR_PROTOCOL = (1 << 10),
419 SERR_INTERNAL = (1 << 11),
420 SERR_PHYRDY_CHG = (1 << 16),
421 SERR_PHY_INT_ERR = (1 << 17),
422 SERR_COMM_WAKE = (1 << 18),
423 SERR_10B_8B_ERR = (1 << 19),
424 SERR_DISPARITY = (1 << 20),
425 SERR_CRC = (1 << 21),
426 SERR_HANDSHAKE = (1 << 22),
427 SERR_LINK_SEQ_ERR = (1 << 23),
428 SERR_TRANS_ST_ERROR = (1 << 24),
429 SERR_UNRECOG_FIS = (1 << 25),
430 SERR_DEV_XCHG = (1 << 26),
431
432
433 ATA_TFLAG_LBA48 = (1 << 0),
434 ATA_TFLAG_ISADDR = (1 << 1),
435 ATA_TFLAG_DEVICE = (1 << 2),
436 ATA_TFLAG_WRITE = (1 << 3),
437 ATA_TFLAG_LBA = (1 << 4),
438 ATA_TFLAG_FUA = (1 << 5),
439 ATA_TFLAG_POLLING = (1 << 6),
440
441
442 ATA_PROT_FLAG_PIO = (1 << 0),
443 ATA_PROT_FLAG_DMA = (1 << 1),
444 ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
445 ATA_PROT_FLAG_NCQ = (1 << 2),
446 ATA_PROT_FLAG_ATAPI = (1 << 3),
447};
448
449enum ata_tf_protocols {
450
451 ATA_PROT_UNKNOWN,
452 ATA_PROT_NODATA,
453 ATA_PROT_PIO,
454 ATA_PROT_DMA,
455 ATA_PROT_NCQ,
456 ATAPI_PROT_NODATA,
457 ATAPI_PROT_PIO,
458 ATAPI_PROT_DMA,
459};
460
461enum ata_ioctls {
462 ATA_IOC_GET_IO32 = 0x309,
463 ATA_IOC_SET_IO32 = 0x324,
464};
465
466
467
468struct ata_prd {
469 __le32 addr;
470 __le32 flags_len;
471};
472
473struct ata_taskfile {
474 unsigned long flags;
475 u8 protocol;
476
477 u8 ctl;
478
479 u8 hob_feature;
480 u8 hob_nsect;
481 u8 hob_lbal;
482 u8 hob_lbam;
483 u8 hob_lbah;
484
485 u8 feature;
486 u8 nsect;
487 u8 lbal;
488 u8 lbam;
489 u8 lbah;
490
491 u8 device;
492
493 u8 command;
494};
495
496
497
498
499static inline unsigned int ata_prot_flags(u8 prot)
500{
501 switch (prot) {
502 case ATA_PROT_NODATA:
503 return 0;
504 case ATA_PROT_PIO:
505 return ATA_PROT_FLAG_PIO;
506 case ATA_PROT_DMA:
507 return ATA_PROT_FLAG_DMA;
508 case ATA_PROT_NCQ:
509 return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
510 case ATAPI_PROT_NODATA:
511 return ATA_PROT_FLAG_ATAPI;
512 case ATAPI_PROT_PIO:
513 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
514 case ATAPI_PROT_DMA:
515 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
516 }
517 return 0;
518}
519
520static inline int ata_is_atapi(u8 prot)
521{
522 return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
523}
524
525static inline int ata_is_nodata(u8 prot)
526{
527 return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
528}
529
530static inline int ata_is_pio(u8 prot)
531{
532 return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
533}
534
535static inline int ata_is_dma(u8 prot)
536{
537 return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
538}
539
540static inline int ata_is_ncq(u8 prot)
541{
542 return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
543}
544
545static inline int ata_is_data(u8 prot)
546{
547 return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
548}
549
550
551
552
553#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
554#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
555#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
556#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
557#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
558#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
559#define ata_id_has_atapi_AN(id) \
560 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
561 ((id)[78] & (1 << 5)) )
562#define ata_id_has_fpdma_aa(id) \
563 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
564 ((id)[78] & (1 << 2)) )
565#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
566#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
567#define ata_id_u32(id,n) \
568 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
569#define ata_id_u64(id,n) \
570 ( ((u64) (id)[(n) + 3] << 48) | \
571 ((u64) (id)[(n) + 2] << 32) | \
572 ((u64) (id)[(n) + 1] << 16) | \
573 ((u64) (id)[(n) + 0]) )
574
575#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
576
577static inline bool ata_id_has_hipm(const u16 *id)
578{
579 u16 val = id[76];
580
581 if (val == 0 || val == 0xffff)
582 return false;
583
584 return val & (1 << 9);
585}
586
587static inline bool ata_id_has_dipm(const u16 *id)
588{
589 u16 val = id[78];
590
591 if (val == 0 || val == 0xffff)
592 return false;
593
594 return val & (1 << 3);
595}
596
597
598static inline int ata_id_has_fua(const u16 *id)
599{
600 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
601 return 0;
602 return id[ATA_ID_CFSSE] & (1 << 6);
603}
604
605static inline int ata_id_has_flush(const u16 *id)
606{
607 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
608 return 0;
609 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
610}
611
612static inline int ata_id_flush_enabled(const u16 *id)
613{
614 if (ata_id_has_flush(id) == 0)
615 return 0;
616 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
617 return 0;
618 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
619}
620
621static inline int ata_id_has_flush_ext(const u16 *id)
622{
623 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
624 return 0;
625 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
626}
627
628static inline int ata_id_flush_ext_enabled(const u16 *id)
629{
630 if (ata_id_has_flush_ext(id) == 0)
631 return 0;
632 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
633 return 0;
634
635
636
637
638 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
639}
640
641static inline int ata_id_has_lba48(const u16 *id)
642{
643 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
644 return 0;
645 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
646 return 0;
647 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
648}
649
650static inline int ata_id_lba48_enabled(const u16 *id)
651{
652 if (ata_id_has_lba48(id) == 0)
653 return 0;
654 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
655 return 0;
656 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
657}
658
659static inline int ata_id_hpa_enabled(const u16 *id)
660{
661
662 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
663 return 0;
664
665 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
666 return 0;
667
668 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
669 return 0;
670 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
671}
672
673static inline int ata_id_has_wcache(const u16 *id)
674{
675
676 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
677 return 0;
678 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
679}
680
681static inline int ata_id_has_pm(const u16 *id)
682{
683 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
684 return 0;
685 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
686}
687
688static inline int ata_id_rahead_enabled(const u16 *id)
689{
690 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
691 return 0;
692 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
693}
694
695static inline int ata_id_wcache_enabled(const u16 *id)
696{
697 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
698 return 0;
699 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
700}
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715static inline unsigned int ata_id_major_version(const u16 *id)
716{
717 unsigned int mver;
718
719 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
720 return 0;
721
722 for (mver = 14; mver >= 1; mver--)
723 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
724 break;
725 return mver;
726}
727
728static inline int ata_id_is_sata(const u16 *id)
729{
730
731
732
733
734
735
736 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
737 return 1;
738 return 0;
739}
740
741static inline int ata_id_has_tpm(const u16 *id)
742{
743
744 if (ata_id_major_version(id) < 8)
745 return 0;
746 if ((id[48] & 0xC000) != 0x4000)
747 return 0;
748 return id[48] & (1 << 0);
749}
750
751static inline int ata_id_has_dword_io(const u16 *id)
752{
753
754 if (ata_id_major_version(id) > 7)
755 return 0;
756 if (id[ATA_ID_DWORD_IO] & (1 << 0))
757 return 1;
758 return 0;
759}
760
761static inline int ata_id_has_unload(const u16 *id)
762{
763 if (ata_id_major_version(id) >= 7 &&
764 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
765 id[ATA_ID_CFSSE] & (1 << 13))
766 return 1;
767 return 0;
768}
769
770static inline int ata_id_form_factor(const u16 *id)
771{
772 u16 val = id[168];
773
774 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
775 return 0;
776
777 val &= 0xf;
778
779 if (val > 5)
780 return 0;
781
782 return val;
783}
784
785static inline int ata_id_rotation_rate(const u16 *id)
786{
787 u16 val = id[217];
788
789 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
790 return 0;
791
792 if (val > 1 && val < 0x401)
793 return 0;
794
795 return val;
796}
797
798static inline int ata_id_has_trim(const u16 *id)
799{
800 if (ata_id_major_version(id) >= 7 &&
801 (id[ATA_ID_DATA_SET_MGMT] & 1))
802 return 1;
803 return 0;
804}
805
806static inline int ata_id_current_chs_valid(const u16 *id)
807{
808
809
810
811 return (id[ATA_ID_FIELD_VALID] & 1) &&
812 id[ATA_ID_CUR_CYLS] &&
813 id[ATA_ID_CUR_HEADS] &&
814 id[ATA_ID_CUR_HEADS] <= 16 &&
815 id[ATA_ID_CUR_SECTORS];
816}
817
818static inline int ata_id_is_cfa(const u16 *id)
819{
820 if (id[ATA_ID_CONFIG] == 0x848A)
821 return 1;
822
823
824
825
826
827
828
829
830 if ((id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004)
831 return 1;
832 return 0;
833}
834
835static inline int ata_id_is_ssd(const u16 *id)
836{
837 return id[ATA_ID_ROT_SPEED] == 0x01;
838}
839
840static inline int ata_id_pio_need_iordy(const u16 *id, const u8 pio)
841{
842
843 if (pio > 4 && ata_id_is_cfa(id))
844 return 0;
845
846 if (pio > 2)
847 return 1;
848
849 if (ata_id_has_iordy(id))
850 return 1;
851 return 0;
852}
853
854static inline int ata_drive_40wire(const u16 *dev_id)
855{
856 if (ata_id_is_sata(dev_id))
857 return 0;
858 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
859 return 0;
860 return 1;
861}
862
863static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
864{
865 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
866 return 0;
867 return 1;
868}
869
870static inline int atapi_cdb_len(const u16 *dev_id)
871{
872 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
873 switch (tmp) {
874 case 0: return 12;
875 case 1: return 16;
876 default: return -1;
877 }
878}
879
880static inline int atapi_command_packet_set(const u16 *dev_id)
881{
882 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
883}
884
885static inline int atapi_id_dmadir(const u16 *dev_id)
886{
887 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
888}
889
890
891
892
893
894
895
896
897
898static inline int ata_id_is_lba_capacity_ok(u16 *id)
899{
900 unsigned long lba_sects, chs_sects, head, tail;
901
902
903 if (id[ATA_ID_CYLS] == 0)
904 return 1;
905
906 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
907
908
909
910
911
912
913
914 if ((id[ATA_ID_CYLS] == 16383 ||
915 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
916 id[ATA_ID_SECTORS] == 63 &&
917 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
918 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
919 return 1;
920
921 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
922
923
924 if (lba_sects - chs_sects < chs_sects/10)
925 return 1;
926
927
928 head = (lba_sects >> 16) & 0xffff;
929 tail = lba_sects & 0xffff;
930 lba_sects = head | (tail << 16);
931
932 if (lba_sects - chs_sects < chs_sects/10) {
933 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
934 return 1;
935 }
936
937 return 0;
938}
939
940static inline void ata_id_to_hd_driveid(u16 *id)
941{
942#ifdef __BIG_ENDIAN
943
944 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
945 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
946 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
947 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
948 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
949
950
951 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
952 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
953
954
955 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
956 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
957#endif
958}
959
960
961
962
963
964
965static inline unsigned ata_set_lba_range_entries(void *_buffer, unsigned max,
966 u64 sector, unsigned long count)
967{
968 __le64 *buffer = _buffer;
969 unsigned i = 0;
970
971 while (i < max) {
972 u64 entry = sector |
973 ((u64)(count > 0xffff ? 0xffff : count) << 48);
974 buffer[i++] = __cpu_to_le64(entry);
975 if (count <= 0xffff)
976 break;
977 count -= 0xffff;
978 sector += 0xffff;
979 }
980
981 max = ALIGN(i * 8, 512);
982 memset(buffer + i, 0, max - i * 8);
983 return max;
984}
985
986static inline int is_multi_taskfile(struct ata_taskfile *tf)
987{
988 return (tf->command == ATA_CMD_READ_MULTI) ||
989 (tf->command == ATA_CMD_WRITE_MULTI) ||
990 (tf->command == ATA_CMD_READ_MULTI_EXT) ||
991 (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
992 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
993}
994
995static inline int ata_ok(u8 status)
996{
997 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
998 == ATA_DRDY);
999}
1000
1001static inline int lba_28_ok(u64 block, u32 n_block)
1002{
1003
1004 return ((block + n_block) < ((u64)1 << 28)) && (n_block <= 256);
1005}
1006
1007static inline int lba_48_ok(u64 block, u32 n_block)
1008{
1009
1010 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1011}
1012
1013#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1014#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1015#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1016#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1017
1018#endif
1019