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21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/irqreturn.h>
28
29struct intel_iommu;
30#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
31struct dmar_drhd_unit {
32 struct list_head list;
33 struct acpi_dmar_header *hdr;
34 u64 reg_base_addr;
35 struct pci_dev **devices;
36 int devices_cnt;
37 u16 segment;
38 u8 ignored:1;
39 u8 include_all:1;
40 struct intel_iommu *iommu;
41};
42
43extern struct list_head dmar_drhd_units;
44
45#define for_each_drhd_unit(drhd) \
46 list_for_each_entry(drhd, &dmar_drhd_units, list)
47
48#define for_each_active_iommu(i, drhd) \
49 list_for_each_entry(drhd, &dmar_drhd_units, list) \
50 if (i=drhd->iommu, drhd->ignored) {} else
51
52#define for_each_iommu(i, drhd) \
53 list_for_each_entry(drhd, &dmar_drhd_units, list) \
54 if (i=drhd->iommu, 0) {} else
55
56extern int dmar_table_init(void);
57extern int dmar_dev_scope_init(void);
58
59
60extern void detect_intel_iommu(void);
61extern int enable_drhd_fault_handling(void);
62
63extern int parse_ioapics_under_ir(void);
64extern int alloc_iommu(struct dmar_drhd_unit *);
65#else
66static inline void detect_intel_iommu(void)
67{
68 return;
69}
70
71static inline int dmar_table_init(void)
72{
73 return -ENODEV;
74}
75static inline int enable_drhd_fault_handling(void)
76{
77 return -1;
78}
79#endif
80
81struct irte {
82 union {
83 struct {
84 __u64 present : 1,
85 fpd : 1,
86 dst_mode : 1,
87 redir_hint : 1,
88 trigger_mode : 1,
89 dlvry_mode : 3,
90 avail : 4,
91 __reserved_1 : 4,
92 vector : 8,
93 __reserved_2 : 8,
94 dest_id : 32;
95 };
96 __u64 low;
97 };
98
99 union {
100 struct {
101 __u64 sid : 16,
102 sq : 2,
103 svt : 2,
104 __reserved_3 : 44;
105 };
106 __u64 high;
107 };
108};
109#ifdef CONFIG_INTR_REMAP
110extern int intr_remapping_enabled;
111extern int intr_remapping_supported(void);
112extern int enable_intr_remapping(int);
113extern void disable_intr_remapping(void);
114extern int reenable_intr_remapping(int);
115
116extern int get_irte(int irq, struct irte *entry);
117extern int modify_irte(int irq, struct irte *irte_modified);
118extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
119extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
120 u16 sub_handle);
121extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
122extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index);
123extern int flush_irte(int irq);
124extern int free_irte(int irq);
125
126extern int irq_remapped(int irq);
127extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
128extern struct intel_iommu *map_ioapic_to_ir(int apic);
129extern int set_ioapic_sid(struct irte *irte, int apic);
130extern int set_msi_sid(struct irte *irte, struct pci_dev *dev);
131#else
132static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
133{
134 return -1;
135}
136static inline int modify_irte(int irq, struct irte *irte_modified)
137{
138 return -1;
139}
140static inline int free_irte(int irq)
141{
142 return -1;
143}
144static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle)
145{
146 return -1;
147}
148static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
149 u16 sub_handle)
150{
151 return -1;
152}
153static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)
154{
155 return NULL;
156}
157static inline struct intel_iommu *map_ioapic_to_ir(int apic)
158{
159 return NULL;
160}
161static inline int set_ioapic_sid(struct irte *irte, int apic)
162{
163 return 0;
164}
165static inline int set_msi_sid(struct irte *irte, struct pci_dev *dev)
166{
167 return 0;
168}
169
170#define irq_remapped(irq) (0)
171#define enable_intr_remapping(mode) (-1)
172#define disable_intr_remapping() (0)
173#define reenable_intr_remapping(mode) (0)
174#define intr_remapping_enabled (0)
175#endif
176
177
178
179
180extern void dmar_msi_unmask(unsigned int irq);
181extern void dmar_msi_mask(unsigned int irq);
182extern void dmar_msi_read(int irq, struct msi_msg *msg);
183extern void dmar_msi_write(int irq, struct msi_msg *msg);
184extern int dmar_set_interrupt(struct intel_iommu *iommu);
185extern irqreturn_t dmar_fault(int irq, void *dev_id);
186extern int arch_setup_dmar_msi(unsigned int irq);
187
188#ifdef CONFIG_DMAR
189extern int iommu_detected, no_iommu;
190extern struct list_head dmar_rmrr_units;
191struct dmar_rmrr_unit {
192 struct list_head list;
193 struct acpi_dmar_header *hdr;
194 u64 base_address;
195 u64 end_address;
196 struct pci_dev **devices;
197 int devices_cnt;
198};
199
200#define for_each_rmrr_units(rmrr) \
201 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
202
203struct dmar_atsr_unit {
204 struct list_head list;
205 struct acpi_dmar_header *hdr;
206 struct pci_dev **devices;
207 int devices_cnt;
208 u8 include_all:1;
209};
210
211
212extern int intel_iommu_init(void);
213#else
214static inline int intel_iommu_init(void)
215{
216#ifdef CONFIG_INTR_REMAP
217 return dmar_dev_scope_init();
218#else
219 return -ENODEV;
220#endif
221}
222#endif
223#endif
224