1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
20#include <linux/pci_regs.h>
21
22
23
24
25
26
27
28
29
30#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32#define PCI_FUNC(devfn) ((devfn) & 0x07)
33
34
35#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00)
37#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01)
38#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02)
39#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
40
41#ifdef __KERNEL__
42
43#include <linux/mod_devicetable.h>
44
45#include <linux/types.h>
46#include <linux/init.h>
47#include <linux/ioport.h>
48#include <linux/list.h>
49#include <linux/compiler.h>
50#include <linux/errno.h>
51#include <linux/kobject.h>
52#include <asm/atomic.h>
53#include <linux/device.h>
54#include <linux/io.h>
55#include <linux/irqreturn.h>
56
57
58#include <linux/pci_ids.h>
59
60
61struct pci_slot {
62 struct pci_bus *bus;
63 struct list_head list;
64 struct hotplug_slot *hotplug;
65 unsigned char number;
66 struct kobject kobj;
67};
68
69static inline const char *pci_slot_name(const struct pci_slot *slot)
70{
71 return kobject_name(&slot->kobj);
72}
73
74
75enum pci_mmap_state {
76 pci_mmap_io,
77 pci_mmap_mem
78};
79
80
81#define PCI_DMA_BIDIRECTIONAL 0
82#define PCI_DMA_TODEVICE 1
83#define PCI_DMA_FROMDEVICE 2
84#define PCI_DMA_NONE 3
85
86
87
88
89enum {
90
91 PCI_STD_RESOURCES,
92 PCI_STD_RESOURCE_END = 5,
93
94
95 PCI_ROM_RESOURCE,
96
97
98#ifdef CONFIG_PCI_IOV
99 PCI_IOV_RESOURCES,
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
101#endif
102
103
104#define PCI_BRIDGE_RESOURCE_NUM 4
105
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
109
110
111 PCI_NUM_RESOURCES,
112
113
114 DEVICE_COUNT_RESOURCE
115};
116
117typedef int __bitwise pci_power_t;
118
119#define PCI_D0 ((pci_power_t __force) 0)
120#define PCI_D1 ((pci_power_t __force) 1)
121#define PCI_D2 ((pci_power_t __force) 2)
122#define PCI_D3hot ((pci_power_t __force) 3)
123#define PCI_D3cold ((pci_power_t __force) 4)
124#define PCI_UNKNOWN ((pci_power_t __force) 5)
125#define PCI_POWER_ERROR ((pci_power_t __force) -1)
126
127
128extern const char *pci_power_names[];
129
130static inline const char *pci_power_name(pci_power_t state)
131{
132 return pci_power_names[1 + (int) state];
133}
134
135#define PCI_PM_D2_DELAY 200
136#define PCI_PM_D3_WAIT 10
137#define PCI_PM_BUS_WAIT 50
138
139
140
141
142
143typedef unsigned int __bitwise pci_channel_state_t;
144
145enum pci_channel_state {
146
147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
148
149
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
151
152
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
154};
155
156typedef unsigned int __bitwise pcie_reset_state_t;
157
158enum pcie_reset_state {
159
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
161
162
163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
164
165
166 pcie_hot_reset = (__force pcie_reset_state_t) 3
167};
168
169typedef unsigned short __bitwise pci_dev_flags_t;
170enum pci_dev_flags {
171
172
173
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
177};
178
179enum pci_irq_reroute_variant {
180 INTEL_IRQ_REROUTE_VARIANT = 1,
181 MAX_IRQ_REROUTE_VARIANTS = 3
182};
183
184typedef unsigned short __bitwise pci_bus_flags_t;
185enum pci_bus_flags {
186 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
187 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
188};
189
190struct pci_cap_saved_state {
191 struct hlist_node next;
192 char cap_nr;
193 u32 data[0];
194};
195
196struct pcie_link_state;
197struct pci_vpd;
198struct pci_sriov;
199struct pci_ats;
200
201
202
203
204struct pci_dev {
205 struct list_head bus_list;
206 struct pci_bus *bus;
207 struct pci_bus *subordinate;
208
209 void *sysdata;
210 struct proc_dir_entry *procent;
211 struct pci_slot *slot;
212
213 unsigned int devfn;
214 unsigned short vendor;
215 unsigned short device;
216 unsigned short subsystem_vendor;
217 unsigned short subsystem_device;
218 unsigned int class;
219 u8 revision;
220 u8 hdr_type;
221 u8 pcie_type;
222 u8 rom_base_reg;
223 u8 pin;
224
225 struct pci_driver *driver;
226 u64 dma_mask;
227
228
229
230
231
232 struct device_dma_parameters dma_parms;
233
234 pci_power_t current_state;
235
236
237 int pm_cap;
238
239 unsigned int pme_support:5;
240
241 unsigned int d1_support:1;
242 unsigned int d2_support:1;
243 unsigned int no_d1d2:1;
244 unsigned int wakeup_prepared:1;
245
246#ifdef CONFIG_PCIEASPM
247 struct pcie_link_state *link_state;
248#endif
249
250 pci_channel_state_t error_state;
251 struct device dev;
252
253 int cfg_size;
254
255
256
257
258
259 unsigned int irq;
260 struct resource resource[DEVICE_COUNT_RESOURCE];
261
262
263 unsigned int transparent:1;
264 unsigned int multifunction:1;
265
266 unsigned int is_added:1;
267 unsigned int is_busmaster:1;
268 unsigned int no_msi:1;
269 unsigned int block_ucfg_access:1;
270 unsigned int broken_parity_status:1;
271 unsigned int irq_reroute_variant:2;
272 unsigned int msi_enabled:1;
273 unsigned int msix_enabled:1;
274 unsigned int ari_enabled:1;
275 unsigned int is_managed:1;
276 unsigned int is_pcie:1;
277 unsigned int needs_freset:1;
278 unsigned int state_saved:1;
279 unsigned int is_physfn:1;
280 unsigned int is_virtfn:1;
281 unsigned int reset_fn:1;
282 unsigned int is_hotplug_bridge:1;
283 pci_dev_flags_t dev_flags;
284 atomic_t enable_cnt;
285
286 u32 saved_config_space[16];
287 struct hlist_head saved_cap_space;
288 struct bin_attribute *rom_attr;
289 int rom_attr_enabled;
290 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE];
291 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE];
292#ifdef CONFIG_PCI_MSI
293 struct list_head msi_list;
294#endif
295 struct pci_vpd *vpd;
296#ifdef CONFIG_PCI_IOV
297 union {
298 struct pci_sriov *sriov;
299 struct pci_dev *physfn;
300 };
301 struct pci_ats *ats;
302#endif
303};
304
305extern struct pci_dev *alloc_pci_dev(void);
306
307#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
308#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
309#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
310
311static inline int pci_channel_offline(struct pci_dev *pdev)
312{
313 return (pdev->error_state != pci_channel_io_normal);
314}
315
316static inline struct pci_cap_saved_state *pci_find_saved_cap(
317 struct pci_dev *pci_dev, char cap)
318{
319 struct pci_cap_saved_state *tmp;
320 struct hlist_node *pos;
321
322 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
323 if (tmp->cap_nr == cap)
324 return tmp;
325 }
326 return NULL;
327}
328
329static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
330 struct pci_cap_saved_state *new_cap)
331{
332 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
333}
334
335#ifndef PCI_BUS_NUM_RESOURCES
336#define PCI_BUS_NUM_RESOURCES 16
337#endif
338
339#define PCI_REGION_FLAG_MASK 0x0fU
340
341struct pci_bus {
342 struct list_head node;
343 struct pci_bus *parent;
344 struct list_head children;
345 struct list_head devices;
346 struct pci_dev *self;
347 struct list_head slots;
348 struct resource *resource[PCI_BUS_NUM_RESOURCES];
349
350
351 struct pci_ops *ops;
352 void *sysdata;
353 struct proc_dir_entry *procdir;
354
355 unsigned char number;
356 unsigned char primary;
357 unsigned char secondary;
358 unsigned char subordinate;
359
360 char name[48];
361
362 unsigned short bridge_ctl;
363 pci_bus_flags_t bus_flags;
364 struct device *bridge;
365 struct device dev;
366 struct bin_attribute *legacy_io;
367 struct bin_attribute *legacy_mem;
368 unsigned int is_added:1;
369};
370
371#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
372#define to_pci_bus(n) container_of(n, struct pci_bus, dev)
373
374
375
376
377
378static inline bool pci_is_root_bus(struct pci_bus *pbus)
379{
380 return !(pbus->parent);
381}
382
383#ifdef CONFIG_PCI_MSI
384static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
385{
386 return pci_dev->msi_enabled || pci_dev->msix_enabled;
387}
388#else
389static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
390#endif
391
392
393
394
395#define PCIBIOS_SUCCESSFUL 0x00
396#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
397#define PCIBIOS_BAD_VENDOR_ID 0x83
398#define PCIBIOS_DEVICE_NOT_FOUND 0x86
399#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
400#define PCIBIOS_SET_FAILED 0x88
401#define PCIBIOS_BUFFER_TOO_SMALL 0x89
402
403
404
405struct pci_ops {
406 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
407 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
408};
409
410
411
412
413
414extern int raw_pci_read(unsigned int domain, unsigned int bus,
415 unsigned int devfn, int reg, int len, u32 *val);
416extern int raw_pci_write(unsigned int domain, unsigned int bus,
417 unsigned int devfn, int reg, int len, u32 val);
418
419struct pci_bus_region {
420 resource_size_t start;
421 resource_size_t end;
422};
423
424struct pci_dynids {
425 spinlock_t lock;
426 struct list_head list;
427};
428
429
430
431
432
433
434
435
436typedef unsigned int __bitwise pci_ers_result_t;
437
438enum pci_ers_result {
439
440 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
441
442
443 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
444
445
446 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
447
448
449 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
450
451
452 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
453};
454
455
456struct pci_error_handlers {
457
458 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
459 enum pci_channel_state error);
460
461
462 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
463
464
465 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
466
467
468 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
469
470
471 void (*resume)(struct pci_dev *dev);
472};
473
474
475
476struct module;
477struct pci_driver {
478 struct list_head node;
479 char *name;
480 const struct pci_device_id *id_table;
481 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id);
482 void (*remove) (struct pci_dev *dev);
483 int (*suspend) (struct pci_dev *dev, pm_message_t state);
484 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
485 int (*resume_early) (struct pci_dev *dev);
486 int (*resume) (struct pci_dev *dev);
487 void (*shutdown) (struct pci_dev *dev);
488 struct pci_error_handlers *err_handler;
489 struct device_driver driver;
490 struct pci_dynids dynids;
491};
492
493#define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
494
495
496
497
498
499
500
501
502#define DEFINE_PCI_DEVICE_TABLE(_table) \
503 const struct pci_device_id _table[] __devinitconst
504
505
506
507
508
509
510
511
512
513
514#define PCI_DEVICE(vend,dev) \
515 .vendor = (vend), .device = (dev), \
516 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
517
518
519
520
521
522
523
524
525
526
527#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
528 .class = (dev_class), .class_mask = (dev_class_mask), \
529 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
530 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
531
532
533
534
535
536
537
538
539
540
541
542
543#define PCI_VDEVICE(vendor, device) \
544 PCI_VENDOR_ID_##vendor, (device), \
545 PCI_ANY_ID, PCI_ANY_ID, 0, 0
546
547
548#ifdef CONFIG_PCI
549
550extern struct bus_type pci_bus_type;
551
552
553
554extern struct list_head pci_root_buses;
555
556extern int no_pci_devices(void);
557
558void pcibios_fixup_bus(struct pci_bus *);
559int __must_check pcibios_enable_device(struct pci_dev *, int mask);
560char *pcibios_setup(char *str);
561
562
563void pcibios_align_resource(void *, struct resource *, resource_size_t,
564 resource_size_t);
565void pcibios_update_irq(struct pci_dev *, int irq);
566
567
568
569extern struct pci_bus *pci_find_bus(int domain, int busnr);
570void pci_bus_add_devices(const struct pci_bus *bus);
571struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
572 struct pci_ops *ops, void *sysdata);
573static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
574 void *sysdata)
575{
576 struct pci_bus *root_bus;
577 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
578 if (root_bus)
579 pci_bus_add_devices(root_bus);
580 return root_bus;
581}
582struct pci_bus *pci_create_bus(struct device *parent, int bus,
583 struct pci_ops *ops, void *sysdata);
584struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
585 int busnr);
586struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
587 const char *name,
588 struct hotplug_slot *hotplug);
589void pci_destroy_slot(struct pci_slot *slot);
590void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
591int pci_scan_slot(struct pci_bus *bus, int devfn);
592struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
593void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
594unsigned int pci_scan_child_bus(struct pci_bus *bus);
595int __must_check pci_bus_add_device(struct pci_dev *dev);
596void pci_read_bridge_bases(struct pci_bus *child);
597struct resource *pci_find_parent_resource(const struct pci_dev *dev,
598 struct resource *res);
599u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
600int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
601u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
602extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
603extern void pci_dev_put(struct pci_dev *dev);
604extern void pci_remove_bus(struct pci_bus *b);
605extern void pci_remove_bus_device(struct pci_dev *dev);
606extern void pci_stop_bus_device(struct pci_dev *dev);
607void pci_setup_cardbus(struct pci_bus *bus);
608extern void pci_sort_breadthfirst(void);
609
610
611
612#ifdef CONFIG_PCI_LEGACY
613struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
614 unsigned int device,
615 struct pci_dev *from);
616#endif
617
618enum pci_lost_interrupt_reason {
619 PCI_LOST_IRQ_NO_INFORMATION = 0,
620 PCI_LOST_IRQ_DISABLE_MSI,
621 PCI_LOST_IRQ_DISABLE_MSIX,
622 PCI_LOST_IRQ_DISABLE_ACPI,
623};
624enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
625int pci_find_capability(struct pci_dev *dev, int cap);
626int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
627int pci_find_ext_capability(struct pci_dev *dev, int cap);
628int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
629int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
630struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
631
632struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
633 struct pci_dev *from);
634struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
635 unsigned int ss_vendor, unsigned int ss_device,
636 struct pci_dev *from);
637struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
638struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
639struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
640int pci_dev_present(const struct pci_device_id *ids);
641
642int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
643 int where, u8 *val);
644int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
645 int where, u16 *val);
646int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
647 int where, u32 *val);
648int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
649 int where, u8 val);
650int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
651 int where, u16 val);
652int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
653 int where, u32 val);
654struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
655
656static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
657{
658 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
659}
660static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
661{
662 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
663}
664static inline int pci_read_config_dword(struct pci_dev *dev, int where,
665 u32 *val)
666{
667 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
668}
669static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
670{
671 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
672}
673static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
674{
675 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
676}
677static inline int pci_write_config_dword(struct pci_dev *dev, int where,
678 u32 val)
679{
680 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
681}
682
683int __must_check pci_enable_device(struct pci_dev *dev);
684int __must_check pci_enable_device_io(struct pci_dev *dev);
685int __must_check pci_enable_device_mem(struct pci_dev *dev);
686int __must_check pci_reenable_device(struct pci_dev *);
687int __must_check pcim_enable_device(struct pci_dev *pdev);
688void pcim_pin_device(struct pci_dev *pdev);
689
690static inline int pci_is_enabled(struct pci_dev *pdev)
691{
692 return (atomic_read(&pdev->enable_cnt) > 0);
693}
694
695static inline int pci_is_managed(struct pci_dev *pdev)
696{
697 return pdev->is_managed;
698}
699
700void pci_disable_device(struct pci_dev *dev);
701void pci_set_master(struct pci_dev *dev);
702void pci_clear_master(struct pci_dev *dev);
703int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
704#define HAVE_PCI_SET_MWI
705int __must_check pci_set_mwi(struct pci_dev *dev);
706int pci_try_set_mwi(struct pci_dev *dev);
707void pci_clear_mwi(struct pci_dev *dev);
708void pci_intx(struct pci_dev *dev, int enable);
709void pci_msi_off(struct pci_dev *dev);
710int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
711int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
712int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
713int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
714int pcix_get_max_mmrbc(struct pci_dev *dev);
715int pcix_get_mmrbc(struct pci_dev *dev);
716int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
717int pcie_get_readrq(struct pci_dev *dev);
718int pcie_set_readrq(struct pci_dev *dev, int rq);
719int __pci_reset_function(struct pci_dev *dev);
720int pci_reset_function(struct pci_dev *dev);
721void pci_update_resource(struct pci_dev *dev, int resno);
722int __must_check pci_assign_resource(struct pci_dev *dev, int i);
723int pci_select_bars(struct pci_dev *dev, unsigned long flags);
724
725
726int pci_enable_rom(struct pci_dev *pdev);
727void pci_disable_rom(struct pci_dev *pdev);
728void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
729void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
730size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
731
732
733int pci_save_state(struct pci_dev *dev);
734int pci_restore_state(struct pci_dev *dev);
735int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
736int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
737pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
738bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
739void pci_pme_active(struct pci_dev *dev, bool enable);
740int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
741int pci_wake_from_d3(struct pci_dev *dev, bool enable);
742pci_power_t pci_target_state(struct pci_dev *dev);
743int pci_prepare_to_sleep(struct pci_dev *dev);
744int pci_back_from_sleep(struct pci_dev *dev);
745
746
747int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
748#ifdef CONFIG_HOTPLUG
749unsigned int pci_rescan_bus(struct pci_bus *bus);
750#endif
751
752
753ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
754ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
755int pci_vpd_truncate(struct pci_dev *dev, size_t size);
756
757
758void pci_bus_assign_resources(const struct pci_bus *bus);
759void pci_bus_size_bridges(struct pci_bus *bus);
760int pci_claim_resource(struct pci_dev *, int);
761void pci_assign_unassigned_resources(void);
762void pdev_enable_device(struct pci_dev *);
763void pdev_sort_resources(struct pci_dev *, struct resource_list *);
764int pci_enable_resources(struct pci_dev *, int mask);
765void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
766 int (*)(struct pci_dev *, u8, u8));
767#define HAVE_PCI_REQ_REGIONS 2
768int __must_check pci_request_regions(struct pci_dev *, const char *);
769int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
770void pci_release_regions(struct pci_dev *);
771int __must_check pci_request_region(struct pci_dev *, int, const char *);
772int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
773void pci_release_region(struct pci_dev *, int);
774int pci_request_selected_regions(struct pci_dev *, int, const char *);
775int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
776void pci_release_selected_regions(struct pci_dev *, int);
777
778
779int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
780 struct resource *res, resource_size_t size,
781 resource_size_t align, resource_size_t min,
782 unsigned int type_mask,
783 void (*alignf)(void *, struct resource *,
784 resource_size_t, resource_size_t),
785 void *alignf_data);
786void pci_enable_bridges(struct pci_bus *bus);
787
788
789int __must_check __pci_register_driver(struct pci_driver *, struct module *,
790 const char *mod_name);
791
792
793
794
795#define pci_register_driver(driver) \
796 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
797
798void pci_unregister_driver(struct pci_driver *dev);
799void pci_remove_behind_bridge(struct pci_dev *dev);
800struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
801int pci_add_dynid(struct pci_driver *drv,
802 unsigned int vendor, unsigned int device,
803 unsigned int subvendor, unsigned int subdevice,
804 unsigned int class, unsigned int class_mask,
805 unsigned long driver_data);
806const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
807 struct pci_dev *dev);
808int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
809 int pass);
810
811void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
812 void *userdata);
813int pci_cfg_space_size_ext(struct pci_dev *dev);
814int pci_cfg_space_size(struct pci_dev *dev);
815unsigned char pci_bus_max_busnr(struct pci_bus *bus);
816
817int pci_set_vga_state(struct pci_dev *pdev, bool decode,
818 unsigned int command_bits, bool change_bridge);
819
820
821#include <linux/dmapool.h>
822
823#define pci_pool dma_pool
824#define pci_pool_create(name, pdev, size, align, allocation) \
825 dma_pool_create(name, &pdev->dev, size, align, allocation)
826#define pci_pool_destroy(pool) dma_pool_destroy(pool)
827#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
828#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
829
830enum pci_dma_burst_strategy {
831 PCI_DMA_BURST_INFINITY,
832
833 PCI_DMA_BURST_BOUNDARY,
834
835 PCI_DMA_BURST_MULTIPLE,
836
837};
838
839struct msix_entry {
840 u32 vector;
841 u16 entry;
842};
843
844
845#ifndef CONFIG_PCI_MSI
846static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
847{
848 return -1;
849}
850
851static inline void pci_msi_shutdown(struct pci_dev *dev)
852{ }
853static inline void pci_disable_msi(struct pci_dev *dev)
854{ }
855
856static inline int pci_msix_table_size(struct pci_dev *dev)
857{
858 return 0;
859}
860static inline int pci_enable_msix(struct pci_dev *dev,
861 struct msix_entry *entries, int nvec)
862{
863 return -1;
864}
865
866static inline void pci_msix_shutdown(struct pci_dev *dev)
867{ }
868static inline void pci_disable_msix(struct pci_dev *dev)
869{ }
870
871static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
872{ }
873
874static inline void pci_restore_msi_state(struct pci_dev *dev)
875{ }
876static inline int pci_msi_enabled(void)
877{
878 return 0;
879}
880#else
881extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
882extern void pci_msi_shutdown(struct pci_dev *dev);
883extern void pci_disable_msi(struct pci_dev *dev);
884extern int pci_msix_table_size(struct pci_dev *dev);
885extern int pci_enable_msix(struct pci_dev *dev,
886 struct msix_entry *entries, int nvec);
887extern void pci_msix_shutdown(struct pci_dev *dev);
888extern void pci_disable_msix(struct pci_dev *dev);
889extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
890extern void pci_restore_msi_state(struct pci_dev *dev);
891extern int pci_msi_enabled(void);
892#endif
893
894#ifndef CONFIG_PCIEASPM
895static inline int pcie_aspm_enabled(void)
896{
897 return 0;
898}
899#else
900extern int pcie_aspm_enabled(void);
901#endif
902
903#ifndef CONFIG_PCIE_ECRC
904static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
905{
906 return;
907}
908static inline void pcie_ecrc_get_policy(char *str) {};
909#else
910extern void pcie_set_ecrc_checking(struct pci_dev *dev);
911extern void pcie_ecrc_get_policy(char *str);
912#endif
913
914#define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
915
916#ifdef CONFIG_HT_IRQ
917
918int ht_create_irq(struct pci_dev *dev, int idx);
919void ht_destroy_irq(unsigned int irq);
920#endif
921
922extern void pci_block_user_cfg_access(struct pci_dev *dev);
923extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
924
925
926
927
928
929
930#ifdef CONFIG_PCI_DOMAINS
931extern int pci_domains_supported;
932#else
933enum { pci_domains_supported = 0 };
934static inline int pci_domain_nr(struct pci_bus *bus)
935{
936 return 0;
937}
938
939static inline int pci_proc_domain(struct pci_bus *bus)
940{
941 return 0;
942}
943#endif
944
945#else
946
947
948
949
950
951
952#define _PCI_NOP(o, s, t) \
953 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
954 int where, t val) \
955 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
956
957#define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
958 _PCI_NOP(o, word, u16 x) \
959 _PCI_NOP(o, dword, u32 x)
960_PCI_NOP_ALL(read, *)
961_PCI_NOP_ALL(write,)
962
963static inline struct pci_dev *pci_find_device(unsigned int vendor,
964 unsigned int device,
965 struct pci_dev *from)
966{
967 return NULL;
968}
969
970static inline struct pci_dev *pci_get_device(unsigned int vendor,
971 unsigned int device,
972 struct pci_dev *from)
973{
974 return NULL;
975}
976
977static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
978 unsigned int device,
979 unsigned int ss_vendor,
980 unsigned int ss_device,
981 struct pci_dev *from)
982{
983 return NULL;
984}
985
986static inline struct pci_dev *pci_get_class(unsigned int class,
987 struct pci_dev *from)
988{
989 return NULL;
990}
991
992#define pci_dev_present(ids) (0)
993#define no_pci_devices() (1)
994#define pci_dev_put(dev) do { } while (0)
995
996static inline void pci_set_master(struct pci_dev *dev)
997{ }
998
999static inline int pci_enable_device(struct pci_dev *dev)
1000{
1001 return -EIO;
1002}
1003
1004static inline void pci_disable_device(struct pci_dev *dev)
1005{ }
1006
1007static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1008{
1009 return -EIO;
1010}
1011
1012static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1013{
1014 return -EIO;
1015}
1016
1017static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1018 unsigned int size)
1019{
1020 return -EIO;
1021}
1022
1023static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1024 unsigned long mask)
1025{
1026 return -EIO;
1027}
1028
1029static inline int pci_assign_resource(struct pci_dev *dev, int i)
1030{
1031 return -EBUSY;
1032}
1033
1034static inline int __pci_register_driver(struct pci_driver *drv,
1035 struct module *owner)
1036{
1037 return 0;
1038}
1039
1040static inline int pci_register_driver(struct pci_driver *drv)
1041{
1042 return 0;
1043}
1044
1045static inline void pci_unregister_driver(struct pci_driver *drv)
1046{ }
1047
1048static inline int pci_find_capability(struct pci_dev *dev, int cap)
1049{
1050 return 0;
1051}
1052
1053static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1054 int cap)
1055{
1056 return 0;
1057}
1058
1059static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1060{
1061 return 0;
1062}
1063
1064
1065static inline int pci_save_state(struct pci_dev *dev)
1066{
1067 return 0;
1068}
1069
1070static inline int pci_restore_state(struct pci_dev *dev)
1071{
1072 return 0;
1073}
1074
1075static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1076{
1077 return 0;
1078}
1079
1080static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1081 pm_message_t state)
1082{
1083 return PCI_D0;
1084}
1085
1086static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1087 int enable)
1088{
1089 return 0;
1090}
1091
1092static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1093{
1094 return -EIO;
1095}
1096
1097static inline void pci_release_regions(struct pci_dev *dev)
1098{ }
1099
1100#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1101
1102static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1103{ }
1104
1105static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1106{ }
1107
1108static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1109{ return NULL; }
1110
1111static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1112 unsigned int devfn)
1113{ return NULL; }
1114
1115static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1116 unsigned int devfn)
1117{ return NULL; }
1118
1119#endif
1120
1121
1122
1123#include <asm/pci.h>
1124
1125#ifndef PCIBIOS_MAX_MEM_32
1126#define PCIBIOS_MAX_MEM_32 (-1)
1127#endif
1128
1129
1130
1131#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1132#define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1133#define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1134#define pci_resource_len(dev,bar) \
1135 ((pci_resource_start((dev), (bar)) == 0 && \
1136 pci_resource_end((dev), (bar)) == \
1137 pci_resource_start((dev), (bar))) ? 0 : \
1138 \
1139 (pci_resource_end((dev), (bar)) - \
1140 pci_resource_start((dev), (bar)) + 1))
1141
1142
1143
1144
1145
1146static inline void *pci_get_drvdata(struct pci_dev *pdev)
1147{
1148 return dev_get_drvdata(&pdev->dev);
1149}
1150
1151static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1152{
1153 dev_set_drvdata(&pdev->dev, data);
1154}
1155
1156
1157
1158
1159static inline const char *pci_name(const struct pci_dev *pdev)
1160{
1161 return dev_name(&pdev->dev);
1162}
1163
1164
1165
1166
1167
1168#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1169static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1170 const struct resource *rsrc, resource_size_t *start,
1171 resource_size_t *end)
1172{
1173 *start = rsrc->start;
1174 *end = rsrc->end;
1175}
1176#endif
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186struct pci_fixup {
1187 u16 vendor, device;
1188 void (*hook)(struct pci_dev *dev);
1189};
1190
1191enum pci_fixup_pass {
1192 pci_fixup_early,
1193 pci_fixup_header,
1194 pci_fixup_final,
1195 pci_fixup_enable,
1196 pci_fixup_resume,
1197 pci_fixup_suspend,
1198 pci_fixup_resume_early,
1199};
1200
1201
1202#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1203 static const struct pci_fixup __pci_fixup_##name __used \
1204 __attribute__((__section__(#section))) = { vendor, device, hook };
1205#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1206 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1207 vendor##device##hook, vendor, device, hook)
1208#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1209 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1210 vendor##device##hook, vendor, device, hook)
1211#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1212 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1213 vendor##device##hook, vendor, device, hook)
1214#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1215 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1216 vendor##device##hook, vendor, device, hook)
1217#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1218 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1219 resume##vendor##device##hook, vendor, device, hook)
1220#define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1221 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1222 resume_early##vendor##device##hook, vendor, device, hook)
1223#define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1224 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1225 suspend##vendor##device##hook, vendor, device, hook)
1226
1227
1228void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1229
1230void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1231void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1232void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1233int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1234int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1235 const char *name);
1236void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1237
1238extern int pci_pci_problems;
1239#define PCIPCI_FAIL 1
1240#define PCIPCI_TRITON 2
1241#define PCIPCI_NATOMA 4
1242#define PCIPCI_VIAETBF 8
1243#define PCIPCI_VSFX 16
1244#define PCIPCI_ALIMAGIK 32
1245#define PCIAGP_FAIL 64
1246
1247extern unsigned long pci_cardbus_io_size;
1248extern unsigned long pci_cardbus_mem_size;
1249
1250extern unsigned long pci_hotplug_io_size;
1251extern unsigned long pci_hotplug_mem_size;
1252
1253int pcibios_add_platform_entries(struct pci_dev *dev);
1254void pcibios_disable_device(struct pci_dev *dev);
1255int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1256 enum pcie_reset_state state);
1257
1258#ifdef CONFIG_PCI_MMCONFIG
1259extern void __init pci_mmcfg_early_init(void);
1260extern void __init pci_mmcfg_late_init(void);
1261#else
1262static inline void pci_mmcfg_early_init(void) { }
1263static inline void pci_mmcfg_late_init(void) { }
1264#endif
1265
1266int pci_ext_cfg_avail(struct pci_dev *dev);
1267
1268void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1269
1270#ifdef CONFIG_PCI_IOV
1271extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1272extern void pci_disable_sriov(struct pci_dev *dev);
1273extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1274#else
1275static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1276{
1277 return -ENODEV;
1278}
1279static inline void pci_disable_sriov(struct pci_dev *dev)
1280{
1281}
1282static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1283{
1284 return IRQ_NONE;
1285}
1286#endif
1287
1288#if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1289extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1290extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1291#endif
1292
1293#endif
1294#endif
1295