LXR linux/arch/arm/kernel/fiq.c

   1/*
   2 *  linux/arch/arm/kernel/fiq.c
   3 *
   4 *  Copyright (C) 1998 Russell King
   5 *  Copyright (C) 1998, 1999 Phil Blundell
   6 *
   7 *  FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
   8 *
   9 *  FIQ support re-written by Russell King to be more generic
  10 *
  11 * We now properly support a method by which the FIQ handlers can
  12 * be stacked onto the vector.  We still do not support sharing
  13 * the FIQ vector itself.
  14 *
  15 * Operation is as follows:
  16 *  1. Owner A claims FIQ:
  17 *     - default_fiq relinquishes control.
  18 *  2. Owner A:
  19 *     - inserts code.
  20 *     - sets any registers,
  21 *     - enables FIQ.
  22 *  3. Owner B claims FIQ:
  23 *     - if owner A has a relinquish function.
  24 *       - disable FIQs.
  25 *       - saves any registers.
  26 *       - returns zero.
  27 *  4. Owner B:
  28 *     - inserts code.
  29 *     - sets any registers,
  30 *     - enables FIQ.
  31 *  5. Owner B releases FIQ:
  32 *     - Owner A is asked to reacquire FIQ:
  33 *       - inserts code.
  34 *       - restores saved registers.
  35 *       - enables FIQ.
  36 *  6. Goto 3
  37 */
  38#include <linux/module.h>
  39#include <linux/kernel.h>
  40#include <linux/init.h>
  41#include <linux/interrupt.h>
  42#include <linux/seq_file.h>
  43
  44#include <asm/cacheflush.h>
  45#include <asm/fiq.h>
  46#include <asm/irq.h>
  47#include <asm/system.h>
  48#include <asm/traps.h>
  49
  50static unsigned long no_fiq_insn;
  51
  52/* Default reacquire function
  53 * - we always relinquish FIQ control
  54 * - we always reacquire FIQ control
  55 */
  56static int fiq_def_op(void *ref, int relinquish)
  57{
  58        if (!relinquish)
  59                set_fiq_handler(&no_fiq_insn, sizeof(no_fiq_insn));
  60
  61        return 0;
  62}
  63
  64static struct fiq_handler default_owner = {
  65        .name   = "default",
  66        .fiq_op = fiq_def_op,
  67};
  68
  69static struct fiq_handler *current_fiq = &default_owner;
  70
  71int show_fiq_list(struct seq_file *p, int prec)
  72{
  73        if (current_fiq != &default_owner)
  74                seq_printf(p, "%*s:              %s\n", prec, "FIQ",
  75                        current_fiq->name);
  76
  77        return 0;
  78}
  79
  80void set_fiq_handler(void *start, unsigned int length)
  81{
  82#if defined(CONFIG_CPU_USE_DOMAINS)
  83        memcpy((void *)0xffff001c, start, length);
  84#else
  85        memcpy(vectors_page + 0x1c, start, length);
  86#endif
  87        flush_icache_range(0xffff001c, 0xffff001c + length);
  88        if (!vectors_high())
  89                flush_icache_range(0x1c, 0x1c + length);
  90}
  91
  92/*
  93 * Taking an interrupt in FIQ mode is death, so both these functions
  94 * disable irqs for the duration.  Note - these functions are almost
  95 * entirely coded in assembly.
  96 */
  97void __naked set_fiq_regs(struct pt_regs *regs)
  98{
  99        register unsigned long tmp;
 100        asm volatile (
 101        "mov    ip, sp\n\
 102        stmfd   sp!, {fp, ip, lr, pc}\n\
 103        sub     fp, ip, #4\n\
 104        mrs     %0, cpsr\n\
 105        msr     cpsr_c, %2      @ select FIQ mode\n\
 106        mov     r0, r0\n\
 107        ldmia   %1, {r8 - r14}\n\
 108        msr     cpsr_c, %0      @ return to SVC mode\n\
 109        mov     r0, r0\n\
 110        ldmfd   sp, {fp, sp, pc}"
 111        : "=&r" (tmp)
 112        : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
 113}
 114
 115void __naked get_fiq_regs(struct pt_regs *regs)
 116{
 117        register unsigned long tmp;
 118        asm volatile (
 119        "mov    ip, sp\n\
 120        stmfd   sp!, {fp, ip, lr, pc}\n\
 121        sub     fp, ip, #4\n\
 122        mrs     %0, cpsr\n\
 123        msr     cpsr_c, %2      @ select FIQ mode\n\
 124        mov     r0, r0\n\
 125        stmia   %1, {r8 - r14}\n\
 126        msr     cpsr_c, %0      @ return to SVC mode\n\
 127        mov     r0, r0\n\
 128        ldmfd   sp, {fp, sp, pc}"
 129        : "=&r" (tmp)
 130        : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
 131}
 132
 133int claim_fiq(struct fiq_handler *f)
 134{
 135        int ret = 0;
 136
 137        if (current_fiq) {
 138                ret = -EBUSY;
 139
 140                if (current_fiq->fiq_op != NULL)
 141                        ret = current_fiq->fiq_op(current_fiq->dev_id, 1);
 142        }
 143
 144        if (!ret) {
 145                f->next = current_fiq;
 146                current_fiq = f;
 147        }
 148
 149        return ret;
 150}
 151
 152void release_fiq(struct fiq_handler *f)
 153{
 154        if (current_fiq != f) {
 155                printk(KERN_ERR "%s FIQ trying to release %s FIQ\n",
 156                       f->name, current_fiq->name);
 157                dump_stack();
 158                return;
 159        }
 160
 161        do
 162                current_fiq = current_fiq->next;
 163        while (current_fiq->fiq_op(current_fiq->dev_id, 0));
 164}
 165
 166void enable_fiq(int fiq)
 167{
 168        enable_irq(fiq + FIQ_START);
 169}
 170
 171void disable_fiq(int fiq)
 172{
 173        disable_irq(fiq + FIQ_START);
 174}
 175
 176EXPORT_SYMBOL(set_fiq_handler);
 177EXPORT_SYMBOL(set_fiq_regs);
 178EXPORT_SYMBOL(get_fiq_regs);
 179EXPORT_SYMBOL(claim_fiq);
 180EXPORT_SYMBOL(release_fiq);
 181EXPORT_SYMBOL(enable_fiq);
 182EXPORT_SYMBOL(disable_fiq);
 183
 184void __init init_FIQ(void)
 185{
 186        no_fiq_insn = *(unsigned long *)0xffff001c;
 187}
 188