linux/arch/arm/mach-davinci/include/mach/da8xx.h
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   1/*
   2 * Chip specific defines for DA8XX/OMAP L1XX SoC
   3 *
   4 * Author: Mark A. Greer <mgreer@mvista.com>
   5 *
   6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
   7 * the terms of the GNU General Public License version 2. This program
   8 * is licensed "as is" without any warranty of any kind, whether express
   9 * or implied.
  10 */
  11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
  12#define __ASM_ARCH_DAVINCI_DA8XX_H
  13
  14#include <video/da8xx-fb.h>
  15
  16#include <linux/platform_device.h>
  17#include <linux/davinci_emac.h>
  18
  19#include <mach/serial.h>
  20#include <mach/edma.h>
  21#include <mach/i2c.h>
  22#include <mach/asp.h>
  23#include <mach/mmc.h>
  24#include <mach/usb.h>
  25#include <mach/pm.h>
  26
  27extern void __iomem *da8xx_syscfg0_base;
  28extern void __iomem *da8xx_syscfg1_base;
  29
  30/*
  31 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
  32 * (than the regular 300Mhz variant), the board code should set this up
  33 * with the supported speed before calling da850_register_cpufreq().
  34 */
  35extern unsigned int da850_max_speed;
  36
  37/*
  38 * The cp_intc interrupt controller for the da8xx isn't in the same
  39 * chunk of physical memory space as the other registers (like it is
  40 * on the davincis) so it needs to be mapped separately.  It will be
  41 * mapped early on when the I/O space is mapped and we'll put it just
  42 * before the I/O space in the processor's virtual memory space.
  43 */
  44#define DA8XX_CP_INTC_BASE      0xfffee000
  45#define DA8XX_CP_INTC_SIZE      SZ_8K
  46#define DA8XX_CP_INTC_VIRT      (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
  47
  48#define DA8XX_SYSCFG0_BASE      (IO_PHYS + 0x14000)
  49#define DA8XX_SYSCFG0_VIRT(x)   (da8xx_syscfg0_base + (x))
  50#define DA8XX_JTAG_ID_REG       0x18
  51#define DA8XX_CFGCHIP0_REG      0x17c
  52#define DA8XX_CFGCHIP2_REG      0x184
  53#define DA8XX_CFGCHIP3_REG      0x188
  54
  55#define DA8XX_SYSCFG1_BASE      (IO_PHYS + 0x22C000)
  56#define DA8XX_SYSCFG1_VIRT(x)   (da8xx_syscfg1_base + (x))
  57#define DA8XX_DEEPSLEEP_REG     0x8
  58
  59#define DA8XX_PSC0_BASE         0x01c10000
  60#define DA8XX_PLL0_BASE         0x01c11000
  61#define DA8XX_TIMER64P0_BASE    0x01c20000
  62#define DA8XX_TIMER64P1_BASE    0x01c21000
  63#define DA8XX_GPIO_BASE         0x01e26000
  64#define DA8XX_PSC1_BASE         0x01e27000
  65#define DA8XX_LCD_CNTRL_BASE    0x01e13000
  66#define DA8XX_PLL1_BASE         0x01e1a000
  67#define DA8XX_MMCSD0_BASE       0x01c40000
  68#define DA8XX_AEMIF_CS2_BASE    0x60000000
  69#define DA8XX_AEMIF_CS3_BASE    0x62000000
  70#define DA8XX_AEMIF_CTL_BASE    0x68000000
  71#define DA8XX_DDR2_CTL_BASE     0xb0000000
  72#define DA8XX_ARM_RAM_BASE      0xffff0000
  73
  74void __init da830_init(void);
  75void __init da850_init(void);
  76
  77int da830_register_edma(struct edma_rsv_info *rsv);
  78int da850_register_edma(struct edma_rsv_info *rsv[2]);
  79int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
  80int da8xx_register_watchdog(void);
  81int da8xx_register_usb20(unsigned mA, unsigned potpgt);
  82int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
  83int da8xx_register_emac(void);
  84int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
  85int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
  86int da850_register_mmcsd1(struct davinci_mmc_config *config);
  87void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
  88int da8xx_register_rtc(void);
  89int da850_register_cpufreq(char *async_clk);
  90int da8xx_register_cpuidle(void);
  91void __iomem * __init da8xx_get_mem_ctlr(void);
  92int da850_register_pm(struct platform_device *pdev);
  93
  94extern struct platform_device da8xx_serial_device;
  95extern struct emac_platform_data da8xx_emac_pdata;
  96extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
  97extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
  98
  99extern struct platform_device da8xx_wdt_device;
 100
 101extern const short da830_emif25_pins[];
 102extern const short da830_spi0_pins[];
 103extern const short da830_spi1_pins[];
 104extern const short da830_mmc_sd_pins[];
 105extern const short da830_uart0_pins[];
 106extern const short da830_uart1_pins[];
 107extern const short da830_uart2_pins[];
 108extern const short da830_usb20_pins[];
 109extern const short da830_usb11_pins[];
 110extern const short da830_uhpi_pins[];
 111extern const short da830_cpgmac_pins[];
 112extern const short da830_emif3c_pins[];
 113extern const short da830_mcasp0_pins[];
 114extern const short da830_mcasp1_pins[];
 115extern const short da830_mcasp2_pins[];
 116extern const short da830_i2c0_pins[];
 117extern const short da830_i2c1_pins[];
 118extern const short da830_lcdcntl_pins[];
 119extern const short da830_pwm_pins[];
 120extern const short da830_ecap0_pins[];
 121extern const short da830_ecap1_pins[];
 122extern const short da830_ecap2_pins[];
 123extern const short da830_eqep0_pins[];
 124extern const short da830_eqep1_pins[];
 125
 126extern const short da850_uart0_pins[];
 127extern const short da850_uart1_pins[];
 128extern const short da850_uart2_pins[];
 129extern const short da850_i2c0_pins[];
 130extern const short da850_i2c1_pins[];
 131extern const short da850_cpgmac_pins[];
 132extern const short da850_mcasp_pins[];
 133extern const short da850_lcdcntl_pins[];
 134extern const short da850_mmcsd0_pins[];
 135extern const short da850_emif25_pins[];
 136
 137#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
 138