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11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H
13
14#include <linux/err.h>
15
16#include "powerdomain.h"
17
18extern void *omap3_secure_ram_storage;
19extern void omap3_pm_off_mode_enable(int);
20extern void omap_sram_idle(void);
21extern int omap3_can_sleep(void);
22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
23extern int omap3_idle_init(void);
24
25#if defined(CONFIG_PM_OPP)
26extern int omap3_opp_init(void);
27extern int omap4_opp_init(void);
28#else
29static inline int omap3_opp_init(void)
30{
31 return -EINVAL;
32}
33static inline int omap4_opp_init(void)
34{
35 return -EINVAL;
36}
37#endif
38
39struct cpuidle_params {
40 u8 valid;
41 u32 sleep_latency;
42 u32 wake_latency;
43 u32 threshold;
44};
45
46#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
47extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
48#else
49static
50inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
51{
52}
53#endif
54
55extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
56extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
57
58extern u32 wakeup_timer_seconds;
59extern u32 wakeup_timer_milliseconds;
60extern struct omap_dm_timer *gptimer_wakeup;
61
62#ifdef CONFIG_PM_DEBUG
63extern void omap2_pm_dump(int mode, int resume, unsigned int us);
64extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
65extern int omap2_pm_debug;
66extern u32 enable_off_mode;
67extern u32 sleep_while_idle;
68#else
69#define omap2_pm_dump(mode, resume, us) do {} while (0);
70#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
71#define omap2_pm_debug 0
72#define enable_off_mode 0
73#define sleep_while_idle 0
74#endif
75
76#if defined(CONFIG_CPU_IDLE)
77extern void omap3_cpuidle_update_states(u32, u32);
78#endif
79
80#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
81extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
82extern int pm_dbg_regset_save(int reg_set);
83extern int pm_dbg_regset_init(int reg_set);
84#else
85#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
86#define pm_dbg_regset_save(reg_set) do {} while (0);
87#define pm_dbg_regset_init(reg_set) do {} while (0);
88#endif
89
90extern void omap24xx_idle_loop_suspend(void);
91
92extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
93 void __iomem *sdrc_power);
94extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
95extern void save_secure_ram_context(u32 *addr);
96extern void omap3_save_scratchpad_contents(void);
97
98extern unsigned int omap24xx_idle_loop_suspend_sz;
99extern unsigned int save_secure_ram_context_sz;
100extern unsigned int omap24xx_cpu_suspend_sz;
101extern unsigned int omap34xx_cpu_suspend_sz;
102
103#define PM_RTA_ERRATUM_i608 (1 << 0)
104#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
105
106#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
107extern u16 pm34xx_errata;
108#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
109extern void enable_omap3630_toggle_l2_on_restore(void);
110#else
111#define IS_PM34XX_ERRATUM(id) 0
112static inline void enable_omap3630_toggle_l2_on_restore(void) { }
113#endif
114
115#ifdef CONFIG_OMAP_SMARTREFLEX
116extern int omap_devinit_smartreflex(void);
117extern void omap_enable_smartreflex_on_init(void);
118#else
119static inline int omap_devinit_smartreflex(void)
120{
121 return -EINVAL;
122}
123
124static inline void omap_enable_smartreflex_on_init(void) {}
125#endif
126
127#ifdef CONFIG_TWL4030_CORE
128extern int omap3_twl_init(void);
129extern int omap4_twl_init(void);
130#else
131static inline int omap3_twl_init(void)
132{
133 return -EINVAL;
134}
135static inline int omap4_twl_init(void)
136{
137 return -EINVAL;
138}
139#endif
140
141#endif
142