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16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
23#include <linux/ioport.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h>
26#include <linux/pwm_backlight.h>
27
28#include <asm/types.h>
29#include <asm/setup.h>
30#include <asm/memory.h>
31#include <asm/mach-types.h>
32#include <mach/hardware.h>
33#include <asm/irq.h>
34#include <asm/sizes.h>
35
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/irq.h>
39#include <asm/mach/flash.h>
40
41#include <mach/pxa27x.h>
42#include <mach/gpio.h>
43#include <mach/lpd270.h>
44#include <mach/audio.h>
45#include <mach/pxafb.h>
46#include <mach/mmc.h>
47#include <mach/irda.h>
48#include <mach/ohci.h>
49#include <mach/smemc.h>
50
51#include "generic.h"
52#include "devices.h"
53
54static unsigned long lpd270_pin_config[] __initdata = {
55
56 GPIO15_nCS_1,
57 GPIO78_nCS_2,
58
59
60 GPIO58_LCD_LDD_0,
61 GPIO59_LCD_LDD_1,
62 GPIO60_LCD_LDD_2,
63 GPIO61_LCD_LDD_3,
64 GPIO62_LCD_LDD_4,
65 GPIO63_LCD_LDD_5,
66 GPIO64_LCD_LDD_6,
67 GPIO65_LCD_LDD_7,
68 GPIO66_LCD_LDD_8,
69 GPIO67_LCD_LDD_9,
70 GPIO68_LCD_LDD_10,
71 GPIO69_LCD_LDD_11,
72 GPIO70_LCD_LDD_12,
73 GPIO71_LCD_LDD_13,
74 GPIO72_LCD_LDD_14,
75 GPIO73_LCD_LDD_15,
76 GPIO74_LCD_FCLK,
77 GPIO75_LCD_LCLK,
78 GPIO76_LCD_PCLK,
79 GPIO77_LCD_BIAS,
80 GPIO16_PWM0_OUT,
81
82
83 GPIO88_USBH1_PWR,
84 GPIO89_USBH1_PEN,
85
86
87 GPIO28_AC97_BITCLK,
88 GPIO29_AC97_SDATA_IN_0,
89 GPIO30_AC97_SDATA_OUT,
90 GPIO31_AC97_SYNC,
91 GPIO45_AC97_SYSCLK,
92
93 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
94};
95
96static unsigned int lpd270_irq_enabled;
97
98static void lpd270_mask_irq(struct irq_data *d)
99{
100 int lpd270_irq = d->irq - LPD270_IRQ(0);
101
102 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
103
104 lpd270_irq_enabled &= ~(1 << lpd270_irq);
105 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
106}
107
108static void lpd270_unmask_irq(struct irq_data *d)
109{
110 int lpd270_irq = d->irq - LPD270_IRQ(0);
111
112 lpd270_irq_enabled |= 1 << lpd270_irq;
113 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
114}
115
116static struct irq_chip lpd270_irq_chip = {
117 .name = "CPLD",
118 .irq_ack = lpd270_mask_irq,
119 .irq_mask = lpd270_mask_irq,
120 .irq_unmask = lpd270_unmask_irq,
121};
122
123static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
124{
125 unsigned long pending;
126
127 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
128 do {
129
130 desc->irq_data.chip->irq_ack(&desc->irq_data);
131 if (likely(pending)) {
132 irq = LPD270_IRQ(0) + __ffs(pending);
133 generic_handle_irq(irq);
134
135 pending = __raw_readw(LPD270_INT_STATUS) &
136 lpd270_irq_enabled;
137 }
138 } while (pending);
139}
140
141static void __init lpd270_init_irq(void)
142{
143 int irq;
144
145 pxa27x_init_irq();
146
147 __raw_writew(0, LPD270_INT_MASK);
148 __raw_writew(0, LPD270_INT_STATUS);
149
150
151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
152 set_irq_chip(irq, &lpd270_irq_chip);
153 set_irq_handler(irq, handle_level_irq);
154 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
155 }
156 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
157 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
158}
159
160
161#ifdef CONFIG_PM
162static int lpd270_irq_resume(struct sys_device *dev)
163{
164 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
165 return 0;
166}
167
168static struct sysdev_class lpd270_irq_sysclass = {
169 .name = "cpld_irq",
170 .resume = lpd270_irq_resume,
171};
172
173static struct sys_device lpd270_irq_device = {
174 .cls = &lpd270_irq_sysclass,
175};
176
177static int __init lpd270_irq_device_init(void)
178{
179 int ret = -ENODEV;
180 if (machine_is_logicpd_pxa270()) {
181 ret = sysdev_class_register(&lpd270_irq_sysclass);
182 if (ret == 0)
183 ret = sysdev_register(&lpd270_irq_device);
184 }
185 return ret;
186}
187
188device_initcall(lpd270_irq_device_init);
189#endif
190
191
192static struct resource smc91x_resources[] = {
193 [0] = {
194 .start = LPD270_ETH_PHYS,
195 .end = (LPD270_ETH_PHYS + 0xfffff),
196 .flags = IORESOURCE_MEM,
197 },
198 [1] = {
199 .start = LPD270_ETHERNET_IRQ,
200 .end = LPD270_ETHERNET_IRQ,
201 .flags = IORESOURCE_IRQ,
202 },
203};
204
205static struct platform_device smc91x_device = {
206 .name = "smc91x",
207 .id = 0,
208 .num_resources = ARRAY_SIZE(smc91x_resources),
209 .resource = smc91x_resources,
210};
211
212static struct resource lpd270_flash_resources[] = {
213 [0] = {
214 .start = PXA_CS0_PHYS,
215 .end = PXA_CS0_PHYS + SZ_64M - 1,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = PXA_CS1_PHYS,
220 .end = PXA_CS1_PHYS + SZ_64M - 1,
221 .flags = IORESOURCE_MEM,
222 },
223};
224
225static struct mtd_partition lpd270_flash0_partitions[] = {
226 {
227 .name = "Bootloader",
228 .size = 0x00040000,
229 .offset = 0,
230 .mask_flags = MTD_WRITEABLE
231 }, {
232 .name = "Kernel",
233 .size = 0x00400000,
234 .offset = 0x00040000,
235 }, {
236 .name = "Filesystem",
237 .size = MTDPART_SIZ_FULL,
238 .offset = 0x00440000
239 },
240};
241
242static struct flash_platform_data lpd270_flash_data[2] = {
243 {
244 .name = "processor-flash",
245 .map_name = "cfi_probe",
246 .parts = lpd270_flash0_partitions,
247 .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
248 }, {
249 .name = "mainboard-flash",
250 .map_name = "cfi_probe",
251 .parts = NULL,
252 .nr_parts = 0,
253 }
254};
255
256static struct platform_device lpd270_flash_device[2] = {
257 {
258 .name = "pxa2xx-flash",
259 .id = 0,
260 .dev = {
261 .platform_data = &lpd270_flash_data[0],
262 },
263 .resource = &lpd270_flash_resources[0],
264 .num_resources = 1,
265 }, {
266 .name = "pxa2xx-flash",
267 .id = 1,
268 .dev = {
269 .platform_data = &lpd270_flash_data[1],
270 },
271 .resource = &lpd270_flash_resources[1],
272 .num_resources = 1,
273 },
274};
275
276static struct platform_pwm_backlight_data lpd270_backlight_data = {
277 .pwm_id = 0,
278 .max_brightness = 1,
279 .dft_brightness = 1,
280 .pwm_period_ns = 78770,
281};
282
283static struct platform_device lpd270_backlight_device = {
284 .name = "pwm-backlight",
285 .dev = {
286 .parent = &pxa27x_device_pwm0.dev,
287 .platform_data = &lpd270_backlight_data,
288 },
289};
290
291
292static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
293 .pixclock = 150000,
294 .xres = 320,
295 .yres = 240,
296 .bpp = 16,
297 .hsync_len = 0x14,
298 .left_margin = 0x28,
299 .right_margin = 0x0a,
300 .vsync_len = 0x02,
301 .upper_margin = 0x08,
302 .lower_margin = 0x14,
303 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
304};
305
306static struct pxafb_mach_info sharp_lq057q3dc02 = {
307 .modes = &sharp_lq057q3dc02_mode,
308 .num_modes = 1,
309 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
310 LCD_ALTERNATE_MAPPING,
311};
312
313
314static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
315 .pixclock = 50000,
316 .xres = 800,
317 .yres = 600,
318 .bpp = 16,
319 .hsync_len = 0x05,
320 .left_margin = 0x52,
321 .right_margin = 0x05,
322 .vsync_len = 0x04,
323 .upper_margin = 0x14,
324 .lower_margin = 0x0a,
325 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
326};
327
328static struct pxafb_mach_info sharp_lq121s1dg31 = {
329 .modes = &sharp_lq121s1dg31_mode,
330 .num_modes = 1,
331 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
332 LCD_ALTERNATE_MAPPING,
333};
334
335
336static struct pxafb_mode_info sharp_lq036q1da01_mode = {
337 .pixclock = 150000,
338 .xres = 320,
339 .yres = 240,
340 .bpp = 16,
341 .hsync_len = 0x0e,
342 .left_margin = 0x04,
343 .right_margin = 0x0a,
344 .vsync_len = 0x03,
345 .upper_margin = 0x03,
346 .lower_margin = 0x03,
347 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
348};
349
350static struct pxafb_mach_info sharp_lq036q1da01 = {
351 .modes = &sharp_lq036q1da01_mode,
352 .num_modes = 1,
353 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
354 LCD_ALTERNATE_MAPPING,
355};
356
357
358static struct pxafb_mode_info sharp_lq64d343_mode = {
359 .pixclock = 25000,
360 .xres = 640,
361 .yres = 480,
362 .bpp = 16,
363 .hsync_len = 0x31,
364 .left_margin = 0x89,
365 .right_margin = 0x19,
366 .vsync_len = 0x12,
367 .upper_margin = 0x22,
368 .lower_margin = 0x00,
369 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
370};
371
372static struct pxafb_mach_info sharp_lq64d343 = {
373 .modes = &sharp_lq64d343_mode,
374 .num_modes = 1,
375 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
376 LCD_ALTERNATE_MAPPING,
377};
378
379
380static struct pxafb_mode_info sharp_lq10d368_mode = {
381 .pixclock = 25000,
382 .xres = 640,
383 .yres = 480,
384 .bpp = 16,
385 .hsync_len = 0x31,
386 .left_margin = 0x89,
387 .right_margin = 0x19,
388 .vsync_len = 0x12,
389 .upper_margin = 0x22,
390 .lower_margin = 0x00,
391 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
392};
393
394static struct pxafb_mach_info sharp_lq10d368 = {
395 .modes = &sharp_lq10d368_mode,
396 .num_modes = 1,
397 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
398 LCD_ALTERNATE_MAPPING,
399};
400
401
402static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
403 .pixclock = 150000,
404 .xres = 240,
405 .yres = 320,
406 .bpp = 16,
407 .hsync_len = 0x0e,
408 .left_margin = 0x0a,
409 .right_margin = 0x0a,
410 .vsync_len = 0x03,
411 .upper_margin = 0x05,
412 .lower_margin = 0x14,
413 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
414};
415
416static struct pxafb_mach_info sharp_lq035q7db02_20 = {
417 .modes = &sharp_lq035q7db02_20_mode,
418 .num_modes = 1,
419 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
420 LCD_ALTERNATE_MAPPING,
421};
422
423static struct pxafb_mach_info *lpd270_lcd_to_use;
424
425static int __init lpd270_set_lcd(char *str)
426{
427 if (!strnicmp(str, "lq057q3dc02", 11)) {
428 lpd270_lcd_to_use = &sharp_lq057q3dc02;
429 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
430 lpd270_lcd_to_use = &sharp_lq121s1dg31;
431 } else if (!strnicmp(str, "lq036q1da01", 11)) {
432 lpd270_lcd_to_use = &sharp_lq036q1da01;
433 } else if (!strnicmp(str, "lq64d343", 8)) {
434 lpd270_lcd_to_use = &sharp_lq64d343;
435 } else if (!strnicmp(str, "lq10d368", 8)) {
436 lpd270_lcd_to_use = &sharp_lq10d368;
437 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
438 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
439 } else {
440 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
441 }
442
443 return 1;
444}
445
446__setup("lcd=", lpd270_set_lcd);
447
448static struct platform_device *platform_devices[] __initdata = {
449 &smc91x_device,
450 &lpd270_backlight_device,
451 &lpd270_flash_device[0],
452 &lpd270_flash_device[1],
453};
454
455static struct pxaohci_platform_data lpd270_ohci_platform_data = {
456 .port_mode = PMM_PERPORT_MODE,
457 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
458};
459
460static void __init lpd270_init(void)
461{
462 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
463
464 pxa_set_ffuart_info(NULL);
465 pxa_set_btuart_info(NULL);
466 pxa_set_stuart_info(NULL);
467
468 lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
469 lpd270_flash_data[1].width = 4;
470
471
472
473
474
475
476 ARB_CNTRL = ARB_CORE_PARK | 0x234;
477
478 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
479
480 pxa_set_ac97_info(NULL);
481
482 if (lpd270_lcd_to_use != NULL)
483 set_pxa_fb_info(lpd270_lcd_to_use);
484
485 pxa_set_ohci_info(&lpd270_ohci_platform_data);
486}
487
488
489static struct map_desc lpd270_io_desc[] __initdata = {
490 {
491 .virtual = LPD270_CPLD_VIRT,
492 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
493 .length = LPD270_CPLD_SIZE,
494 .type = MT_DEVICE,
495 },
496};
497
498static void __init lpd270_map_io(void)
499{
500 pxa27x_map_io();
501 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
502
503
504 PSLR |= 0x00000F04;
505 PCFR = 0x00000066;
506}
507
508MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
509
510 .boot_params = 0xa0000100,
511 .map_io = lpd270_map_io,
512 .nr_irqs = LPD270_NR_IRQS,
513 .init_irq = lpd270_init_irq,
514 .timer = &pxa_timer,
515 .init_machine = lpd270_init,
516MACHINE_END
517
