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15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/fb.h>
18#include <linux/gpio.h>
19#include <linux/kernel.h>
20#include <linux/list.h>
21#include <linux/dm9000.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h>
24#include <linux/platform_device.h>
25#include <linux/serial_core.h>
26#include <linux/types.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31
32#include <mach/map.h>
33#include <mach/regs-fb.h>
34#include <mach/regs-gpio.h>
35#include <mach/regs-modem.h>
36#include <mach/regs-srom.h>
37#include <mach/s3c6410.h>
38
39#include <plat/adc.h>
40#include <plat/cpu.h>
41#include <plat/devs.h>
42#include <plat/fb.h>
43#include <plat/nand.h>
44#include <plat/regs-serial.h>
45#include <plat/ts.h>
46
47#include <video/platform_lcd.h>
48
49#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
52
53static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
54 [0] = {
55 .hwport = 0,
56 .flags = 0,
57 .ucon = UCON,
58 .ulcon = ULCON,
59 .ufcon = UFCON,
60 },
61 [1] = {
62 .hwport = 1,
63 .flags = 0,
64 .ucon = UCON,
65 .ulcon = ULCON,
66 .ufcon = UFCON,
67 },
68 [2] = {
69 .hwport = 2,
70 .flags = 0,
71 .ucon = UCON,
72 .ulcon = ULCON,
73 .ufcon = UFCON,
74 },
75 [3] = {
76 .hwport = 3,
77 .flags = 0,
78 .ucon = UCON,
79 .ulcon = ULCON,
80 .ufcon = UFCON,
81 },
82};
83
84
85
86static struct resource real6410_dm9k_resource[] = {
87 [0] = {
88 .start = S3C64XX_PA_XM0CSN1,
89 .end = S3C64XX_PA_XM0CSN1 + 1,
90 .flags = IORESOURCE_MEM
91 },
92 [1] = {
93 .start = S3C64XX_PA_XM0CSN1 + 4,
94 .end = S3C64XX_PA_XM0CSN1 + 5,
95 .flags = IORESOURCE_MEM
96 },
97 [2] = {
98 .start = S3C_EINT(7),
99 .end = S3C_EINT(7),
100 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
101 }
102};
103
104static struct dm9000_plat_data real6410_dm9k_pdata = {
105 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
106};
107
108static struct platform_device real6410_device_eth = {
109 .name = "dm9000",
110 .id = -1,
111 .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
112 .resource = real6410_dm9k_resource,
113 .dev = {
114 .platform_data = &real6410_dm9k_pdata,
115 },
116};
117
118static struct s3c_fb_pd_win real6410_fb_win[] = {
119 {
120 .win_mode = {
121 .left_margin = 3,
122 .right_margin = 2,
123 .upper_margin = 1,
124 .lower_margin = 1,
125 .hsync_len = 40,
126 .vsync_len = 1,
127 .xres = 480,
128 .yres = 272,
129 },
130 .max_bpp = 32,
131 .default_bpp = 16,
132 }, {
133 .win_mode = {
134 .left_margin = 8,
135 .right_margin = 13,
136 .upper_margin = 7,
137 .lower_margin = 5,
138 .hsync_len = 3,
139 .vsync_len = 1,
140 .xres = 800,
141 .yres = 480,
142 },
143 .max_bpp = 32,
144 .default_bpp = 16,
145 },
146};
147
148static struct s3c_fb_platdata real6410_lcd_pdata __initdata = {
149 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
150 .win[0] = &real6410_fb_win[0],
151 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
152 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
153};
154
155static struct mtd_partition real6410_nand_part[] = {
156 [0] = {
157 .name = "uboot",
158 .size = SZ_1M,
159 .offset = 0,
160 },
161 [1] = {
162 .name = "kernel",
163 .size = SZ_2M,
164 .offset = SZ_1M,
165 },
166 [2] = {
167 .name = "rootfs",
168 .size = MTDPART_SIZ_FULL,
169 .offset = SZ_1M + SZ_2M,
170 },
171};
172
173static struct s3c2410_nand_set real6410_nand_sets[] = {
174 [0] = {
175 .name = "nand",
176 .nr_chips = 1,
177 .nr_partitions = ARRAY_SIZE(real6410_nand_part),
178 .partitions = real6410_nand_part,
179 },
180};
181
182static struct s3c2410_platform_nand real6410_nand_info = {
183 .tacls = 25,
184 .twrph0 = 55,
185 .twrph1 = 40,
186 .nr_sets = ARRAY_SIZE(real6410_nand_sets),
187 .sets = real6410_nand_sets,
188};
189
190static struct platform_device *real6410_devices[] __initdata = {
191 &real6410_device_eth,
192 &s3c_device_hsmmc0,
193 &s3c_device_hsmmc1,
194 &s3c_device_fb,
195 &s3c_device_nand,
196 &s3c_device_adc,
197 &s3c_device_ts,
198 &s3c_device_ohci,
199};
200
201static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
202 .delay = 10000,
203 .presc = 49,
204 .oversampling_shift = 2,
205};
206
207static void __init real6410_map_io(void)
208{
209 u32 tmp;
210
211 s3c64xx_init_io(NULL, 0);
212 s3c24xx_init_clocks(12000000);
213 s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
214
215
216 tmp = __raw_readl(S3C64XX_SPCON);
217 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
218 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
219 __raw_writel(tmp, S3C64XX_SPCON);
220
221
222 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
223 tmp &= ~MIFPCON_LCD_BYPASS;
224 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
225}
226
227
228
229
230
231
232
233static char real6410_features_str[12] __initdata = "0";
234
235static int __init real6410_features_setup(char *str)
236{
237 if (str)
238 strlcpy(real6410_features_str, str,
239 sizeof(real6410_features_str));
240 return 1;
241}
242
243__setup("real6410=", real6410_features_setup);
244
245#define FEATURE_SCREEN (1 << 0)
246
247struct real6410_features_t {
248 int done;
249 int lcd_index;
250};
251
252static void real6410_parse_features(
253 struct real6410_features_t *features,
254 const char *features_str)
255{
256 const char *fp = features_str;
257
258 features->done = 0;
259 features->lcd_index = 0;
260
261 while (*fp) {
262 char f = *fp++;
263
264 switch (f) {
265 case '0'...'9':
266 if (features->done & FEATURE_SCREEN) {
267 printk(KERN_INFO "REAL6410: '%c' ignored, "
268 "screen type already set\n", f);
269 } else {
270 int li = f - '0';
271 if (li >= ARRAY_SIZE(real6410_fb_win))
272 printk(KERN_INFO "REAL6410: '%c' out "
273 "of range LCD mode\n", f);
274 else {
275 features->lcd_index = li;
276 }
277 }
278 features->done |= FEATURE_SCREEN;
279 break;
280 }
281 }
282}
283
284static void __init real6410_machine_init(void)
285{
286 u32 cs1;
287 struct real6410_features_t features = { 0 };
288
289 printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
290 real6410_features_str);
291
292
293 real6410_parse_features(&features, real6410_features_str);
294
295 real6410_lcd_pdata.win[0] = &real6410_fb_win[features.lcd_index];
296
297 printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
298 real6410_lcd_pdata.win[0]->win_mode.xres,
299 real6410_lcd_pdata.win[0]->win_mode.yres);
300
301 s3c_fb_set_platdata(&real6410_lcd_pdata);
302 s3c_nand_set_platdata(&real6410_nand_info);
303 s3c24xx_ts_set_platdata(&s3c_ts_platform);
304
305
306
307 cs1 = __raw_readl(S3C64XX_SROM_BW) &
308 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
309 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
310 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
311 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
312 S3C64XX_SROM_BW__NCS1__SHIFT;
313 __raw_writel(cs1, S3C64XX_SROM_BW);
314
315
316
317 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
318 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
319 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
320 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
321 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
322 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
323 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
324
325 gpio_request(S3C64XX_GPF(15), "LCD power");
326
327 platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
328}
329
330MACHINE_START(REAL6410, "REAL6410")
331
332 .boot_params = S3C64XX_PA_SDRAM + 0x100,
333
334 .init_irq = s3c6410_init_irq,
335 .map_io = real6410_map_io,
336 .init_machine = real6410_machine_init,
337 .timer = &s3c24xx_timer,
338MACHINE_END
339
