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9#include <mach/hardware.h>
10#include <mach/devices-common.h>
11
12#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
13 [_id] = { \
14 .id = _id, \
15 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
16 .iosize = _size, \
17 .irqrx = soc ## _INT_UART ## _hwid ## RX, \
18 .irqtx = soc ## _INT_UART ## _hwid ## TX, \
19 .irqrts = soc ## _INT_UART ## _hwid ## RTS, \
20 }
21
22#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \
23 [_id] = { \
24 .id = _id, \
25 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
26 .iosize = _size, \
27 .irq = soc ## _INT_UART ## _hwid, \
28 }
29
30#ifdef CONFIG_SOC_IMX1
31const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst = {
32#define imx1_imx_uart_data_entry(_id, _hwid) \
33 imx_imx_uart_3irq_data_entry(MX1, _id, _hwid, 0xd0)
34 imx1_imx_uart_data_entry(0, 1),
35 imx1_imx_uart_data_entry(1, 2),
36};
37#endif
38
39#ifdef CONFIG_SOC_IMX21
40const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
41#define imx21_imx_uart_data_entry(_id, _hwid) \
42 imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
43 imx21_imx_uart_data_entry(0, 1),
44 imx21_imx_uart_data_entry(1, 2),
45 imx21_imx_uart_data_entry(2, 3),
46 imx21_imx_uart_data_entry(3, 4),
47};
48#endif
49
50#ifdef CONFIG_SOC_IMX25
51const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = {
52#define imx25_imx_uart_data_entry(_id, _hwid) \
53 imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K)
54 imx25_imx_uart_data_entry(0, 1),
55 imx25_imx_uart_data_entry(1, 2),
56 imx25_imx_uart_data_entry(2, 3),
57 imx25_imx_uart_data_entry(3, 4),
58 imx25_imx_uart_data_entry(4, 5),
59};
60#endif
61
62#ifdef CONFIG_SOC_IMX27
63const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
64#define imx27_imx_uart_data_entry(_id, _hwid) \
65 imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K)
66 imx27_imx_uart_data_entry(0, 1),
67 imx27_imx_uart_data_entry(1, 2),
68 imx27_imx_uart_data_entry(2, 3),
69 imx27_imx_uart_data_entry(3, 4),
70 imx27_imx_uart_data_entry(4, 5),
71 imx27_imx_uart_data_entry(5, 6),
72};
73#endif
74
75#ifdef CONFIG_SOC_IMX31
76const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
77#define imx31_imx_uart_data_entry(_id, _hwid) \
78 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
79 imx31_imx_uart_data_entry(0, 1),
80 imx31_imx_uart_data_entry(1, 2),
81 imx31_imx_uart_data_entry(2, 3),
82 imx31_imx_uart_data_entry(3, 4),
83 imx31_imx_uart_data_entry(4, 5),
84};
85#endif
86
87#ifdef CONFIG_SOC_IMX35
88const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
89#define imx35_imx_uart_data_entry(_id, _hwid) \
90 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K)
91 imx35_imx_uart_data_entry(0, 1),
92 imx35_imx_uart_data_entry(1, 2),
93 imx35_imx_uart_data_entry(2, 3),
94};
95#endif
96
97#ifdef CONFIG_SOC_IMX50
98const struct imx_imx_uart_1irq_data imx50_imx_uart_data[] __initconst = {
99#define imx50_imx_uart_data_entry(_id, _hwid) \
100 imx_imx_uart_1irq_data_entry(MX50, _id, _hwid, SZ_4K)
101 imx50_imx_uart_data_entry(0, 1),
102 imx50_imx_uart_data_entry(1, 2),
103 imx50_imx_uart_data_entry(2, 3),
104 imx50_imx_uart_data_entry(3, 4),
105 imx50_imx_uart_data_entry(4, 5),
106};
107#endif
108
109#ifdef CONFIG_SOC_IMX51
110const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = {
111#define imx51_imx_uart_data_entry(_id, _hwid) \
112 imx_imx_uart_1irq_data_entry(MX51, _id, _hwid, SZ_4K)
113 imx51_imx_uart_data_entry(0, 1),
114 imx51_imx_uart_data_entry(1, 2),
115 imx51_imx_uart_data_entry(2, 3),
116};
117#endif
118
119#ifdef CONFIG_SOC_IMX53
120const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = {
121#define imx53_imx_uart_data_entry(_id, _hwid) \
122 imx_imx_uart_1irq_data_entry(MX53, _id, _hwid, SZ_4K)
123 imx53_imx_uart_data_entry(0, 1),
124 imx53_imx_uart_data_entry(1, 2),
125 imx53_imx_uart_data_entry(2, 3),
126};
127#endif
128
129struct platform_device *__init imx_add_imx_uart_3irq(
130 const struct imx_imx_uart_3irq_data *data,
131 const struct imxuart_platform_data *pdata)
132{
133 struct resource res[] = {
134 {
135 .start = data->iobase,
136 .end = data->iobase + data->iosize - 1,
137 .flags = IORESOURCE_MEM,
138 }, {
139 .start = data->irqrx,
140 .end = data->irqrx,
141 .flags = IORESOURCE_IRQ,
142 }, {
143 .start = data->irqtx,
144 .end = data->irqtx,
145 .flags = IORESOURCE_IRQ,
146 }, {
147 .start = data->irqrts,
148 .end = data->irqrx,
149 .flags = IORESOURCE_IRQ,
150 },
151 };
152
153 return imx_add_platform_device("imx-uart", data->id, res,
154 ARRAY_SIZE(res), pdata, sizeof(*pdata));
155}
156
157struct platform_device *__init imx_add_imx_uart_1irq(
158 const struct imx_imx_uart_1irq_data *data,
159 const struct imxuart_platform_data *pdata)
160{
161 struct resource res[] = {
162 {
163 .start = data->iobase,
164 .end = data->iobase + data->iosize - 1,
165 .flags = IORESOURCE_MEM,
166 }, {
167 .start = data->irq,
168 .end = data->irq,
169 .flags = IORESOURCE_IRQ,
170 },
171 };
172
173 return imx_add_platform_device("imx-uart", data->id, res, ARRAY_SIZE(res),
174 pdata, sizeof(*pdata));
175}
176
