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26#include <linux/kernel.h>
27#include <linux/platform_device.h>
28#include <linux/i2c.h>
29#include <linux/i2c-omap.h>
30#include <linux/slab.h>
31#include <linux/err.h>
32#include <linux/clk.h>
33
34#include <mach/irqs.h>
35#include <plat/mux.h>
36#include <plat/i2c.h>
37#include <plat/omap-pm.h>
38#include <plat/omap_device.h>
39
40#define OMAP_I2C_SIZE 0x3f
41#define OMAP1_I2C_BASE 0xfffb3800
42
43static const char name[] = "omap_i2c";
44
45#define I2C_RESOURCE_BUILDER(base, irq) \
46 { \
47 .start = (base), \
48 .end = (base) + OMAP_I2C_SIZE, \
49 .flags = IORESOURCE_MEM, \
50 }, \
51 { \
52 .start = (irq), \
53 .flags = IORESOURCE_IRQ, \
54 },
55
56static struct resource i2c_resources[][2] = {
57 { I2C_RESOURCE_BUILDER(0, 0) },
58};
59
60#define I2C_DEV_BUILDER(bus_id, res, data) \
61 { \
62 .id = (bus_id), \
63 .name = name, \
64 .num_resources = ARRAY_SIZE(res), \
65 .resource = (res), \
66 .dev = { \
67 .platform_data = (data), \
68 }, \
69 }
70
71#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
72#define OMAP_I2C_MAX_CONTROLLERS 4
73static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
74static struct platform_device omap_i2c_devices[] = {
75 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
76};
77
78#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
79
80static int __init omap_i2c_nr_ports(void)
81{
82 int ports = 0;
83
84 if (cpu_class_is_omap1())
85 ports = 1;
86 else if (cpu_is_omap24xx())
87 ports = 2;
88 else if (cpu_is_omap34xx())
89 ports = 3;
90 else if (cpu_is_omap44xx())
91 ports = 4;
92
93 return ports;
94}
95
96static inline int omap1_i2c_add_bus(int bus_id)
97{
98 struct platform_device *pdev;
99 struct omap_i2c_bus_platform_data *pdata;
100 struct resource *res;
101
102 omap1_i2c_mux_pins(bus_id);
103
104 pdev = &omap_i2c_devices[bus_id - 1];
105 res = pdev->resource;
106 res[0].start = OMAP1_I2C_BASE;
107 res[0].end = res[0].start + OMAP_I2C_SIZE;
108 res[1].start = INT_I2C;
109 pdata = &i2c_pdata[bus_id - 1];
110
111 return platform_device_register(pdev);
112}
113
114
115
116
117
118
119
120static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
121{
122 omap_pm_set_max_mpu_wakeup_lat(dev, t);
123}
124
125static struct omap_device_pm_latency omap_i2c_latency[] = {
126 [0] = {
127 .deactivate_func = omap_device_idle_hwmods,
128 .activate_func = omap_device_enable_hwmods,
129 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
130 },
131};
132
133#ifdef CONFIG_ARCH_OMAP2PLUS
134static inline int omap2_i2c_add_bus(int bus_id)
135{
136 int l;
137 struct omap_hwmod *oh;
138 struct omap_device *od;
139 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
140 struct omap_i2c_bus_platform_data *pdata;
141
142 omap2_i2c_mux_pins(bus_id);
143
144 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
145 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
146 "String buffer overflow in I2C%d device setup\n", bus_id);
147 oh = omap_hwmod_lookup(oh_name);
148 if (!oh) {
149 pr_err("Could not look up %s\n", oh_name);
150 return -EEXIST;
151 }
152
153 pdata = &i2c_pdata[bus_id - 1];
154
155
156
157
158
159
160
161 if (cpu_is_omap34xx())
162 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
163 od = omap_device_build(name, bus_id, oh, pdata,
164 sizeof(struct omap_i2c_bus_platform_data),
165 omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0);
166 WARN(IS_ERR(od), "Could not build omap_device for %s\n", name);
167
168 return PTR_ERR(od);
169}
170#else
171static inline int omap2_i2c_add_bus(int bus_id)
172{
173 return 0;
174}
175#endif
176
177static int __init omap_i2c_add_bus(int bus_id)
178{
179 if (cpu_class_is_omap1())
180 return omap1_i2c_add_bus(bus_id);
181 else
182 return omap2_i2c_add_bus(bus_id);
183}
184
185
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189
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191
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193
194
195
196static int __init omap_i2c_bus_setup(char *str)
197{
198 int ports;
199 int ints[3];
200
201 ports = omap_i2c_nr_ports();
202 get_options(str, 3, ints);
203 if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
204 return 0;
205 i2c_pdata[ints[1] - 1].clkrate = ints[2];
206 i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
207
208 return 1;
209}
210__setup("i2c_bus=", omap_i2c_bus_setup);
211
212
213
214
215
216static int __init omap_register_i2c_bus_cmdline(void)
217{
218 int i, err = 0;
219
220 for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
221 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
222 i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
223 err = omap_i2c_add_bus(i + 1);
224 if (err)
225 goto out;
226 }
227
228out:
229 return err;
230}
231subsys_initcall(omap_register_i2c_bus_cmdline);
232
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240
241
242int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
243 struct i2c_board_info const *info,
244 unsigned len)
245{
246 int err;
247
248 BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
249
250 if (info) {
251 err = i2c_register_board_info(bus_id, info, len);
252 if (err)
253 return err;
254 }
255
256 if (!i2c_pdata[bus_id - 1].clkrate)
257 i2c_pdata[bus_id - 1].clkrate = clkrate;
258
259 i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
260
261 return omap_i2c_add_bus(bus_id);
262}
263