1/* 2 * OMAP4 Interrupt lines definitions 3 * 4 * Copyright (C) 2009-2010 Texas Instruments, Inc. 5 * 6 * Santosh Shilimkar (santosh.shilimkar@ti.com) 7 * Benoit Cousson (b-cousson@ti.com) 8 * 9 * This file is automatically generated from the OMAP hardware databases. 10 * We respectfully ask that any modifications to this file be coordinated 11 * with the public linux-omap@vger.kernel.org mailing list and the 12 * authors above to ensure that the autogeneration scripts are kept 13 * up-to-date with the file contents. 14 * 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License version 2 as 17 * published by the Free Software Foundation. 18 */ 19 20#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H 21#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_IRQS_H 22 23/* OMAP44XX IRQs numbers definitions */ 24#define OMAP44XX_IRQ_LOCALTIMER 29 25#define OMAP44XX_IRQ_LOCALWDT 30 26 27#define OMAP44XX_IRQ_GIC_START 32 28 29#define OMAP44XX_IRQ_PL310 (0 + OMAP44XX_IRQ_GIC_START) 30#define OMAP44XX_IRQ_CTI0 (1 + OMAP44XX_IRQ_GIC_START) 31#define OMAP44XX_IRQ_CTI1 (2 + OMAP44XX_IRQ_GIC_START) 32#define OMAP44XX_IRQ_ELM (4 + OMAP44XX_IRQ_GIC_START) 33#define OMAP44XX_IRQ_SYS_1N (7 + OMAP44XX_IRQ_GIC_START) 34#define OMAP44XX_IRQ_SECURITY_EVENTS (8 + OMAP44XX_IRQ_GIC_START) 35#define OMAP44XX_IRQ_L3_DBG (9 + OMAP44XX_IRQ_GIC_START) 36#define OMAP44XX_IRQ_L3_APP (10 + OMAP44XX_IRQ_GIC_START) 37#define OMAP44XX_IRQ_PRCM (11 + OMAP44XX_IRQ_GIC_START) 38#define OMAP44XX_IRQ_SDMA_0 (12 + OMAP44XX_IRQ_GIC_START) 39#define OMAP44XX_IRQ_SDMA_1 (13 + OMAP44XX_IRQ_GIC_START) 40#define OMAP44XX_IRQ_SDMA_2 (14 + OMAP44XX_IRQ_GIC_START) 41#define OMAP44XX_IRQ_SDMA_3 (15 + OMAP44XX_IRQ_GIC_START) 42#define OMAP44XX_IRQ_MCBSP4 (16 + OMAP44XX_IRQ_GIC_START) 43#define OMAP44XX_IRQ_MCBSP1 (17 + OMAP44XX_IRQ_GIC_START) 44#define OMAP44XX_IRQ_SR_MCU (18 + OMAP44XX_IRQ_GIC_START) 45#define OMAP44XX_IRQ_SR_CORE (19 + OMAP44XX_IRQ_GIC_START) 46#define OMAP44XX_IRQ_GPMC (20 + OMAP44XX_IRQ_GIC_START) 47#define OMAP44XX_IRQ_GFX (21 + OMAP44XX_IRQ_GIC_START) 48#define OMAP44XX_IRQ_MCBSP2 (22 + OMAP44XX_IRQ_GIC_START) 49#define OMAP44XX_IRQ_MCBSP3 (23 + OMAP44XX_IRQ_GIC_START) 50#define OMAP44XX_IRQ_ISS_5 (24 + OMAP44XX_IRQ_GIC_START) 51#define OMAP44XX_IRQ_DSS_DISPC (25 + OMAP44XX_IRQ_GIC_START) 52#define OMAP44XX_IRQ_MAIL_U0 (26 + OMAP44XX_IRQ_GIC_START) 53#define OMAP44XX_IRQ_C2C_SSCM_0 (27 + OMAP44XX_IRQ_GIC_START) 54#define OMAP44XX_IRQ_TESLA_MMU (28 + OMAP44XX_IRQ_GIC_START) 55#define OMAP44XX_IRQ_GPIO1 (29 + OMAP44XX_IRQ_GIC_START) 56#define OMAP44XX_IRQ_GPIO2 (30 + OMAP44XX_IRQ_GIC_START) 57#define OMAP44XX_IRQ_GPIO3 (31 + OMAP44XX_IRQ_GIC_START) 58#define OMAP44XX_IRQ_GPIO4 (32 + OMAP44XX_IRQ_GIC_START) 59#define OMAP44XX_IRQ_GPIO5 (33 + OMAP44XX_IRQ_GIC_START) 60#define OMAP44XX_IRQ_GPIO6 (34 + OMAP44XX_IRQ_GIC_START) 61#define OMAP44XX_IRQ_USIM (35 + OMAP44XX_IRQ_GIC_START) 62#define OMAP44XX_IRQ_WDT3 (36 + OMAP44XX_IRQ_GIC_START) 63#define OMAP44XX_IRQ_GPT1 (37 + OMAP44XX_IRQ_GIC_START) 64#define OMAP44XX_IRQ_GPT2 (38 + OMAP44XX_IRQ_GIC_START) 65#define OMAP44XX_IRQ_GPT3 (39 + OMAP44XX_IRQ_GIC_START) 66#define OMAP44XX_IRQ_GPT4 (40 + OMAP44XX_IRQ_GIC_START) 67#define OMAP44XX_IRQ_GPT5 (41 + OMAP44XX_IRQ_GIC_START) 68#define OMAP44XX_IRQ_GPT6 (42 + OMAP44XX_IRQ_GIC_START) 69#define OMAP44XX_IRQ_GPT7 (43 + OMAP44XX_IRQ_GIC_START) 70#define OMAP44XX_IRQ_GPT8 (44 + OMAP44XX_IRQ_GIC_START) 71#define OMAP44XX_IRQ_GPT9 (45 + OMAP44XX_IRQ_GIC_START) 72#define OMAP44XX_IRQ_GPT10 (46 + OMAP44XX_IRQ_GIC_START) 73#define OMAP44XX_IRQ_GPT11 (47 + OMAP44XX_IRQ_GIC_START) 74#define OMAP44XX_IRQ_SPI4 (48 + OMAP44XX_IRQ_GIC_START) 75#define OMAP44XX_IRQ_SHA1_S (49 + OMAP44XX_IRQ_GIC_START) 76#define OMAP44XX_IRQ_FPKA_SINTREQUEST_S (50 + OMAP44XX_IRQ_GIC_START) 77#define OMAP44XX_IRQ_SHA1_P (51 + OMAP44XX_IRQ_GIC_START) 78#define OMAP44XX_IRQ_RNG (52 + OMAP44XX_IRQ_GIC_START) 79#define OMAP44XX_IRQ_DSS_DSI1 (53 + OMAP44XX_IRQ_GIC_START) 80#define OMAP44XX_IRQ_I2C1 (56 + OMAP44XX_IRQ_GIC_START) 81#define OMAP44XX_IRQ_I2C2 (57 + OMAP44XX_IRQ_GIC_START) 82#define OMAP44XX_IRQ_HDQ (58 + OMAP44XX_IRQ_GIC_START) 83#define OMAP44XX_IRQ_MMC5 (59 + OMAP44XX_IRQ_GIC_START) 84#define OMAP44XX_IRQ_I2C3 (61 + OMAP44XX_IRQ_GIC_START) 85#define OMAP44XX_IRQ_I2C4 (62 + OMAP44XX_IRQ_GIC_START) 86#define OMAP44XX_IRQ_AES2_S (63 + OMAP44XX_IRQ_GIC_START) 87#define OMAP44XX_IRQ_AES2_P (64 + OMAP44XX_IRQ_GIC_START) 88#define OMAP44XX_IRQ_SPI1 (65 + OMAP44XX_IRQ_GIC_START) 89#define OMAP44XX_IRQ_SPI2 (66 + OMAP44XX_IRQ_GIC_START) 90#define OMAP44XX_IRQ_HSI_P1 (67 + OMAP44XX_IRQ_GIC_START) 91#define OMAP44XX_IRQ_HSI_P2 (68 + OMAP44XX_IRQ_GIC_START) 92#define OMAP44XX_IRQ_FDIF_3 (69 + OMAP44XX_IRQ_GIC_START) 93#define OMAP44XX_IRQ_UART4 (70 + OMAP44XX_IRQ_GIC_START) 94#define OMAP44XX_IRQ_HSI_DMA (71 + OMAP44XX_IRQ_GIC_START) 95#define OMAP44XX_IRQ_UART1 (72 + OMAP44XX_IRQ_GIC_START) 96#define OMAP44XX_IRQ_UART2 (73 + OMAP44XX_IRQ_GIC_START) 97#define OMAP44XX_IRQ_UART3 (74 + OMAP44XX_IRQ_GIC_START) 98#define OMAP44XX_IRQ_PBIAS (75 + OMAP44XX_IRQ_GIC_START) 99#define OMAP44XX_IRQ_OHCI (76 + OMAP44XX_IRQ_GIC_START) 100#define OMAP44XX_IRQ_EHCI (77 + OMAP44XX_IRQ_GIC_START) 101#define OMAP44XX_IRQ_TLL (78 + OMAP44XX_IRQ_GIC_START) 102#define OMAP44XX_IRQ_AES1_S (79 + OMAP44XX_IRQ_GIC_START) 103#define OMAP44XX_IRQ_WDT2 (80 + OMAP44XX_IRQ_GIC_START) 104#define OMAP44XX_IRQ_DES_S (81 + OMAP44XX_IRQ_GIC_START) 105#define OMAP44XX_IRQ_DES_P (82 + OMAP44XX_IRQ_GIC_START) 106#define OMAP44XX_IRQ_MMC1 (83 + OMAP44XX_IRQ_GIC_START) 107#define OMAP44XX_IRQ_DSS_DSI2 (84 + OMAP44XX_IRQ_GIC_START) 108#define OMAP44XX_IRQ_AES1_P (85 + OMAP44XX_IRQ_GIC_START) 109#define OMAP44XX_IRQ_MMC2 (86 + OMAP44XX_IRQ_GIC_START) 110#define OMAP44XX_IRQ_MPU_ICR (87 + OMAP44XX_IRQ_GIC_START) 111#define OMAP44XX_IRQ_C2C_SSCM_1 (88 + OMAP44XX_IRQ_GIC_START) 112#define OMAP44XX_IRQ_FSUSB (89 + OMAP44XX_IRQ_GIC_START) 113#define OMAP44XX_IRQ_FSUSB_SMI (90 + OMAP44XX_IRQ_GIC_START) 114#define OMAP44XX_IRQ_SPI3 (91 + OMAP44XX_IRQ_GIC_START) 115#define OMAP44XX_IRQ_HS_USB_MC_N (92 + OMAP44XX_IRQ_GIC_START) 116#define OMAP44XX_IRQ_HS_USB_DMA_N (93 + OMAP44XX_IRQ_GIC_START) 117#define OMAP44XX_IRQ_MMC3 (94 + OMAP44XX_IRQ_GIC_START) 118#define OMAP44XX_IRQ_GPT12 (95 + OMAP44XX_IRQ_GIC_START) 119#define OMAP44XX_IRQ_MMC4 (96 + OMAP44XX_IRQ_GIC_START) 120#define OMAP44XX_IRQ_SLIMBUS1 (97 + OMAP44XX_IRQ_GIC_START) 121#define OMAP44XX_IRQ_SLIMBUS2 (98 + OMAP44XX_IRQ_GIC_START) 122#define OMAP44XX_IRQ_ABE (99 + OMAP44XX_IRQ_GIC_START) 123#define OMAP44XX_IRQ_DUCATI_MMU (100 + OMAP44XX_IRQ_GIC_START) 124#define OMAP44XX_IRQ_DSS_HDMI (101 + OMAP44XX_IRQ_GIC_START) 125#define OMAP44XX_IRQ_SR_IVA (102 + OMAP44XX_IRQ_GIC_START) 126#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_1 (103 + OMAP44XX_IRQ_GIC_START) 127#define OMAP44XX_IRQ_IVA_HD_POSYNCITRPEND_0 (104 + OMAP44XX_IRQ_GIC_START) 128#define OMAP44XX_IRQ_IVA_HD_POMBINTRPEND_0 (107 + OMAP44XX_IRQ_GIC_START) 129#define OMAP44XX_IRQ_MCASP1_AR (108 + OMAP44XX_IRQ_GIC_START) 130#define OMAP44XX_IRQ_MCASP1_AX (109 + OMAP44XX_IRQ_GIC_START) 131#define OMAP44XX_IRQ_EMIF4_1 (110 + OMAP44XX_IRQ_GIC_START) 132#define OMAP44XX_IRQ_EMIF4_2 (111 + OMAP44XX_IRQ_GIC_START) 133#define OMAP44XX_IRQ_MCPDM (112 + OMAP44XX_IRQ_GIC_START) 134#define OMAP44XX_IRQ_DMM (113 + OMAP44XX_IRQ_GIC_START) 135#define OMAP44XX_IRQ_DMIC (114 + OMAP44XX_IRQ_GIC_START) 136#define OMAP44XX_IRQ_CDMA_0 (115 + OMAP44XX_IRQ_GIC_START) 137#define OMAP44XX_IRQ_CDMA_1 (116 + OMAP44XX_IRQ_GIC_START) 138#define OMAP44XX_IRQ_CDMA_2 (117 + OMAP44XX_IRQ_GIC_START) 139#define OMAP44XX_IRQ_CDMA_3 (118 + OMAP44XX_IRQ_GIC_START) 140#define OMAP44XX_IRQ_SYS_2N (119 + OMAP44XX_IRQ_GIC_START) 141#define OMAP44XX_IRQ_KBD_CTL (120 + OMAP44XX_IRQ_GIC_START) 142#define OMAP44XX_IRQ_UNIPRO1 (124 + OMAP44XX_IRQ_GIC_START) 143 144#endif 145