linux/arch/cris/include/arch-v10/arch/mmu.h
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   1/*
   2 * CRIS MMU constants and PTE layout
   3 */
   4
   5#ifndef _CRIS_ARCH_MMU_H
   6#define _CRIS_ARCH_MMU_H
   7
   8/* type used in struct mm to couple an MMU context to an active mm */
   9
  10typedef struct
  11{
  12  unsigned int page_id;
  13} mm_context_t;
  14
  15/* kernel memory segments */
  16
  17#define KSEG_F 0xf0000000UL
  18#define KSEG_E 0xe0000000UL
  19#define KSEG_D 0xd0000000UL
  20#define KSEG_C 0xc0000000UL
  21#define KSEG_B 0xb0000000UL
  22#define KSEG_A 0xa0000000UL
  23#define KSEG_9 0x90000000UL
  24#define KSEG_8 0x80000000UL
  25#define KSEG_7 0x70000000UL
  26#define KSEG_6 0x60000000UL
  27#define KSEG_5 0x50000000UL
  28#define KSEG_4 0x40000000UL
  29#define KSEG_3 0x30000000UL
  30#define KSEG_2 0x20000000UL
  31#define KSEG_1 0x10000000UL
  32#define KSEG_0 0x00000000UL
  33
  34/* CRIS PTE bits (see R_TLB_LO in the register description)
  35 *
  36 *   Bit:  31     30-13 12-------4    3        2       1       0
  37 *         _______________________________________________________
  38 *        | cache |pfn | reserved | global | valid | kernel | we  |
  39 *        |_______|____|__________|________|_______|________|_____|
  40 *
  41 * (pfn = physical frame number)
  42 */
  43
  44/* Real HW-based PTE bits. We use some synonym names so that
  45 * things become less confusing in combination with the SW-based
  46 * bits further below.
  47 *
  48 */
  49
  50#define _PAGE_WE           (1<<0) /* page is write-enabled */
  51#define _PAGE_SILENT_WRITE (1<<0) /* synonym */
  52#define _PAGE_KERNEL       (1<<1) /* page is kernel only */
  53#define _PAGE_VALID        (1<<2) /* page is valid */
  54#define _PAGE_SILENT_READ  (1<<2) /* synonym */
  55#define _PAGE_GLOBAL       (1<<3) /* global page - context is ignored */
  56#define _PAGE_NO_CACHE     (1<<31) /* part of the uncached memory map */
  57
  58/* Bits the HW doesn't care about but the kernel uses them in SW */
  59
  60#define _PAGE_PRESENT   (1<<4)  /* page present in memory */
  61#define _PAGE_FILE      (1<<5)  /* set: pagecache, unset: swap (when !PRESENT) */
  62#define _PAGE_ACCESSED  (1<<5)  /* simulated in software using valid bit */
  63#define _PAGE_MODIFIED  (1<<6)  /* simulated in software using we bit */
  64#define _PAGE_READ      (1<<7)  /* read-enabled */
  65#define _PAGE_WRITE     (1<<8)  /* write-enabled */
  66
  67/* Define some higher level generic page attributes. */
  68
  69#define __READABLE      (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
  70#define __WRITEABLE     (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
  71
  72#define _PAGE_TABLE     (_PAGE_PRESENT | __READABLE | __WRITEABLE)
  73#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
  74
  75#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
  76#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | __READABLE | _PAGE_WRITE | \
  77                                 _PAGE_ACCESSED)
  78#define PAGE_COPY       __pgprot(_PAGE_PRESENT | __READABLE)  // | _PAGE_COW
  79#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | __READABLE)
  80#define PAGE_KERNEL     __pgprot(_PAGE_GLOBAL | _PAGE_KERNEL | \
  81                                 _PAGE_PRESENT | __READABLE | __WRITEABLE)
  82#define _KERNPG_TABLE   (_PAGE_TABLE | _PAGE_KERNEL)
  83
  84/*
  85 * CRIS can't do page protection for execute, and considers read the same.
  86 * Also, write permissions imply read permissions. This is the closest we can
  87 * get..
  88 */
  89
  90#define __P000  PAGE_NONE
  91#define __P001  PAGE_READONLY
  92#define __P010  PAGE_COPY
  93#define __P011  PAGE_COPY
  94#define __P100  PAGE_READONLY
  95#define __P101  PAGE_READONLY
  96#define __P110  PAGE_COPY
  97#define __P111  PAGE_COPY
  98
  99#define __S000  PAGE_NONE
 100#define __S001  PAGE_READONLY
 101#define __S010  PAGE_SHARED
 102#define __S011  PAGE_SHARED
 103#define __S100  PAGE_READONLY
 104#define __S101  PAGE_READONLY
 105#define __S110  PAGE_SHARED
 106#define __S111  PAGE_SHARED
 107
 108#define PTE_FILE_MAX_BITS       26
 109
 110#endif
 111