LXR linux/arch/cris/include/asm/system.h

   1#ifndef __ASM_CRIS_SYSTEM_H
   2#define __ASM_CRIS_SYSTEM_H
   3
   4#include <linux/irqflags.h>
   5#include <arch/system.h>
   6
   7/* the switch_to macro calls resume, an asm function in entry.S which does the actual
   8 * task switching.
   9 */
  10
  11extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
  12#define switch_to(prev,next,last) last = resume(prev,next, \
  13                                         (int)&((struct task_struct *)0)->thread)
  14
  15#define barrier() __asm__ __volatile__("": : :"memory")
  16#define mb() barrier()
  17#define rmb() mb()
  18#define wmb() mb()
  19#define read_barrier_depends() do { } while(0)
  20#define set_mb(var, value)  do { var = value; mb(); } while (0)
  21
  22#ifdef CONFIG_SMP
  23#define smp_mb()        mb()
  24#define smp_rmb()       rmb()
  25#define smp_wmb()       wmb()
  26#define smp_read_barrier_depends()     read_barrier_depends()
  27#else
  28#define smp_mb()        barrier()
  29#define smp_rmb()       barrier()
  30#define smp_wmb()       barrier()
  31#define smp_read_barrier_depends()     do { } while(0)
  32#endif
  33
  34#define iret()
  35
  36/*
  37 * disable hlt during certain critical i/o operations
  38 */
  39#define HAVE_DISABLE_HLT
  40void disable_hlt(void);
  41void enable_hlt(void);
  42
  43static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  44{
  45  /* since Etrax doesn't have any atomic xchg instructions, we need to disable
  46     irq's (if enabled) and do it with move.d's */
  47  unsigned long flags,temp;
  48  local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
  49  switch (size) {
  50  case 1:
  51    *((unsigned char *)&temp) = x;
  52    x = *(unsigned char *)ptr;
  53    *(unsigned char *)ptr = *((unsigned char *)&temp);
  54    break;
  55  case 2:
  56    *((unsigned short *)&temp) = x;
  57    x = *(unsigned short *)ptr;
  58    *(unsigned short *)ptr = *((unsigned short *)&temp);
  59    break;
  60  case 4:
  61    temp = x;
  62    x = *(unsigned long *)ptr;
  63    *(unsigned long *)ptr = temp;
  64    break;
  65  }
  66  local_irq_restore(flags); /* restore irq enable bit */
  67  return x;
  68}
  69
  70#include <asm-generic/cmpxchg-local.h>
  71
  72/*
  73 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
  74 * them available.
  75 */
  76#define cmpxchg_local(ptr, o, n)                                               \
  77        ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
  78                        (unsigned long)(n), sizeof(*(ptr))))
  79#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
  80
  81#ifndef CONFIG_SMP
  82#include <asm-generic/cmpxchg.h>
  83#endif
  84
  85#define arch_align_stack(x) (x)
  86
  87void default_idle(void);
  88
  89#endif
  90