1config FRV
2 bool
3 default y
4 select HAVE_IDE
5 select HAVE_ARCH_TRACEHOOK
6 select HAVE_IRQ_WORK
7 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
9
10config ZONE_DMA
11 bool
12 default y
13
14config RWSEM_GENERIC_SPINLOCK
15 bool
16 default y
17
18config RWSEM_XCHGADD_ALGORITHM
19 bool
20
21config GENERIC_FIND_NEXT_BIT
22 bool
23 default y
24
25config GENERIC_HWEIGHT
26 bool
27 default y
28
29config GENERIC_CALIBRATE_DELAY
30 bool
31 default n
32
33config TIME_LOW_RES
34 bool
35 default y
36
37config QUICKLIST
38 bool
39 default y
40
41config ARCH_HAS_ILOG2_U32
42 bool
43 default y
44
45config ARCH_HAS_ILOG2_U64
46 bool
47 default y
48
49config HZ
50 int
51 default 1000
52
53source "init/Kconfig"
54
55source "kernel/Kconfig.freezer"
56
57
58menu "Fujitsu FR-V system setup"
59
60config MMU
61 bool "MMU support"
62 help
63 This options switches on and off support for the FR-V MMU
64 (effectively switching between vmlinux and uClinux). Not all FR-V
65 CPUs support this. Currently only the FR451 has a sufficiently
66 featured MMU.
67
68config FRV_OUTOFLINE_ATOMIC_OPS
69 bool "Out-of-line the FRV atomic operations"
70 default n
71 help
72 Setting this option causes the FR-V atomic operations to be mostly
73 implemented out-of-line.
74
75 See Documentation/frv/atomic-ops.txt for more information.
76
77config HIGHMEM
78 bool "High memory support"
79 depends on MMU
80 default y
81 help
82 If you wish to use more than 256MB of memory with your MMU based
83 system, you will need to select this option. The kernel can only see
84 the memory between 0xC0000000 and 0xD0000000 directly... everything
85 else must be kmapped.
86
87 The arch is, however, capable of supporting up to 3GB of SDRAM.
88
89config HIGHPTE
90 bool "Allocate page tables in highmem"
91 depends on HIGHMEM
92 default y
93 help
94 The VM uses one page of memory for each page table. For systems
95 with a lot of RAM, this can be wasteful of precious low memory.
96 Setting this option will put user-space page tables in high memory.
97
98source "mm/Kconfig"
99
100choice
101 prompt "uClinux kernel load address"
102 depends on !MMU
103 default UCPAGE_OFFSET_C0000000
104 help
105 This option sets the base address for the uClinux kernel. The kernel
106 will rearrange the SDRAM layout to start at this address, and move
107 itself to start there. It must be greater than 0, and it must be
108 sufficiently less than 0xE0000000 that the SDRAM does not intersect
109 the I/O region.
110
111 The base address must also be aligned such that the SDRAM controller
112 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
113
114config UCPAGE_OFFSET_20000000
115 bool "0x20000000"
116
117config UCPAGE_OFFSET_40000000
118 bool "0x40000000"
119
120config UCPAGE_OFFSET_60000000
121 bool "0x60000000"
122
123config UCPAGE_OFFSET_80000000
124 bool "0x80000000"
125
126config UCPAGE_OFFSET_A0000000
127 bool "0xA0000000"
128
129config UCPAGE_OFFSET_C0000000
130 bool "0xC0000000 (Recommended)"
131
132endchoice
133
134config PAGE_OFFSET
135 hex
136 default 0x20000000 if UCPAGE_OFFSET_20000000
137 default 0x40000000 if UCPAGE_OFFSET_40000000
138 default 0x60000000 if UCPAGE_OFFSET_60000000
139 default 0x80000000 if UCPAGE_OFFSET_80000000
140 default 0xA0000000 if UCPAGE_OFFSET_A0000000
141 default 0xC0000000
142
143config PROTECT_KERNEL
144 bool "Protect core kernel against userspace"
145 depends on !MMU
146 default y
147 help
148 Selecting this option causes the uClinux kernel to change the
149 permittivity of DAMPR register covering the core kernel image to
150 prevent userspace accessing the underlying memory directly.
151
152choice
153 prompt "CPU Caching mode"
154 default FRV_DEFL_CACHE_WBACK
155 help
156 This option determines the default caching mode for the kernel.
157
158 Write-Back caching mode involves the all reads and writes causing
159 the affected cacheline to be read into the cache first before being
160 operated upon. Memory is not then updated by a write until the cache
161 is filled and a cacheline needs to be displaced from the cache to
162 make room. Only at that point is it written back.
163
164 Write-Behind caching is similar to Write-Back caching, except that a
165 write won't fetch a cacheline into the cache if there isn't already
166 one there; it will write directly to memory instead.
167
168 Write-Through caching only fetches cachelines from memory on a
169 read. Writes always get written directly to memory. If the affected
170 cacheline is also in cache, it will be updated too.
171
172 The final option is to turn of caching entirely.
173
174 Note that not all CPUs support Write-Behind caching. If the CPU on
175 which the kernel is running doesn't, it'll fall back to Write-Back
176 caching.
177
178config FRV_DEFL_CACHE_WBACK
179 bool "Write-Back"
180
181config FRV_DEFL_CACHE_WBEHIND
182 bool "Write-Behind"
183
184config FRV_DEFL_CACHE_WTHRU
185 bool "Write-Through"
186
187config FRV_DEFL_CACHE_DISABLED
188 bool "Disabled"
189
190endchoice
191
192menu "CPU core support"
193
194config CPU_FR401
195 bool "Include FR401 core support"
196 depends on !MMU
197 default y
198 help
199 This enables support for the FR401, FR401A and FR403 CPUs
200
201config CPU_FR405
202 bool "Include FR405 core support"
203 depends on !MMU
204 default y
205 help
206 This enables support for the FR405 CPU
207
208config CPU_FR451
209 bool "Include FR451 core support"
210 default y
211 help
212 This enables support for the FR451 CPU
213
214config CPU_FR451_COMPILE
215 bool "Specifically compile for FR451 core"
216 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
217 default y
218 help
219 This causes appropriate flags to be passed to the compiler to
220 optimise for the FR451 CPU
221
222config CPU_FR551
223 bool "Include FR551 core support"
224 depends on !MMU
225 default y
226 help
227 This enables support for the FR555 CPU
228
229config CPU_FR551_COMPILE
230 bool "Specifically compile for FR551 core"
231 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
232 default y
233 help
234 This causes appropriate flags to be passed to the compiler to
235 optimise for the FR555 CPU
236
237config FRV_L1_CACHE_SHIFT
238 int
239 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
240 default "6" if CPU_FR551
241
242endmenu
243
244choice
245 prompt "System support"
246 default MB93091_VDK
247
248config MB93091_VDK
249 bool "MB93091 CPU board with or without motherboard"
250
251config MB93093_PDK
252 bool "MB93093 PDK unit"
253
254endchoice
255
256if MB93091_VDK
257choice
258 prompt "Motherboard support"
259 default MB93090_MB00
260
261config MB93090_MB00
262 bool "Use the MB93090-MB00 motherboard"
263 help
264 Select this option if the MB93091 CPU board is going to be used with
265 a MB93090-MB00 VDK motherboard
266
267config MB93091_NO_MB
268 bool "Use standalone"
269 help
270 Select this option if the MB93091 CPU board is going to be used
271 without a motherboard
272
273endchoice
274endif
275
276config FUJITSU_MB93493
277 bool "MB93493 Multimedia chip"
278 help
279 Select this option if the MB93493 multimedia chip is going to be
280 used.
281
282choice
283 prompt "GP-Relative data support"
284 default GPREL_DATA_8
285 help
286 This option controls what data, if any, should be placed in the GP
287 relative data sections. Using this means that the compiler can
288 generate accesses to the data using GR16-relative addressing which
289 is faster than absolute instructions and saves space (2 instructions
290 per access).
291
292 However, the GPREL region is limited in size because the immediate
293 value used in the load and store instructions is limited to a 12-bit
294 signed number.
295
296 So if the linker starts complaining that accesses to GPREL data are
297 out of range, try changing this option from the default.
298
299 Note that modules will always be compiled with this feature disabled
300 as the module data will not be in range of the GP base address.
301
302config GPREL_DATA_8
303 bool "Put data objects of up to 8 bytes into GP-REL"
304
305config GPREL_DATA_4
306 bool "Put data objects of up to 4 bytes into GP-REL"
307
308config GPREL_DATA_NONE
309 bool "Don't use GP-REL"
310
311endchoice
312
313config FRV_ONCPU_SERIAL
314 bool "Use on-CPU serial ports"
315 select SERIAL_8250
316 default y
317
318config PCI
319 bool "Use PCI"
320 depends on MB93090_MB00
321 default y
322 help
323 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
324 onboard. If you have one of these boards and you wish to use the PCI
325 facilities, say Y here.
326
327config RESERVE_DMA_COHERENT
328 bool "Reserve DMA coherent memory"
329 depends on PCI && !MMU
330 default y
331 help
332 Many PCI drivers require access to uncached memory for DMA device
333 communications (such as is done with some Ethernet buffer rings). If
334 a fully featured MMU is available, this can be done through page
335 table settings, but if not, a region has to be set aside and marked
336 with a special DAMPR register.
337
338 Setting this option causes uClinux to set aside a portion of the
339 available memory for use in this manner. The memory will then be
340 unavailable for normal kernel use.
341
342source "drivers/pci/Kconfig"
343
344source "drivers/pcmcia/Kconfig"
345
346
347
348
349
350
351
352
353
354
355
356menu "Power management options"
357
358config ARCH_SUSPEND_POSSIBLE
359 def_bool y
360 depends on !SMP
361
362source kernel/power/Kconfig
363endmenu
364
365endmenu
366
367
368menu "Executable formats"
369
370source "fs/Kconfig.binfmt"
371
372endmenu
373
374source "net/Kconfig"
375
376source "drivers/Kconfig"
377
378source "fs/Kconfig"
379
380source "arch/frv/Kconfig.debug"
381
382source "security/Kconfig"
383
384source "crypto/Kconfig"
385
386source "lib/Kconfig"
387
