```   1#include <linux/linkage.h>
2
3/*
4 * Unsigned modulo operation for 32 bit integers.
5 *      Input : op1 in Reg r5
6 *              op2 in Reg r6
7 *      Output: op1 mod op2 in Reg r3
8 */
9
10        .text
11        .globl  __umodsi3
12        .type __umodsi3, @function
13        .ent __umodsi3
14
15__umodsi3:
16        .frame  r1, 0, r15
17
19        swi     r29, r1, 0
20        swi     r30, r1, 4
21        swi     r31, r1, 8
22
23        beqi    r6, div_by_zero /* div_by_zero - division error */
24        beqid   r5, result_is_zero /* result is zero */
25        addik   r3, r0, 0 /* clear div */
26        addik   r30, r0, 0 /* clear mod */
27        addik   r29, r0, 32 /* initialize the loop count */
28
29/* check if r6 and r5 are equal /* if yes, return 0 */
30        rsub    r18, r5, r6
31        beqi    r18, return_here
32
33/* check if (uns)r6 is greater than (uns)r5. in that case, just return r5 */
34        xor     r18, r5, r6
35        bgeid   r18, 16
37        blti    r6, return_here
38        bri     \$lcheckr6
39        rsub    r18, r5, r6 /* microblazecmp */
40        bgti    r18, return_here
41
42/* if r6 [bit 31] is set, then return result as r5-r6 */
43\$lcheckr6:
44        bgtid   r6, div0
47        and     r5, r5, r18
48        and     r6, r6, r18
49        brid    return_here
50        rsub    r3, r6, r5
51/* first part: try to find the first '1' in the r5 */
52div0:
53        blti    r5, div2
54div1:
55        add     r5, r5, r5 /* left shift logical r5 */
56        bgeid   r5, div1
58div2:
59        /* left shift logical r5 get the '1' into the carry */
61        addc    r3, r3, r3 /* move that bit into the mod register */
62        rsub    r31, r6, r3 /* try to subtract (r3 a r6) */
63        blti    r31, mod_too_small
64        /* move the r31 to mod since the result was positive */
65        or      r3, r0, r31
67mod_too_small:
69        beqi    r29, loop_end
70        add     r30, r30, r30 /* shift in the '1' into div */
71        bri     div2 /* div2 */
72loop_end:
73        bri     return_here
74div_by_zero:
75result_is_zero:
76        or      r3, r0, r0 /* set result to 0 */
77return_here:
78/* restore values of csrs and that of r3 and the divisor and the dividend */
79        lwi     r29, r1, 0
80        lwi     r30, r1, 4
81        lwi     r31, r1, 8
82        rtsd    r15, 8