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18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
22#include <linux/errno.h>
23#include <linux/ptrace.h>
24#include <linux/regset.h>
25#include <linux/tracehook.h>
26#include <linux/elf.h>
27#include <linux/user.h>
28#include <linux/security.h>
29#include <linux/signal.h>
30#include <linux/seccomp.h>
31#include <linux/audit.h>
32#ifdef CONFIG_PPC32
33#include <linux/module.h>
34#endif
35#include <linux/hw_breakpoint.h>
36#include <linux/perf_event.h>
37
38#include <asm/uaccess.h>
39#include <asm/page.h>
40#include <asm/pgtable.h>
41#include <asm/system.h>
42
43
44
45
46
47#ifdef CONFIG_PPC32
48#define PARAMETER_SAVE_AREA_OFFSET 24
49#else
50#define PARAMETER_SAVE_AREA_OFFSET 48
51#endif
52
53struct pt_regs_offset {
54 const char *name;
55 int offset;
56};
57
58#define STR(s) #s
59#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
60#define GPR_OFFSET_NAME(num) \
61 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
62#define REG_OFFSET_END {.name = NULL, .offset = 0}
63
64static const struct pt_regs_offset regoffset_table[] = {
65 GPR_OFFSET_NAME(0),
66 GPR_OFFSET_NAME(1),
67 GPR_OFFSET_NAME(2),
68 GPR_OFFSET_NAME(3),
69 GPR_OFFSET_NAME(4),
70 GPR_OFFSET_NAME(5),
71 GPR_OFFSET_NAME(6),
72 GPR_OFFSET_NAME(7),
73 GPR_OFFSET_NAME(8),
74 GPR_OFFSET_NAME(9),
75 GPR_OFFSET_NAME(10),
76 GPR_OFFSET_NAME(11),
77 GPR_OFFSET_NAME(12),
78 GPR_OFFSET_NAME(13),
79 GPR_OFFSET_NAME(14),
80 GPR_OFFSET_NAME(15),
81 GPR_OFFSET_NAME(16),
82 GPR_OFFSET_NAME(17),
83 GPR_OFFSET_NAME(18),
84 GPR_OFFSET_NAME(19),
85 GPR_OFFSET_NAME(20),
86 GPR_OFFSET_NAME(21),
87 GPR_OFFSET_NAME(22),
88 GPR_OFFSET_NAME(23),
89 GPR_OFFSET_NAME(24),
90 GPR_OFFSET_NAME(25),
91 GPR_OFFSET_NAME(26),
92 GPR_OFFSET_NAME(27),
93 GPR_OFFSET_NAME(28),
94 GPR_OFFSET_NAME(29),
95 GPR_OFFSET_NAME(30),
96 GPR_OFFSET_NAME(31),
97 REG_OFFSET_NAME(nip),
98 REG_OFFSET_NAME(msr),
99 REG_OFFSET_NAME(ctr),
100 REG_OFFSET_NAME(link),
101 REG_OFFSET_NAME(xer),
102 REG_OFFSET_NAME(ccr),
103#ifdef CONFIG_PPC64
104 REG_OFFSET_NAME(softe),
105#else
106 REG_OFFSET_NAME(mq),
107#endif
108 REG_OFFSET_NAME(trap),
109 REG_OFFSET_NAME(dar),
110 REG_OFFSET_NAME(dsisr),
111 REG_OFFSET_END,
112};
113
114
115
116
117
118
119
120
121int regs_query_register_offset(const char *name)
122{
123 const struct pt_regs_offset *roff;
124 for (roff = regoffset_table; roff->name != NULL; roff++)
125 if (!strcmp(roff->name, name))
126 return roff->offset;
127 return -EINVAL;
128}
129
130
131
132
133
134
135
136
137const char *regs_query_register_name(unsigned int offset)
138{
139 const struct pt_regs_offset *roff;
140 for (roff = regoffset_table; roff->name != NULL; roff++)
141 if (roff->offset == offset)
142 return roff->name;
143 return NULL;
144}
145
146
147
148
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151
152
153
154#ifdef CONFIG_PPC_ADV_DEBUG_REGS
155#define MSR_DEBUGCHANGE 0
156#else
157#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
158#endif
159
160
161
162
163#ifdef CONFIG_PPC32
164#define PT_MAX_PUT_REG PT_MQ
165#else
166#define PT_MAX_PUT_REG PT_CCR
167#endif
168
169static unsigned long get_user_msr(struct task_struct *task)
170{
171 return task->thread.regs->msr | task->thread.fpexc_mode;
172}
173
174static int set_user_msr(struct task_struct *task, unsigned long msr)
175{
176 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
177 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
178 return 0;
179}
180
181
182
183
184
185static int set_user_trap(struct task_struct *task, unsigned long trap)
186{
187 task->thread.regs->trap = trap & 0xfff0;
188 return 0;
189}
190
191
192
193
194unsigned long ptrace_get_reg(struct task_struct *task, int regno)
195{
196 if (task->thread.regs == NULL)
197 return -EIO;
198
199 if (regno == PT_MSR)
200 return get_user_msr(task);
201
202 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
203 return ((unsigned long *)task->thread.regs)[regno];
204
205 return -EIO;
206}
207
208
209
210
211int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
212{
213 if (task->thread.regs == NULL)
214 return -EIO;
215
216 if (regno == PT_MSR)
217 return set_user_msr(task, data);
218 if (regno == PT_TRAP)
219 return set_user_trap(task, data);
220
221 if (regno <= PT_MAX_PUT_REG) {
222 ((unsigned long *)task->thread.regs)[regno] = data;
223 return 0;
224 }
225 return -EIO;
226}
227
228static int gpr_get(struct task_struct *target, const struct user_regset *regset,
229 unsigned int pos, unsigned int count,
230 void *kbuf, void __user *ubuf)
231{
232 int ret;
233
234 if (target->thread.regs == NULL)
235 return -EIO;
236
237 CHECK_FULL_REGS(target->thread.regs);
238
239 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
240 target->thread.regs,
241 0, offsetof(struct pt_regs, msr));
242 if (!ret) {
243 unsigned long msr = get_user_msr(target);
244 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
245 offsetof(struct pt_regs, msr),
246 offsetof(struct pt_regs, msr) +
247 sizeof(msr));
248 }
249
250 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
251 offsetof(struct pt_regs, msr) + sizeof(long));
252
253 if (!ret)
254 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
255 &target->thread.regs->orig_gpr3,
256 offsetof(struct pt_regs, orig_gpr3),
257 sizeof(struct pt_regs));
258 if (!ret)
259 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
260 sizeof(struct pt_regs), -1);
261
262 return ret;
263}
264
265static int gpr_set(struct task_struct *target, const struct user_regset *regset,
266 unsigned int pos, unsigned int count,
267 const void *kbuf, const void __user *ubuf)
268{
269 unsigned long reg;
270 int ret;
271
272 if (target->thread.regs == NULL)
273 return -EIO;
274
275 CHECK_FULL_REGS(target->thread.regs);
276
277 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
278 target->thread.regs,
279 0, PT_MSR * sizeof(reg));
280
281 if (!ret && count > 0) {
282 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
283 PT_MSR * sizeof(reg),
284 (PT_MSR + 1) * sizeof(reg));
285 if (!ret)
286 ret = set_user_msr(target, reg);
287 }
288
289 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
290 offsetof(struct pt_regs, msr) + sizeof(long));
291
292 if (!ret)
293 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
294 &target->thread.regs->orig_gpr3,
295 PT_ORIG_R3 * sizeof(reg),
296 (PT_MAX_PUT_REG + 1) * sizeof(reg));
297
298 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
299 ret = user_regset_copyin_ignore(
300 &pos, &count, &kbuf, &ubuf,
301 (PT_MAX_PUT_REG + 1) * sizeof(reg),
302 PT_TRAP * sizeof(reg));
303
304 if (!ret && count > 0) {
305 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
306 PT_TRAP * sizeof(reg),
307 (PT_TRAP + 1) * sizeof(reg));
308 if (!ret)
309 ret = set_user_trap(target, reg);
310 }
311
312 if (!ret)
313 ret = user_regset_copyin_ignore(
314 &pos, &count, &kbuf, &ubuf,
315 (PT_TRAP + 1) * sizeof(reg), -1);
316
317 return ret;
318}
319
320static int fpr_get(struct task_struct *target, const struct user_regset *regset,
321 unsigned int pos, unsigned int count,
322 void *kbuf, void __user *ubuf)
323{
324#ifdef CONFIG_VSX
325 double buf[33];
326 int i;
327#endif
328 flush_fp_to_thread(target);
329
330#ifdef CONFIG_VSX
331
332 for (i = 0; i < 32 ; i++)
333 buf[i] = target->thread.TS_FPR(i);
334 memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
335 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
336
337#else
338 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
339 offsetof(struct thread_struct, TS_FPR(32)));
340
341 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
342 &target->thread.fpr, 0, -1);
343#endif
344}
345
346static int fpr_set(struct task_struct *target, const struct user_regset *regset,
347 unsigned int pos, unsigned int count,
348 const void *kbuf, const void __user *ubuf)
349{
350#ifdef CONFIG_VSX
351 double buf[33];
352 int i;
353#endif
354 flush_fp_to_thread(target);
355
356#ifdef CONFIG_VSX
357
358 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
359 if (i)
360 return i;
361 for (i = 0; i < 32 ; i++)
362 target->thread.TS_FPR(i) = buf[i];
363 memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
364 return 0;
365#else
366 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
367 offsetof(struct thread_struct, TS_FPR(32)));
368
369 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
370 &target->thread.fpr, 0, -1);
371#endif
372}
373
374#ifdef CONFIG_ALTIVEC
375
376
377
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380
381
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383
384
385
386
387
388static int vr_active(struct task_struct *target,
389 const struct user_regset *regset)
390{
391 flush_altivec_to_thread(target);
392 return target->thread.used_vr ? regset->n : 0;
393}
394
395static int vr_get(struct task_struct *target, const struct user_regset *regset,
396 unsigned int pos, unsigned int count,
397 void *kbuf, void __user *ubuf)
398{
399 int ret;
400
401 flush_altivec_to_thread(target);
402
403 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
404 offsetof(struct thread_struct, vr[32]));
405
406 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
407 &target->thread.vr, 0,
408 33 * sizeof(vector128));
409 if (!ret) {
410
411
412
413 union {
414 elf_vrreg_t reg;
415 u32 word;
416 } vrsave;
417 memset(&vrsave, 0, sizeof(vrsave));
418 vrsave.word = target->thread.vrsave;
419 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
420 33 * sizeof(vector128), -1);
421 }
422
423 return ret;
424}
425
426static int vr_set(struct task_struct *target, const struct user_regset *regset,
427 unsigned int pos, unsigned int count,
428 const void *kbuf, const void __user *ubuf)
429{
430 int ret;
431
432 flush_altivec_to_thread(target);
433
434 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
435 offsetof(struct thread_struct, vr[32]));
436
437 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
438 &target->thread.vr, 0, 33 * sizeof(vector128));
439 if (!ret && count > 0) {
440
441
442
443 union {
444 elf_vrreg_t reg;
445 u32 word;
446 } vrsave;
447 memset(&vrsave, 0, sizeof(vrsave));
448 vrsave.word = target->thread.vrsave;
449 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
450 33 * sizeof(vector128), -1);
451 if (!ret)
452 target->thread.vrsave = vrsave.word;
453 }
454
455 return ret;
456}
457#endif
458
459#ifdef CONFIG_VSX
460
461
462
463
464
465
466static int vsr_active(struct task_struct *target,
467 const struct user_regset *regset)
468{
469 flush_vsx_to_thread(target);
470 return target->thread.used_vsr ? regset->n : 0;
471}
472
473static int vsr_get(struct task_struct *target, const struct user_regset *regset,
474 unsigned int pos, unsigned int count,
475 void *kbuf, void __user *ubuf)
476{
477 double buf[32];
478 int ret, i;
479
480 flush_vsx_to_thread(target);
481
482 for (i = 0; i < 32 ; i++)
483 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
484 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
485 buf, 0, 32 * sizeof(double));
486
487 return ret;
488}
489
490static int vsr_set(struct task_struct *target, const struct user_regset *regset,
491 unsigned int pos, unsigned int count,
492 const void *kbuf, const void __user *ubuf)
493{
494 double buf[32];
495 int ret,i;
496
497 flush_vsx_to_thread(target);
498
499 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
500 buf, 0, 32 * sizeof(double));
501 for (i = 0; i < 32 ; i++)
502 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
503
504
505 return ret;
506}
507#endif
508
509#ifdef CONFIG_SPE
510
511
512
513
514
515
516
517
518
519
520
521static int evr_active(struct task_struct *target,
522 const struct user_regset *regset)
523{
524 flush_spe_to_thread(target);
525 return target->thread.used_spe ? regset->n : 0;
526}
527
528static int evr_get(struct task_struct *target, const struct user_regset *regset,
529 unsigned int pos, unsigned int count,
530 void *kbuf, void __user *ubuf)
531{
532 int ret;
533
534 flush_spe_to_thread(target);
535
536 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
537 &target->thread.evr,
538 0, sizeof(target->thread.evr));
539
540 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
541 offsetof(struct thread_struct, spefscr));
542
543 if (!ret)
544 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
545 &target->thread.acc,
546 sizeof(target->thread.evr), -1);
547
548 return ret;
549}
550
551static int evr_set(struct task_struct *target, const struct user_regset *regset,
552 unsigned int pos, unsigned int count,
553 const void *kbuf, const void __user *ubuf)
554{
555 int ret;
556
557 flush_spe_to_thread(target);
558
559 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
560 &target->thread.evr,
561 0, sizeof(target->thread.evr));
562
563 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
564 offsetof(struct thread_struct, spefscr));
565
566 if (!ret)
567 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
568 &target->thread.acc,
569 sizeof(target->thread.evr), -1);
570
571 return ret;
572}
573#endif
574
575
576
577
578
579enum powerpc_regset {
580 REGSET_GPR,
581 REGSET_FPR,
582#ifdef CONFIG_ALTIVEC
583 REGSET_VMX,
584#endif
585#ifdef CONFIG_VSX
586 REGSET_VSX,
587#endif
588#ifdef CONFIG_SPE
589 REGSET_SPE,
590#endif
591};
592
593static const struct user_regset native_regsets[] = {
594 [REGSET_GPR] = {
595 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
596 .size = sizeof(long), .align = sizeof(long),
597 .get = gpr_get, .set = gpr_set
598 },
599 [REGSET_FPR] = {
600 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
601 .size = sizeof(double), .align = sizeof(double),
602 .get = fpr_get, .set = fpr_set
603 },
604#ifdef CONFIG_ALTIVEC
605 [REGSET_VMX] = {
606 .core_note_type = NT_PPC_VMX, .n = 34,
607 .size = sizeof(vector128), .align = sizeof(vector128),
608 .active = vr_active, .get = vr_get, .set = vr_set
609 },
610#endif
611#ifdef CONFIG_VSX
612 [REGSET_VSX] = {
613 .core_note_type = NT_PPC_VSX, .n = 32,
614 .size = sizeof(double), .align = sizeof(double),
615 .active = vsr_active, .get = vsr_get, .set = vsr_set
616 },
617#endif
618#ifdef CONFIG_SPE
619 [REGSET_SPE] = {
620 .n = 35,
621 .size = sizeof(u32), .align = sizeof(u32),
622 .active = evr_active, .get = evr_get, .set = evr_set
623 },
624#endif
625};
626
627static const struct user_regset_view user_ppc_native_view = {
628 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
629 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
630};
631
632#ifdef CONFIG_PPC64
633#include <linux/compat.h>
634
635static int gpr32_get(struct task_struct *target,
636 const struct user_regset *regset,
637 unsigned int pos, unsigned int count,
638 void *kbuf, void __user *ubuf)
639{
640 const unsigned long *regs = &target->thread.regs->gpr[0];
641 compat_ulong_t *k = kbuf;
642 compat_ulong_t __user *u = ubuf;
643 compat_ulong_t reg;
644
645 if (target->thread.regs == NULL)
646 return -EIO;
647
648 CHECK_FULL_REGS(target->thread.regs);
649
650 pos /= sizeof(reg);
651 count /= sizeof(reg);
652
653 if (kbuf)
654 for (; count > 0 && pos < PT_MSR; --count)
655 *k++ = regs[pos++];
656 else
657 for (; count > 0 && pos < PT_MSR; --count)
658 if (__put_user((compat_ulong_t) regs[pos++], u++))
659 return -EFAULT;
660
661 if (count > 0 && pos == PT_MSR) {
662 reg = get_user_msr(target);
663 if (kbuf)
664 *k++ = reg;
665 else if (__put_user(reg, u++))
666 return -EFAULT;
667 ++pos;
668 --count;
669 }
670
671 if (kbuf)
672 for (; count > 0 && pos < PT_REGS_COUNT; --count)
673 *k++ = regs[pos++];
674 else
675 for (; count > 0 && pos < PT_REGS_COUNT; --count)
676 if (__put_user((compat_ulong_t) regs[pos++], u++))
677 return -EFAULT;
678
679 kbuf = k;
680 ubuf = u;
681 pos *= sizeof(reg);
682 count *= sizeof(reg);
683 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
684 PT_REGS_COUNT * sizeof(reg), -1);
685}
686
687static int gpr32_set(struct task_struct *target,
688 const struct user_regset *regset,
689 unsigned int pos, unsigned int count,
690 const void *kbuf, const void __user *ubuf)
691{
692 unsigned long *regs = &target->thread.regs->gpr[0];
693 const compat_ulong_t *k = kbuf;
694 const compat_ulong_t __user *u = ubuf;
695 compat_ulong_t reg;
696
697 if (target->thread.regs == NULL)
698 return -EIO;
699
700 CHECK_FULL_REGS(target->thread.regs);
701
702 pos /= sizeof(reg);
703 count /= sizeof(reg);
704
705 if (kbuf)
706 for (; count > 0 && pos < PT_MSR; --count)
707 regs[pos++] = *k++;
708 else
709 for (; count > 0 && pos < PT_MSR; --count) {
710 if (__get_user(reg, u++))
711 return -EFAULT;
712 regs[pos++] = reg;
713 }
714
715
716 if (count > 0 && pos == PT_MSR) {
717 if (kbuf)
718 reg = *k++;
719 else if (__get_user(reg, u++))
720 return -EFAULT;
721 set_user_msr(target, reg);
722 ++pos;
723 --count;
724 }
725
726 if (kbuf) {
727 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
728 regs[pos++] = *k++;
729 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
730 ++k;
731 } else {
732 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
733 if (__get_user(reg, u++))
734 return -EFAULT;
735 regs[pos++] = reg;
736 }
737 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
738 if (__get_user(reg, u++))
739 return -EFAULT;
740 }
741
742 if (count > 0 && pos == PT_TRAP) {
743 if (kbuf)
744 reg = *k++;
745 else if (__get_user(reg, u++))
746 return -EFAULT;
747 set_user_trap(target, reg);
748 ++pos;
749 --count;
750 }
751
752 kbuf = k;
753 ubuf = u;
754 pos *= sizeof(reg);
755 count *= sizeof(reg);
756 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
757 (PT_TRAP + 1) * sizeof(reg), -1);
758}
759
760
761
762
763static const struct user_regset compat_regsets[] = {
764 [REGSET_GPR] = {
765 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
766 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
767 .get = gpr32_get, .set = gpr32_set
768 },
769 [REGSET_FPR] = {
770 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
771 .size = sizeof(double), .align = sizeof(double),
772 .get = fpr_get, .set = fpr_set
773 },
774#ifdef CONFIG_ALTIVEC
775 [REGSET_VMX] = {
776 .core_note_type = NT_PPC_VMX, .n = 34,
777 .size = sizeof(vector128), .align = sizeof(vector128),
778 .active = vr_active, .get = vr_get, .set = vr_set
779 },
780#endif
781#ifdef CONFIG_SPE
782 [REGSET_SPE] = {
783 .core_note_type = NT_PPC_SPE, .n = 35,
784 .size = sizeof(u32), .align = sizeof(u32),
785 .active = evr_active, .get = evr_get, .set = evr_set
786 },
787#endif
788};
789
790static const struct user_regset_view user_ppc_compat_view = {
791 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
792 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
793};
794#endif
795
796const struct user_regset_view *task_user_regset_view(struct task_struct *task)
797{
798#ifdef CONFIG_PPC64
799 if (test_tsk_thread_flag(task, TIF_32BIT))
800 return &user_ppc_compat_view;
801#endif
802 return &user_ppc_native_view;
803}
804
805
806void user_enable_single_step(struct task_struct *task)
807{
808 struct pt_regs *regs = task->thread.regs;
809
810 if (regs != NULL) {
811#ifdef CONFIG_PPC_ADV_DEBUG_REGS
812 task->thread.dbcr0 &= ~DBCR0_BT;
813 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
814 regs->msr |= MSR_DE;
815#else
816 regs->msr &= ~MSR_BE;
817 regs->msr |= MSR_SE;
818#endif
819 }
820 set_tsk_thread_flag(task, TIF_SINGLESTEP);
821}
822
823void user_enable_block_step(struct task_struct *task)
824{
825 struct pt_regs *regs = task->thread.regs;
826
827 if (regs != NULL) {
828#ifdef CONFIG_PPC_ADV_DEBUG_REGS
829 task->thread.dbcr0 &= ~DBCR0_IC;
830 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
831 regs->msr |= MSR_DE;
832#else
833 regs->msr &= ~MSR_SE;
834 regs->msr |= MSR_BE;
835#endif
836 }
837 set_tsk_thread_flag(task, TIF_SINGLESTEP);
838}
839
840void user_disable_single_step(struct task_struct *task)
841{
842 struct pt_regs *regs = task->thread.regs;
843
844 if (regs != NULL) {
845#ifdef CONFIG_PPC_ADV_DEBUG_REGS
846
847
848
849
850
851
852 task->thread.dbcr0 &= ~DBCR0_IC;
853
854
855
856 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
857 task->thread.dbcr1)) {
858
859
860
861 task->thread.dbcr0 &= ~DBCR0_IDM;
862 regs->msr &= ~MSR_DE;
863 }
864#else
865 regs->msr &= ~(MSR_SE | MSR_BE);
866#endif
867 }
868 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
869}
870
871#ifdef CONFIG_HAVE_HW_BREAKPOINT
872void ptrace_triggered(struct perf_event *bp, int nmi,
873 struct perf_sample_data *data, struct pt_regs *regs)
874{
875 struct perf_event_attr attr;
876
877
878
879
880
881
882
883 attr = bp->attr;
884 attr.disabled = true;
885 modify_user_hw_breakpoint(bp, &attr);
886}
887#endif
888
889int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
890 unsigned long data)
891{
892#ifdef CONFIG_HAVE_HW_BREAKPOINT
893 int ret;
894 struct thread_struct *thread = &(task->thread);
895 struct perf_event *bp;
896 struct perf_event_attr attr;
897#endif
898
899
900
901
902
903 if (addr > 0)
904 return -EINVAL;
905
906
907 if ((data & ~0x7UL) >= TASK_SIZE)
908 return -EIO;
909
910#ifndef CONFIG_PPC_ADV_DEBUG_REGS
911
912
913
914
915
916
917
918
919
920
921
922
923
924 if (data && !(data & DABR_TRANSLATION))
925 return -EIO;
926#ifdef CONFIG_HAVE_HW_BREAKPOINT
927 bp = thread->ptrace_bps[0];
928 if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
929 if (bp) {
930 unregister_hw_breakpoint(bp);
931 thread->ptrace_bps[0] = NULL;
932 }
933 return 0;
934 }
935 if (bp) {
936 attr = bp->attr;
937 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
938 arch_bp_generic_fields(data &
939 (DABR_DATA_WRITE | DABR_DATA_READ),
940 &attr.bp_type);
941 ret = modify_user_hw_breakpoint(bp, &attr);
942 if (ret)
943 return ret;
944 thread->ptrace_bps[0] = bp;
945 thread->dabr = data;
946 return 0;
947 }
948
949
950 hw_breakpoint_init(&attr);
951 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
952 arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ),
953 &attr.bp_type);
954
955 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
956 ptrace_triggered, task);
957 if (IS_ERR(bp)) {
958 thread->ptrace_bps[0] = NULL;
959 return PTR_ERR(bp);
960 }
961
962#endif
963
964
965 task->thread.dabr = data;
966#else
967
968
969
970
971
972
973 task->thread.dac1 = data & ~0x3UL;
974
975 if (task->thread.dac1 == 0) {
976 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
977 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
978 task->thread.dbcr1)) {
979 task->thread.regs->msr &= ~MSR_DE;
980 task->thread.dbcr0 &= ~DBCR0_IDM;
981 }
982 return 0;
983 }
984
985
986
987 if (!(data & 0x3UL))
988 return -EINVAL;
989
990
991
992 task->thread.dbcr0 |= DBCR0_IDM;
993
994
995
996 dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
997 if (data & 0x1UL)
998 dbcr_dac(task) |= DBCR_DAC1R;
999 if (data & 0x2UL)
1000 dbcr_dac(task) |= DBCR_DAC1W;
1001 task->thread.regs->msr |= MSR_DE;
1002#endif
1003 return 0;
1004}
1005
1006
1007
1008
1009
1010
1011void ptrace_disable(struct task_struct *child)
1012{
1013
1014 user_disable_single_step(child);
1015}
1016
1017#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1018static long set_intruction_bp(struct task_struct *child,
1019 struct ppc_hw_breakpoint *bp_info)
1020{
1021 int slot;
1022 int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
1023 int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
1024 int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
1025 int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
1026
1027 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1028 slot2_in_use = 1;
1029 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1030 slot4_in_use = 1;
1031
1032 if (bp_info->addr >= TASK_SIZE)
1033 return -EIO;
1034
1035 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1036
1037
1038 if (bp_info->addr2 >= TASK_SIZE)
1039 return -EIO;
1040
1041
1042 if ((!slot1_in_use) && (!slot2_in_use)) {
1043 slot = 1;
1044 child->thread.iac1 = bp_info->addr;
1045 child->thread.iac2 = bp_info->addr2;
1046 child->thread.dbcr0 |= DBCR0_IAC1;
1047 if (bp_info->addr_mode ==
1048 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1049 dbcr_iac_range(child) |= DBCR_IAC12X;
1050 else
1051 dbcr_iac_range(child) |= DBCR_IAC12I;
1052#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1053 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1054 slot = 3;
1055 child->thread.iac3 = bp_info->addr;
1056 child->thread.iac4 = bp_info->addr2;
1057 child->thread.dbcr0 |= DBCR0_IAC3;
1058 if (bp_info->addr_mode ==
1059 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1060 dbcr_iac_range(child) |= DBCR_IAC34X;
1061 else
1062 dbcr_iac_range(child) |= DBCR_IAC34I;
1063#endif
1064 } else
1065 return -ENOSPC;
1066 } else {
1067
1068
1069
1070 if (!slot1_in_use) {
1071
1072
1073
1074
1075 if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1076 slot = 1;
1077 child->thread.iac1 = bp_info->addr;
1078 child->thread.dbcr0 |= DBCR0_IAC1;
1079 goto out;
1080 }
1081 }
1082 if (!slot2_in_use) {
1083 slot = 2;
1084 child->thread.iac2 = bp_info->addr;
1085 child->thread.dbcr0 |= DBCR0_IAC2;
1086#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1087 } else if (!slot3_in_use) {
1088 slot = 3;
1089 child->thread.iac3 = bp_info->addr;
1090 child->thread.dbcr0 |= DBCR0_IAC3;
1091 } else if (!slot4_in_use) {
1092 slot = 4;
1093 child->thread.iac4 = bp_info->addr;
1094 child->thread.dbcr0 |= DBCR0_IAC4;
1095#endif
1096 } else
1097 return -ENOSPC;
1098 }
1099out:
1100 child->thread.dbcr0 |= DBCR0_IDM;
1101 child->thread.regs->msr |= MSR_DE;
1102
1103 return slot;
1104}
1105
1106static int del_instruction_bp(struct task_struct *child, int slot)
1107{
1108 switch (slot) {
1109 case 1:
1110 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1111 return -ENOENT;
1112
1113 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1114
1115 child->thread.iac2 = 0;
1116 dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1117 }
1118 child->thread.iac1 = 0;
1119 child->thread.dbcr0 &= ~DBCR0_IAC1;
1120 break;
1121 case 2:
1122 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1123 return -ENOENT;
1124
1125 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1126
1127 return -EINVAL;
1128 child->thread.iac2 = 0;
1129 child->thread.dbcr0 &= ~DBCR0_IAC2;
1130 break;
1131#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1132 case 3:
1133 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1134 return -ENOENT;
1135
1136 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1137
1138 child->thread.iac4 = 0;
1139 dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1140 }
1141 child->thread.iac3 = 0;
1142 child->thread.dbcr0 &= ~DBCR0_IAC3;
1143 break;
1144 case 4:
1145 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1146 return -ENOENT;
1147
1148 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1149
1150 return -EINVAL;
1151 child->thread.iac4 = 0;
1152 child->thread.dbcr0 &= ~DBCR0_IAC4;
1153 break;
1154#endif
1155 default:
1156 return -EINVAL;
1157 }
1158 return 0;
1159}
1160
1161static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1162{
1163 int byte_enable =
1164 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1165 & 0xf;
1166 int condition_mode =
1167 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1168 int slot;
1169
1170 if (byte_enable && (condition_mode == 0))
1171 return -EINVAL;
1172
1173 if (bp_info->addr >= TASK_SIZE)
1174 return -EIO;
1175
1176 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1177 slot = 1;
1178 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1179 dbcr_dac(child) |= DBCR_DAC1R;
1180 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1181 dbcr_dac(child) |= DBCR_DAC1W;
1182 child->thread.dac1 = (unsigned long)bp_info->addr;
1183#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1184 if (byte_enable) {
1185 child->thread.dvc1 =
1186 (unsigned long)bp_info->condition_value;
1187 child->thread.dbcr2 |=
1188 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1189 (condition_mode << DBCR2_DVC1M_SHIFT));
1190 }
1191#endif
1192#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1193 } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1194
1195 return -ENOSPC;
1196#endif
1197 } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1198 slot = 2;
1199 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1200 dbcr_dac(child) |= DBCR_DAC2R;
1201 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1202 dbcr_dac(child) |= DBCR_DAC2W;
1203 child->thread.dac2 = (unsigned long)bp_info->addr;
1204#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1205 if (byte_enable) {
1206 child->thread.dvc2 =
1207 (unsigned long)bp_info->condition_value;
1208 child->thread.dbcr2 |=
1209 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1210 (condition_mode << DBCR2_DVC2M_SHIFT));
1211 }
1212#endif
1213 } else
1214 return -ENOSPC;
1215 child->thread.dbcr0 |= DBCR0_IDM;
1216 child->thread.regs->msr |= MSR_DE;
1217
1218 return slot + 4;
1219}
1220
1221static int del_dac(struct task_struct *child, int slot)
1222{
1223 if (slot == 1) {
1224 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1225 return -ENOENT;
1226
1227 child->thread.dac1 = 0;
1228 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1229#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1230 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1231 child->thread.dac2 = 0;
1232 child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1233 }
1234 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1235#endif
1236#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1237 child->thread.dvc1 = 0;
1238#endif
1239 } else if (slot == 2) {
1240 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1241 return -ENOENT;
1242
1243#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1244 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1245
1246 return -EINVAL;
1247 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1248#endif
1249#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1250 child->thread.dvc2 = 0;
1251#endif
1252 child->thread.dac2 = 0;
1253 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1254 } else
1255 return -EINVAL;
1256
1257 return 0;
1258}
1259#endif
1260
1261#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1262static int set_dac_range(struct task_struct *child,
1263 struct ppc_hw_breakpoint *bp_info)
1264{
1265 int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1266
1267
1268 if (bp_info->condition_mode)
1269 return -EINVAL;
1270
1271
1272
1273
1274
1275
1276
1277 if (bp_info->addr >= TASK_SIZE)
1278 return -EIO;
1279 if (mode == PPC_BREAKPOINT_MODE_MASK) {
1280
1281
1282
1283
1284 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1285 return -EIO;
1286 } else {
1287
1288
1289
1290 if (bp_info->addr2 >= TASK_SIZE)
1291 return -EIO;
1292 }
1293
1294 if (child->thread.dbcr0 &
1295 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1296 return -ENOSPC;
1297
1298 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1299 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1300 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1301 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1302 child->thread.dac1 = bp_info->addr;
1303 child->thread.dac2 = bp_info->addr2;
1304 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1305 child->thread.dbcr2 |= DBCR2_DAC12M;
1306 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1307 child->thread.dbcr2 |= DBCR2_DAC12MX;
1308 else
1309 child->thread.dbcr2 |= DBCR2_DAC12MM;
1310 child->thread.regs->msr |= MSR_DE;
1311
1312 return 5;
1313}
1314#endif
1315
1316static long ppc_set_hwdebug(struct task_struct *child,
1317 struct ppc_hw_breakpoint *bp_info)
1318{
1319#ifndef CONFIG_PPC_ADV_DEBUG_REGS
1320 unsigned long dabr;
1321#endif
1322
1323 if (bp_info->version != 1)
1324 return -ENOTSUPP;
1325#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1326
1327
1328
1329 if ((bp_info->trigger_type == 0) ||
1330 (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1331 PPC_BREAKPOINT_TRIGGER_RW)) ||
1332 (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1333 (bp_info->condition_mode &
1334 ~(PPC_BREAKPOINT_CONDITION_MODE |
1335 PPC_BREAKPOINT_CONDITION_BE_ALL)))
1336 return -EINVAL;
1337#if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1338 if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1339 return -EINVAL;
1340#endif
1341
1342 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1343 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1344 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1345 return -EINVAL;
1346 return set_intruction_bp(child, bp_info);
1347 }
1348 if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1349 return set_dac(child, bp_info);
1350
1351#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1352 return set_dac_range(child, bp_info);
1353#else
1354 return -EINVAL;
1355#endif
1356#else
1357
1358
1359
1360 if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
1361 (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
1362 bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
1363 bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1364 return -EINVAL;
1365
1366 if (child->thread.dabr)
1367 return -ENOSPC;
1368
1369 if ((unsigned long)bp_info->addr >= TASK_SIZE)
1370 return -EIO;
1371
1372 dabr = (unsigned long)bp_info->addr & ~7UL;
1373 dabr |= DABR_TRANSLATION;
1374 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1375 dabr |= DABR_DATA_READ;
1376 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1377 dabr |= DABR_DATA_WRITE;
1378
1379 child->thread.dabr = dabr;
1380
1381 return 1;
1382#endif
1383}
1384
1385static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1386{
1387#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1388 int rc;
1389
1390 if (data <= 4)
1391 rc = del_instruction_bp(child, (int)data);
1392 else
1393 rc = del_dac(child, (int)data - 4);
1394
1395 if (!rc) {
1396 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1397 child->thread.dbcr1)) {
1398 child->thread.dbcr0 &= ~DBCR0_IDM;
1399 child->thread.regs->msr &= ~MSR_DE;
1400 }
1401 }
1402 return rc;
1403#else
1404 if (data != 1)
1405 return -EINVAL;
1406 if (child->thread.dabr == 0)
1407 return -ENOENT;
1408
1409 child->thread.dabr = 0;
1410
1411 return 0;
1412#endif
1413}
1414
1415
1416
1417
1418
1419static long arch_ptrace_old(struct task_struct *child, long request,
1420 unsigned long addr, unsigned long data)
1421{
1422 void __user *datavp = (void __user *) data;
1423
1424 switch (request) {
1425 case PPC_PTRACE_GETREGS:
1426 return copy_regset_to_user(child, &user_ppc_native_view,
1427 REGSET_GPR, 0, 32 * sizeof(long),
1428 datavp);
1429
1430 case PPC_PTRACE_SETREGS:
1431 return copy_regset_from_user(child, &user_ppc_native_view,
1432 REGSET_GPR, 0, 32 * sizeof(long),
1433 datavp);
1434
1435 case PPC_PTRACE_GETFPREGS:
1436 return copy_regset_to_user(child, &user_ppc_native_view,
1437 REGSET_FPR, 0, 32 * sizeof(double),
1438 datavp);
1439
1440 case PPC_PTRACE_SETFPREGS:
1441 return copy_regset_from_user(child, &user_ppc_native_view,
1442 REGSET_FPR, 0, 32 * sizeof(double),
1443 datavp);
1444 }
1445
1446 return -EPERM;
1447}
1448
1449long arch_ptrace(struct task_struct *child, long request,
1450 unsigned long addr, unsigned long data)
1451{
1452 int ret = -EPERM;
1453 void __user *datavp = (void __user *) data;
1454 unsigned long __user *datalp = datavp;
1455
1456 switch (request) {
1457
1458 case PTRACE_PEEKUSR: {
1459 unsigned long index, tmp;
1460
1461 ret = -EIO;
1462
1463#ifdef CONFIG_PPC32
1464 index = addr >> 2;
1465 if ((addr & 3) || (index > PT_FPSCR)
1466 || (child->thread.regs == NULL))
1467#else
1468 index = addr >> 3;
1469 if ((addr & 7) || (index > PT_FPSCR))
1470#endif
1471 break;
1472
1473 CHECK_FULL_REGS(child->thread.regs);
1474 if (index < PT_FPR0) {
1475 tmp = ptrace_get_reg(child, (int) index);
1476 } else {
1477 flush_fp_to_thread(child);
1478 tmp = ((unsigned long *)child->thread.fpr)
1479 [TS_FPRWIDTH * (index - PT_FPR0)];
1480 }
1481 ret = put_user(tmp, datalp);
1482 break;
1483 }
1484
1485
1486 case PTRACE_POKEUSR: {
1487 unsigned long index;
1488
1489 ret = -EIO;
1490
1491#ifdef CONFIG_PPC32
1492 index = addr >> 2;
1493 if ((addr & 3) || (index > PT_FPSCR)
1494 || (child->thread.regs == NULL))
1495#else
1496 index = addr >> 3;
1497 if ((addr & 7) || (index > PT_FPSCR))
1498#endif
1499 break;
1500
1501 CHECK_FULL_REGS(child->thread.regs);
1502 if (index < PT_FPR0) {
1503 ret = ptrace_put_reg(child, index, data);
1504 } else {
1505 flush_fp_to_thread(child);
1506 ((unsigned long *)child->thread.fpr)
1507 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1508 ret = 0;
1509 }
1510 break;
1511 }
1512
1513 case PPC_PTRACE_GETHWDBGINFO: {
1514 struct ppc_debug_info dbginfo;
1515
1516 dbginfo.version = 1;
1517#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1518 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1519 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1520 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1521 dbginfo.data_bp_alignment = 4;
1522 dbginfo.sizeof_condition = 4;
1523 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1524 PPC_DEBUG_FEATURE_INSN_BP_MASK;
1525#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1526 dbginfo.features |=
1527 PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1528 PPC_DEBUG_FEATURE_DATA_BP_MASK;
1529#endif
1530#else
1531 dbginfo.num_instruction_bps = 0;
1532 dbginfo.num_data_bps = 1;
1533 dbginfo.num_condition_regs = 0;
1534#ifdef CONFIG_PPC64
1535 dbginfo.data_bp_alignment = 8;
1536#else
1537 dbginfo.data_bp_alignment = 4;
1538#endif
1539 dbginfo.sizeof_condition = 0;
1540 dbginfo.features = 0;
1541#endif
1542
1543 if (!access_ok(VERIFY_WRITE, datavp,
1544 sizeof(struct ppc_debug_info)))
1545 return -EFAULT;
1546 ret = __copy_to_user(datavp, &dbginfo,
1547 sizeof(struct ppc_debug_info)) ?
1548 -EFAULT : 0;
1549 break;
1550 }
1551
1552 case PPC_PTRACE_SETHWDEBUG: {
1553 struct ppc_hw_breakpoint bp_info;
1554
1555 if (!access_ok(VERIFY_READ, datavp,
1556 sizeof(struct ppc_hw_breakpoint)))
1557 return -EFAULT;
1558 ret = __copy_from_user(&bp_info, datavp,
1559 sizeof(struct ppc_hw_breakpoint)) ?
1560 -EFAULT : 0;
1561 if (!ret)
1562 ret = ppc_set_hwdebug(child, &bp_info);
1563 break;
1564 }
1565
1566 case PPC_PTRACE_DELHWDEBUG: {
1567 ret = ppc_del_hwdebug(child, addr, data);
1568 break;
1569 }
1570
1571 case PTRACE_GET_DEBUGREG: {
1572 ret = -EINVAL;
1573
1574 if (addr > 0)
1575 break;
1576#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1577 ret = put_user(child->thread.dac1, datalp);
1578#else
1579 ret = put_user(child->thread.dabr, datalp);
1580#endif
1581 break;
1582 }
1583
1584 case PTRACE_SET_DEBUGREG:
1585 ret = ptrace_set_debugreg(child, addr, data);
1586 break;
1587
1588#ifdef CONFIG_PPC64
1589 case PTRACE_GETREGS64:
1590#endif
1591 case PTRACE_GETREGS:
1592 return copy_regset_to_user(child, &user_ppc_native_view,
1593 REGSET_GPR,
1594 0, sizeof(struct pt_regs),
1595 datavp);
1596
1597#ifdef CONFIG_PPC64
1598 case PTRACE_SETREGS64:
1599#endif
1600 case PTRACE_SETREGS:
1601 return copy_regset_from_user(child, &user_ppc_native_view,
1602 REGSET_GPR,
1603 0, sizeof(struct pt_regs),
1604 datavp);
1605
1606 case PTRACE_GETFPREGS:
1607 return copy_regset_to_user(child, &user_ppc_native_view,
1608 REGSET_FPR,
1609 0, sizeof(elf_fpregset_t),
1610 datavp);
1611
1612 case PTRACE_SETFPREGS:
1613 return copy_regset_from_user(child, &user_ppc_native_view,
1614 REGSET_FPR,
1615 0, sizeof(elf_fpregset_t),
1616 datavp);
1617
1618#ifdef CONFIG_ALTIVEC
1619 case PTRACE_GETVRREGS:
1620 return copy_regset_to_user(child, &user_ppc_native_view,
1621 REGSET_VMX,
1622 0, (33 * sizeof(vector128) +
1623 sizeof(u32)),
1624 datavp);
1625
1626 case PTRACE_SETVRREGS:
1627 return copy_regset_from_user(child, &user_ppc_native_view,
1628 REGSET_VMX,
1629 0, (33 * sizeof(vector128) +
1630 sizeof(u32)),
1631 datavp);
1632#endif
1633#ifdef CONFIG_VSX
1634 case PTRACE_GETVSRREGS:
1635 return copy_regset_to_user(child, &user_ppc_native_view,
1636 REGSET_VSX,
1637 0, 32 * sizeof(double),
1638 datavp);
1639
1640 case PTRACE_SETVSRREGS:
1641 return copy_regset_from_user(child, &user_ppc_native_view,
1642 REGSET_VSX,
1643 0, 32 * sizeof(double),
1644 datavp);
1645#endif
1646#ifdef CONFIG_SPE
1647 case PTRACE_GETEVRREGS:
1648
1649 return copy_regset_to_user(child, &user_ppc_native_view,
1650 REGSET_SPE, 0, 35 * sizeof(u32),
1651 datavp);
1652
1653 case PTRACE_SETEVRREGS:
1654
1655 return copy_regset_from_user(child, &user_ppc_native_view,
1656 REGSET_SPE, 0, 35 * sizeof(u32),
1657 datavp);
1658#endif
1659
1660
1661 case PPC_PTRACE_GETREGS:
1662 case PPC_PTRACE_SETREGS:
1663 case PPC_PTRACE_GETFPREGS:
1664 case PPC_PTRACE_SETFPREGS:
1665 ret = arch_ptrace_old(child, request, addr, data);
1666 break;
1667
1668 default:
1669 ret = ptrace_request(child, request, addr, data);
1670 break;
1671 }
1672 return ret;
1673}
1674
1675
1676
1677
1678
1679long do_syscall_trace_enter(struct pt_regs *regs)
1680{
1681 long ret = 0;
1682
1683 secure_computing(regs->gpr[0]);
1684
1685 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1686 tracehook_report_syscall_entry(regs))
1687
1688
1689
1690
1691
1692 ret = -1L;
1693
1694 if (unlikely(current->audit_context)) {
1695#ifdef CONFIG_PPC64
1696 if (!is_32bit_task())
1697 audit_syscall_entry(AUDIT_ARCH_PPC64,
1698 regs->gpr[0],
1699 regs->gpr[3], regs->gpr[4],
1700 regs->gpr[5], regs->gpr[6]);
1701 else
1702#endif
1703 audit_syscall_entry(AUDIT_ARCH_PPC,
1704 regs->gpr[0],
1705 regs->gpr[3] & 0xffffffff,
1706 regs->gpr[4] & 0xffffffff,
1707 regs->gpr[5] & 0xffffffff,
1708 regs->gpr[6] & 0xffffffff);
1709 }
1710
1711 return ret ?: regs->gpr[0];
1712}
1713
1714void do_syscall_trace_leave(struct pt_regs *regs)
1715{
1716 int step;
1717
1718 if (unlikely(current->audit_context))
1719 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1720 regs->result);
1721
1722 step = test_thread_flag(TIF_SINGLESTEP);
1723 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1724 tracehook_report_syscall_exit(regs, step);
1725}
1726