linux/arch/powerpc/mm/fsl_booke_mmu.c
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   1/*
   2 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
   3 * E500 Book E processors.
   4 *
   5 * Copyright 2004,2010 Freescale Semiconductor, Inc.
   6 *
   7 * This file contains the routines for initializing the MMU
   8 * on the 4xx series of chips.
   9 *  -- paulus
  10 *
  11 *  Derived from arch/ppc/mm/init.c:
  12 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  13 *
  14 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  15 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  16 *    Copyright (C) 1996 Paul Mackerras
  17 *
  18 *  Derived from "arch/i386/mm/init.c"
  19 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  20 *
  21 *  This program is free software; you can redistribute it and/or
  22 *  modify it under the terms of the GNU General Public License
  23 *  as published by the Free Software Foundation; either version
  24 *  2 of the License, or (at your option) any later version.
  25 *
  26 */
  27
  28#include <linux/signal.h>
  29#include <linux/sched.h>
  30#include <linux/kernel.h>
  31#include <linux/errno.h>
  32#include <linux/string.h>
  33#include <linux/types.h>
  34#include <linux/ptrace.h>
  35#include <linux/mman.h>
  36#include <linux/mm.h>
  37#include <linux/swap.h>
  38#include <linux/stddef.h>
  39#include <linux/vmalloc.h>
  40#include <linux/init.h>
  41#include <linux/delay.h>
  42#include <linux/highmem.h>
  43#include <linux/memblock.h>
  44
  45#include <asm/pgalloc.h>
  46#include <asm/prom.h>
  47#include <asm/io.h>
  48#include <asm/mmu_context.h>
  49#include <asm/pgtable.h>
  50#include <asm/mmu.h>
  51#include <asm/uaccess.h>
  52#include <asm/smp.h>
  53#include <asm/machdep.h>
  54#include <asm/setup.h>
  55
  56#include "mmu_decl.h"
  57
  58unsigned int tlbcam_index;
  59
  60#define NUM_TLBCAMS     (64)
  61struct tlbcam TLBCAM[NUM_TLBCAMS];
  62
  63struct tlbcamrange {
  64        unsigned long start;
  65        unsigned long limit;
  66        phys_addr_t phys;
  67} tlbcam_addrs[NUM_TLBCAMS];
  68
  69extern unsigned int tlbcam_index;
  70
  71unsigned long tlbcam_sz(int idx)
  72{
  73        return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
  74}
  75
  76/*
  77 * Return PA for this VA if it is mapped by a CAM, or 0
  78 */
  79phys_addr_t v_mapped_by_tlbcam(unsigned long va)
  80{
  81        int b;
  82        for (b = 0; b < tlbcam_index; ++b)
  83                if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
  84                        return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
  85        return 0;
  86}
  87
  88/*
  89 * Return VA for a given PA or 0 if not mapped
  90 */
  91unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
  92{
  93        int b;
  94        for (b = 0; b < tlbcam_index; ++b)
  95                if (pa >= tlbcam_addrs[b].phys
  96                        && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
  97                              +tlbcam_addrs[b].phys)
  98                        return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
  99        return 0;
 100}
 101
 102/*
 103 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
 104 * in particular size must be a power of 4 between 4k and 256M (or 1G, for cpus
 105 * that support extended page sizes).  Note that while some cpus support a
 106 * page size of 4G, we don't allow its use here.
 107 */
 108static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
 109                unsigned long size, unsigned long flags, unsigned int pid)
 110{
 111        unsigned int tsize, lz;
 112
 113        asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
 114        tsize = 21 - lz;
 115
 116#ifdef CONFIG_SMP
 117        if ((flags & _PAGE_NO_CACHE) == 0)
 118                flags |= _PAGE_COHERENT;
 119#endif
 120
 121        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
 122        TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
 123        TLBCAM[index].MAS2 = virt & PAGE_MASK;
 124
 125        TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
 126        TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
 127        TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
 128        TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
 129        TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
 130
 131        TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
 132        TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
 133        if (mmu_has_feature(MMU_FTR_BIG_PHYS))
 134                TLBCAM[index].MAS7 = (u64)phys >> 32;
 135
 136        /* Below is unlikely -- only for large user pages or similar */
 137        if (pte_user(flags)) {
 138           TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
 139           TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
 140        }
 141
 142        tlbcam_addrs[index].start = virt;
 143        tlbcam_addrs[index].limit = virt + size - 1;
 144        tlbcam_addrs[index].phys = phys;
 145
 146        loadcam_entry(index);
 147}
 148
 149unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
 150{
 151        int i;
 152        unsigned long virt = PAGE_OFFSET;
 153        phys_addr_t phys = memstart_addr;
 154        unsigned long amount_mapped = 0;
 155        unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
 156
 157        /* Convert (4^max) kB to (2^max) bytes */
 158        max_cam = max_cam * 2 + 10;
 159
 160        /* Calculate CAM values */
 161        for (i = 0; ram && i < max_cam_idx; i++) {
 162                unsigned int camsize = __ilog2(ram) & ~1U;
 163                unsigned int align = __ffs(virt | phys) & ~1U;
 164                unsigned long cam_sz;
 165
 166                if (camsize > align)
 167                        camsize = align;
 168                if (camsize > max_cam)
 169                        camsize = max_cam;
 170
 171                cam_sz = 1UL << camsize;
 172                settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
 173
 174                ram -= cam_sz;
 175                amount_mapped += cam_sz;
 176                virt += cam_sz;
 177                phys += cam_sz;
 178        }
 179        tlbcam_index = i;
 180
 181        return amount_mapped;
 182}
 183
 184#ifdef CONFIG_PPC32
 185
 186#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
 187#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
 188#endif
 189
 190unsigned long __init mmu_mapin_ram(unsigned long top)
 191{
 192        return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
 193}
 194
 195/*
 196 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 197 */
 198void __init MMU_init_hw(void)
 199{
 200        flush_instruction_cache();
 201}
 202
 203void __init adjust_total_lowmem(void)
 204{
 205        unsigned long ram;
 206        int i;
 207
 208        /* adjust lowmem size to __max_low_memory */
 209        ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
 210
 211        __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
 212
 213        pr_info("Memory CAM mapping: ");
 214        for (i = 0; i < tlbcam_index - 1; i++)
 215                pr_cont("%lu/", tlbcam_sz(i) >> 20);
 216        pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
 217                (unsigned int)((total_lowmem - __max_low_memory) >> 20));
 218
 219        memblock_set_current_limit(memstart_addr + __max_low_memory);
 220}
 221
 222void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 223                                phys_addr_t first_memblock_size)
 224{
 225        phys_addr_t limit = first_memblock_base + first_memblock_size;
 226
 227        /* 64M mapped initially according to head_fsl_booke.S */
 228        memblock_set_current_limit(min_t(u64, limit, 0x04000000));
 229}
 230#endif
 231