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13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/fsl_devices.h>
16#include <linux/mdio-bitbang.h>
17#include <linux/of_mdio.h>
18#include <linux/slab.h>
19#include <linux/of_platform.h>
20
21#include <asm/io.h>
22#include <asm/cpm2.h>
23#include <asm/udbg.h>
24#include <asm/machdep.h>
25#include <asm/time.h>
26#include <asm/mpc8260.h>
27#include <asm/prom.h>
28
29#include <sysdev/fsl_soc.h>
30#include <sysdev/cpm2_pic.h>
31
32#include "pq2.h"
33
34static u8 __iomem *ep8248e_bcsr;
35static struct device_node *ep8248e_bcsr_node;
36
37#define BCSR7_SCC2_ENABLE 0x10
38
39#define BCSR8_PHY1_ENABLE 0x80
40#define BCSR8_PHY1_POWER 0x40
41#define BCSR8_PHY2_ENABLE 0x20
42#define BCSR8_PHY2_POWER 0x10
43#define BCSR8_MDIO_READ 0x04
44#define BCSR8_MDIO_CLOCK 0x02
45#define BCSR8_MDIO_DATA 0x01
46
47#define BCSR9_USB_ENABLE 0x80
48#define BCSR9_USB_POWER 0x40
49#define BCSR9_USB_HOST 0x20
50#define BCSR9_USB_FULL_SPEED_TARGET 0x10
51
52static void __init ep8248e_pic_init(void)
53{
54 struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
55 if (!np) {
56 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
57 return;
58 }
59
60 cpm2_pic_init(np);
61 of_node_put(np);
62}
63
64static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
65{
66 if (level)
67 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
68 else
69 clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
70
71
72 in_8(&ep8248e_bcsr[8]);
73}
74
75static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
76{
77 if (output)
78 clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
79 else
80 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
81
82
83 in_8(&ep8248e_bcsr[8]);
84}
85
86static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
87{
88 if (data)
89 setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
90 else
91 clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
92
93
94 in_8(&ep8248e_bcsr[8]);
95}
96
97static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
98{
99 return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
100}
101
102static const struct mdiobb_ops ep8248e_mdio_ops = {
103 .set_mdc = ep8248e_set_mdc,
104 .set_mdio_dir = ep8248e_set_mdio_dir,
105 .set_mdio_data = ep8248e_set_mdio_data,
106 .get_mdio_data = ep8248e_get_mdio_data,
107 .owner = THIS_MODULE,
108};
109
110static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
111 .ops = &ep8248e_mdio_ops,
112};
113
114static int __devinit ep8248e_mdio_probe(struct platform_device *ofdev,
115 const struct of_device_id *match)
116{
117 struct mii_bus *bus;
118 struct resource res;
119 struct device_node *node;
120 int ret;
121
122 node = of_get_parent(ofdev->dev.of_node);
123 of_node_put(node);
124 if (node != ep8248e_bcsr_node)
125 return -ENODEV;
126
127 ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
128 if (ret)
129 return ret;
130
131 bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
132 if (!bus)
133 return -ENOMEM;
134
135 bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
136 if (bus->irq == NULL) {
137 ret = -ENOMEM;
138 goto err_free_bus;
139 }
140
141 bus->name = "ep8248e-mdio-bitbang";
142 bus->parent = &ofdev->dev;
143 snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
144
145 ret = of_mdiobus_register(bus, ofdev->dev.of_node);
146 if (ret)
147 goto err_free_irq;
148
149 return 0;
150err_free_irq:
151 kfree(bus->irq);
152err_free_bus:
153 free_mdio_bitbang(bus);
154 return ret;
155}
156
157static int ep8248e_mdio_remove(struct platform_device *ofdev)
158{
159 BUG();
160 return 0;
161}
162
163static const struct of_device_id ep8248e_mdio_match[] = {
164 {
165 .compatible = "fsl,ep8248e-mdio-bitbang",
166 },
167 {},
168};
169
170static struct of_platform_driver ep8248e_mdio_driver = {
171 .driver = {
172 .name = "ep8248e-mdio-bitbang",
173 .owner = THIS_MODULE,
174 .of_match_table = ep8248e_mdio_match,
175 },
176 .probe = ep8248e_mdio_probe,
177 .remove = ep8248e_mdio_remove,
178};
179
180struct cpm_pin {
181 int port, pin, flags;
182};
183
184static __initdata struct cpm_pin ep8248e_pins[] = {
185
186 {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
187 {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
188
189
190 {2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
191 {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
192 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
193 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
194 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
195
196
197 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
198 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
199 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
200 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
201 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
202 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
203 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
204 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
205 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
206 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
207 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
208 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
209 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
210 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
211 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
212 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
213
214
215 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
216 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
217 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
218 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
219 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
220 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
221 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
222 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
223 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
224 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
225 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
226 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
227 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
228 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
229 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
230 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
231
232
233 {4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
234 {4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
235
236
237 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
238 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
239 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
240 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
241 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
242 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
243 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
244};
245
246static void __init init_ioports(void)
247{
248 int i;
249
250 for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
251 const struct cpm_pin *pin = &ep8248e_pins[i];
252 cpm2_set_pin(pin->port, pin->pin, pin->flags);
253 }
254
255 cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
256 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
257 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
258 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX);
259 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
260 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
261 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
262 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
263}
264
265static void __init ep8248e_setup_arch(void)
266{
267 if (ppc_md.progress)
268 ppc_md.progress("ep8248e_setup_arch()", 0);
269
270 cpm2_reset();
271
272
273
274
275 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
276
277 ep8248e_bcsr_node =
278 of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
279 if (!ep8248e_bcsr_node) {
280 printk(KERN_ERR "No bcsr in device tree\n");
281 return;
282 }
283
284 ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
285 if (!ep8248e_bcsr) {
286 printk(KERN_ERR "Cannot map BCSR registers\n");
287 of_node_put(ep8248e_bcsr_node);
288 ep8248e_bcsr_node = NULL;
289 return;
290 }
291
292 setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
293 setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
294 BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
295
296 init_ioports();
297
298 if (ppc_md.progress)
299 ppc_md.progress("ep8248e_setup_arch(), finish", 0);
300}
301
302static __initdata struct of_device_id of_bus_ids[] = {
303 { .compatible = "simple-bus", },
304 { .compatible = "fsl,ep8248e-bcsr", },
305 {},
306};
307
308static int __init declare_of_platform_devices(void)
309{
310 of_platform_bus_probe(NULL, of_bus_ids, NULL);
311 of_register_platform_driver(&ep8248e_mdio_driver);
312
313 return 0;
314}
315machine_device_initcall(ep8248e, declare_of_platform_devices);
316
317
318
319
320static int __init ep8248e_probe(void)
321{
322 unsigned long root = of_get_flat_dt_root();
323 return of_flat_dt_is_compatible(root, "fsl,ep8248e");
324}
325
326define_machine(ep8248e)
327{
328 .name = "Embedded Planet EP8248E",
329 .probe = ep8248e_probe,
330 .setup_arch = ep8248e_setup_arch,
331 .init_IRQ = ep8248e_pic_init,
332 .get_irq = cpm2_get_irq,
333 .calibrate_decr = generic_calibrate_decr,
334 .restart = pq2_restart,
335 .progress = udbg_progress,
336};
337
