LXR linux/arch/sh/boards/mach-sdk7786/fpga.c

   1/*
   2 * SDK7786 FPGA Support.
   3 *
   4 * Copyright (C) 2010  Paul Mundt
   5 *
   6 * This file is subject to the terms and conditions of the GNU General Public
   7 * License.  See the file "COPYING" in the main directory of this archive
   8 * for more details.
   9 */
  10#include <linux/init.h>
  11#include <linux/io.h>
  12#include <linux/bcd.h>
  13#include <mach/fpga.h>
  14#include <asm/sizes.h>
  15
  16#define FPGA_REGS_OFFSET        0x03fff800
  17#define FPGA_REGS_SIZE          0x490
  18
  19/*
  20 * The FPGA can be mapped in any of the generally available areas,
  21 * so we attempt to scan for it using the fixed SRSTR read magic.
  22 *
  23 * Once the FPGA is located, the rest of the mapping data for the other
  24 * components can be determined dynamically from its section mapping
  25 * registers.
  26 */
  27static void __iomem *sdk7786_fpga_probe(void)
  28{
  29        unsigned long area;
  30        void __iomem *base;
  31
  32        /*
  33         * Iterate over all of the areas where the FPGA could be mapped.
  34         * The possible range is anywhere from area 0 through 6, area 7
  35         * is reserved.
  36         */
  37        for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
  38                base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
  39                if (!base) {
  40                        /* Failed to remap this area, move along. */
  41                        continue;
  42                }
  43
  44                if (ioread16(base + SRSTR) == SRSTR_MAGIC)
  45                        return base;    /* Found it! */
  46
  47                iounmap(base);
  48        }
  49
  50        return NULL;
  51}
  52
  53void __iomem *sdk7786_fpga_base;
  54
  55void __init sdk7786_fpga_init(void)
  56{
  57        u16 version, date;
  58
  59        sdk7786_fpga_base = sdk7786_fpga_probe();
  60        if (unlikely(!sdk7786_fpga_base)) {
  61                panic("FPGA detection failed.\n");
  62                return;
  63        }
  64
  65        version = fpga_read_reg(FPGAVR);
  66        date = fpga_read_reg(FPGADR);
  67
  68        pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n",
  69                bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf),
  70                ((date >> 12) & 0xf) + 2000,
  71                (date >> 8) & 0xf, bcd2bin(date & 0xff));
  72}
  73