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17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/sched.h>
20#include <linux/kernel.h>
21#include <linux/param.h>
22#include <linux/string.h>
23#include <linux/mm.h>
24#include <linux/interrupt.h>
25#include <linux/time.h>
26#include <linux/rtc.h>
27#include <linux/rtc/m48t59.h>
28#include <linux/timex.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/ioport.h>
32#include <linux/profile.h>
33#include <linux/of.h>
34#include <linux/of_device.h>
35#include <linux/platform_device.h>
36
37#include <asm/oplib.h>
38#include <asm/timex.h>
39#include <asm/timer.h>
40#include <asm/system.h>
41#include <asm/irq.h>
42#include <asm/io.h>
43#include <asm/idprom.h>
44#include <asm/machines.h>
45#include <asm/page.h>
46#include <asm/pcic.h>
47#include <asm/irq_regs.h>
48
49#include "irq.h"
50
51DEFINE_SPINLOCK(rtc_lock);
52EXPORT_SYMBOL(rtc_lock);
53
54static int set_rtc_mmss(unsigned long);
55
56unsigned long profile_pc(struct pt_regs *regs)
57{
58 extern char __copy_user_begin[], __copy_user_end[];
59 extern char __atomic_begin[], __atomic_end[];
60 extern char __bzero_begin[], __bzero_end[];
61
62 unsigned long pc = regs->pc;
63
64 if (in_lock_functions(pc) ||
65 (pc >= (unsigned long) __copy_user_begin &&
66 pc < (unsigned long) __copy_user_end) ||
67 (pc >= (unsigned long) __atomic_begin &&
68 pc < (unsigned long) __atomic_end) ||
69 (pc >= (unsigned long) __bzero_begin &&
70 pc < (unsigned long) __bzero_end))
71 pc = regs->u_regs[UREG_RETPC];
72 return pc;
73}
74
75EXPORT_SYMBOL(profile_pc);
76
77__volatile__ unsigned int *master_l10_counter;
78
79u32 (*do_arch_gettimeoffset)(void);
80
81int update_persistent_clock(struct timespec now)
82{
83 return set_rtc_mmss(now.tv_sec);
84}
85
86
87
88
89
90
91#define TICK_SIZE (tick_nsec / 1000)
92
93static irqreturn_t timer_interrupt(int dummy, void *dev_id)
94{
95#ifndef CONFIG_SMP
96 profile_tick(CPU_PROFILING);
97#endif
98
99
100 write_seqlock(&xtime_lock);
101
102 clear_clock_irq();
103
104 do_timer(1);
105
106 write_sequnlock(&xtime_lock);
107
108#ifndef CONFIG_SMP
109 update_process_times(user_mode(get_irq_regs()));
110#endif
111 return IRQ_HANDLED;
112}
113
114static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
115{
116 struct platform_device *pdev = to_platform_device(dev);
117 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
118
119 return readb(pdata->ioaddr + ofs);
120}
121
122static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
123{
124 struct platform_device *pdev = to_platform_device(dev);
125 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
126
127 writeb(val, pdata->ioaddr + ofs);
128}
129
130static struct m48t59_plat_data m48t59_data = {
131 .read_byte = mostek_read_byte,
132 .write_byte = mostek_write_byte,
133};
134
135
136static struct platform_device m48t59_rtc = {
137 .name = "rtc-m48t59",
138 .id = 0,
139 .num_resources = 1,
140 .dev = {
141 .platform_data = &m48t59_data,
142 },
143};
144
145static int __devinit clock_probe(struct platform_device *op, const struct of_device_id *match)
146{
147 struct device_node *dp = op->dev.of_node;
148 const char *model = of_get_property(dp, "model", NULL);
149
150 if (!model)
151 return -ENODEV;
152
153 m48t59_rtc.resource = &op->resource[0];
154 if (!strcmp(model, "mk48t02")) {
155
156 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
157 2048, "rtc-m48t59");
158 m48t59_data.type = M48T59RTC_TYPE_M48T02;
159 } else if (!strcmp(model, "mk48t08")) {
160 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
161 8192, "rtc-m48t59");
162 m48t59_data.type = M48T59RTC_TYPE_M48T08;
163 } else
164 return -ENODEV;
165
166 if (platform_device_register(&m48t59_rtc) < 0)
167 printk(KERN_ERR "Registering RTC device failed\n");
168
169 return 0;
170}
171
172static struct of_device_id __initdata clock_match[] = {
173 {
174 .name = "eeprom",
175 },
176 {},
177};
178
179static struct of_platform_driver clock_driver = {
180 .probe = clock_probe,
181 .driver = {
182 .name = "rtc",
183 .owner = THIS_MODULE,
184 .of_match_table = clock_match,
185 },
186};
187
188
189
190static int __init clock_init(void)
191{
192 return of_register_platform_driver(&clock_driver);
193}
194
195
196
197
198fs_initcall(clock_init);
199
200
201u32 sbus_do_gettimeoffset(void)
202{
203 unsigned long val = *master_l10_counter;
204 unsigned long usec = (val >> 10) & 0x1fffff;
205
206
207 if (val & 0x80000000)
208 usec += 1000000 / HZ;
209
210 return usec * 1000;
211}
212
213
214u32 arch_gettimeoffset(void)
215{
216 if (unlikely(!do_arch_gettimeoffset))
217 return 0;
218 return do_arch_gettimeoffset();
219}
220
221static void __init sbus_time_init(void)
222{
223 do_arch_gettimeoffset = sbus_do_gettimeoffset;
224
225 btfixup();
226
227 sparc_init_timers(timer_interrupt);
228}
229
230void __init time_init(void)
231{
232#ifdef CONFIG_PCI
233 extern void pci_time_init(void);
234 if (pcic_present()) {
235 pci_time_init();
236 return;
237 }
238#endif
239 sbus_time_init();
240}
241
242
243static int set_rtc_mmss(unsigned long secs)
244{
245 struct rtc_device *rtc = rtc_class_open("rtc0");
246 int err = -1;
247
248 if (rtc) {
249 err = rtc_set_mmss(rtc, secs);
250 rtc_class_close(rtc);
251 }
252
253 return err;
254}
255