1#ifndef _ASM_X86_ATOMIC_H
2#define _ASM_X86_ATOMIC_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6#include <asm/processor.h>
7#include <asm/alternative.h>
8#include <asm/cmpxchg.h>
9
10
11
12
13
14
15#define ATOMIC_INIT(i) { (i) }
16
17
18
19
20
21
22
23static inline int atomic_read(const atomic_t *v)
24{
25 return (*(volatile int *)&(v)->counter);
26}
27
28
29
30
31
32
33
34
35static inline void atomic_set(atomic_t *v, int i)
36{
37 v->counter = i;
38}
39
40
41
42
43
44
45
46
47static inline void atomic_add(int i, atomic_t *v)
48{
49 asm volatile(LOCK_PREFIX "addl %1,%0"
50 : "+m" (v->counter)
51 : "ir" (i));
52}
53
54
55
56
57
58
59
60
61static inline void atomic_sub(int i, atomic_t *v)
62{
63 asm volatile(LOCK_PREFIX "subl %1,%0"
64 : "+m" (v->counter)
65 : "ir" (i));
66}
67
68
69
70
71
72
73
74
75
76
77static inline int atomic_sub_and_test(int i, atomic_t *v)
78{
79 unsigned char c;
80
81 asm volatile(LOCK_PREFIX "subl %2,%0; sete %1"
82 : "+m" (v->counter), "=qm" (c)
83 : "ir" (i) : "memory");
84 return c;
85}
86
87
88
89
90
91
92
93static inline void atomic_inc(atomic_t *v)
94{
95 asm volatile(LOCK_PREFIX "incl %0"
96 : "+m" (v->counter));
97}
98
99
100
101
102
103
104
105static inline void atomic_dec(atomic_t *v)
106{
107 asm volatile(LOCK_PREFIX "decl %0"
108 : "+m" (v->counter));
109}
110
111
112
113
114
115
116
117
118
119static inline int atomic_dec_and_test(atomic_t *v)
120{
121 unsigned char c;
122
123 asm volatile(LOCK_PREFIX "decl %0; sete %1"
124 : "+m" (v->counter), "=qm" (c)
125 : : "memory");
126 return c != 0;
127}
128
129
130
131
132
133
134
135
136
137static inline int atomic_inc_and_test(atomic_t *v)
138{
139 unsigned char c;
140
141 asm volatile(LOCK_PREFIX "incl %0; sete %1"
142 : "+m" (v->counter), "=qm" (c)
143 : : "memory");
144 return c != 0;
145}
146
147
148
149
150
151
152
153
154
155
156static inline int atomic_add_negative(int i, atomic_t *v)
157{
158 unsigned char c;
159
160 asm volatile(LOCK_PREFIX "addl %2,%0; sets %1"
161 : "+m" (v->counter), "=qm" (c)
162 : "ir" (i) : "memory");
163 return c;
164}
165
166
167
168
169
170
171
172
173static inline int atomic_add_return(int i, atomic_t *v)
174{
175 int __i;
176#ifdef CONFIG_M386
177 unsigned long flags;
178 if (unlikely(boot_cpu_data.x86 <= 3))
179 goto no_xadd;
180#endif
181
182 __i = i;
183 asm volatile(LOCK_PREFIX "xaddl %0, %1"
184 : "+r" (i), "+m" (v->counter)
185 : : "memory");
186 return i + __i;
187
188#ifdef CONFIG_M386
189no_xadd:
190 raw_local_irq_save(flags);
191 __i = atomic_read(v);
192 atomic_set(v, i + __i);
193 raw_local_irq_restore(flags);
194 return i + __i;
195#endif
196}
197
198
199
200
201
202
203
204
205static inline int atomic_sub_return(int i, atomic_t *v)
206{
207 return atomic_add_return(-i, v);
208}
209
210#define atomic_inc_return(v) (atomic_add_return(1, v))
211#define atomic_dec_return(v) (atomic_sub_return(1, v))
212
213static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
214{
215 return cmpxchg(&v->counter, old, new);
216}
217
218static inline int atomic_xchg(atomic_t *v, int new)
219{
220 return xchg(&v->counter, new);
221}
222
223
224
225
226
227
228
229
230
231
232static inline int atomic_add_unless(atomic_t *v, int a, int u)
233{
234 int c, old;
235 c = atomic_read(v);
236 for (;;) {
237 if (unlikely(c == (u)))
238 break;
239 old = atomic_cmpxchg((v), c, c + (a));
240 if (likely(old == c))
241 break;
242 c = old;
243 }
244 return c != (u);
245}
246
247#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
248
249
250
251
252
253
254
255
256static inline int atomic_dec_if_positive(atomic_t *v)
257{
258 int c, old, dec;
259 c = atomic_read(v);
260 for (;;) {
261 dec = c - 1;
262 if (unlikely(dec < 0))
263 break;
264 old = atomic_cmpxchg((v), c, dec);
265 if (likely(old == c))
266 break;
267 c = old;
268 }
269 return dec;
270}
271
272
273
274
275
276
277
278
279static inline short int atomic_inc_short(short int *v)
280{
281 asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));
282 return *v;
283}
284
285#ifdef CONFIG_X86_64
286
287
288
289
290
291
292
293
294static inline void atomic_or_long(unsigned long *v1, unsigned long v2)
295{
296 asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2));
297}
298#endif
299
300
301#define atomic_clear_mask(mask, addr) \
302 asm volatile(LOCK_PREFIX "andl %0,%1" \
303 : : "r" (~(mask)), "m" (*(addr)) : "memory")
304
305#define atomic_set_mask(mask, addr) \
306 asm volatile(LOCK_PREFIX "orl %0,%1" \
307 : : "r" ((unsigned)(mask)), "m" (*(addr)) \
308 : "memory")
309
310
311#define smp_mb__before_atomic_dec() barrier()
312#define smp_mb__after_atomic_dec() barrier()
313#define smp_mb__before_atomic_inc() barrier()
314#define smp_mb__after_atomic_inc() barrier()
315
316#ifdef CONFIG_X86_32
317# include "atomic64_32.h"
318#else
319# include "atomic64_64.h"
320#endif
321
322#include <asm-generic/atomic-long.h>
323#endif
324