LXR linux/arch/x86/kernel/early-quirks.c

   1/* Various workarounds for chipset bugs.
   2   This code runs very early and can't use the regular PCI subsystem
   3   The entries are keyed to PCI bridges which usually identify chipsets
   4   uniquely.
   5   This is only for whole classes of chipsets with specific problems which
   6   need early invasive action (e.g. before the timers are initialized).
   7   Most PCI device specific workarounds can be done later and should be
   8   in standard PCI quirks
   9   Mainboard specific bugs should be handled by DMI entries.
  10   CPU specific bugs in setup.c */
  11
  12#include <linux/pci.h>
  13#include <linux/acpi.h>
  14#include <linux/pci_ids.h>
  15#include <asm/pci-direct.h>
  16#include <asm/dma.h>
  17#include <asm/io_apic.h>
  18#include <asm/apic.h>
  19#include <asm/iommu.h>
  20#include <asm/gart.h>
  21
  22static void __init fix_hypertransport_config(int num, int slot, int func)
  23{
  24        u32 htcfg;
  25        /*
  26         * we found a hypertransport bus
  27         * make sure that we are broadcasting
  28         * interrupts to all cpus on the ht bus
  29         * if we're using extended apic ids
  30         */
  31        htcfg = read_pci_config(num, slot, func, 0x68);
  32        if (htcfg & (1 << 18)) {
  33                printk(KERN_INFO "Detected use of extended apic ids "
  34                                 "on hypertransport bus\n");
  35                if ((htcfg & (1 << 17)) == 0) {
  36                        printk(KERN_INFO "Enabling hypertransport extended "
  37                                         "apic interrupt broadcast\n");
  38                        printk(KERN_INFO "Note this is a bios bug, "
  39                                         "please contact your hw vendor\n");
  40                        htcfg |= (1 << 17);
  41                        write_pci_config(num, slot, func, 0x68, htcfg);
  42                }
  43        }
  44
  45
  46}
  47
  48static void __init via_bugs(int  num, int slot, int func)
  49{
  50#ifdef CONFIG_GART_IOMMU
  51        if ((max_pfn > MAX_DMA32_PFN ||  force_iommu) &&
  52            !gart_iommu_aperture_allowed) {
  53                printk(KERN_INFO
  54                       "Looks like a VIA chipset. Disabling IOMMU."
  55                       " Override with iommu=allowed\n");
  56                gart_iommu_aperture_disabled = 1;
  57        }
  58#endif
  59}
  60
  61#ifdef CONFIG_ACPI
  62#ifdef CONFIG_X86_IO_APIC
  63
  64static int __init nvidia_hpet_check(struct acpi_table_header *header)
  65{
  66        return 0;
  67}
  68#endif /* CONFIG_X86_IO_APIC */
  69#endif /* CONFIG_ACPI */
  70
  71static void __init nvidia_bugs(int num, int slot, int func)
  72{
  73#ifdef CONFIG_ACPI
  74#ifdef CONFIG_X86_IO_APIC
  75        /*
  76         * All timer overrides on Nvidia are
  77         * wrong unless HPET is enabled.
  78         * Unfortunately that's not true on many Asus boards.
  79         * We don't know yet how to detect this automatically, but
  80         * at least allow a command line override.
  81         */
  82        if (acpi_use_timer_override)
  83                return;
  84
  85        if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
  86                acpi_skip_timer_override = 1;
  87                printk(KERN_INFO "Nvidia board "
  88                       "detected. Ignoring ACPI "
  89                       "timer override.\n");
  90                printk(KERN_INFO "If you got timer trouble "
  91                        "try acpi_use_timer_override\n");
  92        }
  93#endif
  94#endif
  95        /* RED-PEN skip them on mptables too? */
  96
  97}
  98
  99#if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
 100static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
 101{
 102        u32 d;
 103        u8  b;
 104
 105        b = read_pci_config_byte(num, slot, func, 0xac);
 106        b &= ~(1<<5);
 107        write_pci_config_byte(num, slot, func, 0xac, b);
 108
 109        d = read_pci_config(num, slot, func, 0x70);
 110        d |= 1<<8;
 111        write_pci_config(num, slot, func, 0x70, d);
 112
 113        d = read_pci_config(num, slot, func, 0x8);
 114        d &= 0xff;
 115        return d;
 116}
 117
 118static void __init ati_bugs(int num, int slot, int func)
 119{
 120        u32 d;
 121        u8  b;
 122
 123        if (acpi_use_timer_override)
 124                return;
 125
 126        d = ati_ixp4x0_rev(num, slot, func);
 127        if (d  < 0x82)
 128                acpi_skip_timer_override = 1;
 129        else {
 130                /* check for IRQ0 interrupt swap */
 131                outb(0x72, 0xcd6); b = inb(0xcd7);
 132                if (!(b & 0x2))
 133                        acpi_skip_timer_override = 1;
 134        }
 135
 136        if (acpi_skip_timer_override) {
 137                printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
 138                printk(KERN_INFO "Ignoring ACPI timer override.\n");
 139                printk(KERN_INFO "If you got timer trouble "
 140                       "try acpi_use_timer_override\n");
 141        }
 142}
 143
 144static u32 __init ati_sbx00_rev(int num, int slot, int func)
 145{
 146        u32 d;
 147
 148        d = read_pci_config(num, slot, func, 0x8);
 149        d &= 0xff;
 150
 151        return d;
 152}
 153
 154static void __init ati_bugs_contd(int num, int slot, int func)
 155{
 156        u32 d, rev;
 157
 158        rev = ati_sbx00_rev(num, slot, func);
 159        if (rev >= 0x40)
 160                acpi_fix_pin2_polarity = 1;
 161
 162        if (rev > 0x13)
 163                return;
 164
 165        if (acpi_use_timer_override)
 166                return;
 167
 168        /* check for IRQ0 interrupt swap */
 169        d = read_pci_config(num, slot, func, 0x64);
 170        if (!(d & (1<<14)))
 171                acpi_skip_timer_override = 1;
 172
 173        if (acpi_skip_timer_override) {
 174                printk(KERN_INFO "SB600 revision 0x%x\n", rev);
 175                printk(KERN_INFO "Ignoring ACPI timer override.\n");
 176                printk(KERN_INFO "If you got timer trouble "
 177                       "try acpi_use_timer_override\n");
 178        }
 179}
 180#else
 181static void __init ati_bugs(int num, int slot, int func)
 182{
 183}
 184
 185static void __init ati_bugs_contd(int num, int slot, int func)
 186{
 187}
 188#endif
 189
 190#define QFLAG_APPLY_ONCE        0x1
 191#define QFLAG_APPLIED           0x2
 192#define QFLAG_DONE              (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
 193struct chipset {
 194        u32 vendor;
 195        u32 device;
 196        u32 class;
 197        u32 class_mask;
 198        u32 flags;
 199        void (*f)(int num, int slot, int func);
 200};
 201
 202/*
 203 * Only works for devices on the root bus. If you add any devices
 204 * not on bus 0 readd another loop level in early_quirks(). But
 205 * be careful because at least the Nvidia quirk here relies on
 206 * only matching on bus 0.
 207 */
 208static struct chipset early_qrk[] __initdata = {
 209        { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
 210          PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
 211        { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
 212          PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
 213        { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
 214          PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
 215        { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
 216          PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
 217        { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
 218          PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
 219        {}
 220};
 221
 222/**
 223 * check_dev_quirk - apply early quirks to a given PCI device
 224 * @num: bus number
 225 * @slot: slot number
 226 * @func: PCI function
 227 *
 228 * Check the vendor & device ID against the early quirks table.
 229 *
 230 * If the device is single function, let early_quirks() know so we don't
 231 * poke at this device again.
 232 */
 233static int __init check_dev_quirk(int num, int slot, int func)
 234{
 235        u16 class;
 236        u16 vendor;
 237        u16 device;
 238        u8 type;
 239        int i;
 240
 241        class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
 242
 243        if (class == 0xffff)
 244                return -1; /* no class, treat as single function */
 245
 246        vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
 247
 248        device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
 249
 250        for (i = 0; early_qrk[i].f != NULL; i++) {
 251                if (((early_qrk[i].vendor == PCI_ANY_ID) ||
 252                        (early_qrk[i].vendor == vendor)) &&
 253                        ((early_qrk[i].device == PCI_ANY_ID) ||
 254                        (early_qrk[i].device == device)) &&
 255                        (!((early_qrk[i].class ^ class) &
 256                            early_qrk[i].class_mask))) {
 257                                if ((early_qrk[i].flags &
 258                                     QFLAG_DONE) != QFLAG_DONE)
 259                                        early_qrk[i].f(num, slot, func);
 260                                early_qrk[i].flags |= QFLAG_APPLIED;
 261                        }
 262        }
 263
 264        type = read_pci_config_byte(num, slot, func,
 265                                    PCI_HEADER_TYPE);
 266        if (!(type & 0x80))
 267                return -1;
 268
 269        return 0;
 270}
 271
 272void __init early_quirks(void)
 273{
 274        int slot, func;
 275
 276        if (!early_pci_allowed())
 277                return;
 278
 279        /* Poor man's PCI discovery */
 280        /* Only scan the root bus */
 281        for (slot = 0; slot < 32; slot++)
 282                for (func = 0; func < 8; func++) {
 283                        /* Only probe function 0 on single fn devices */
 284                        if (check_dev_quirk(0, slot, func))
 285                                break;
 286                }
 287}
 288