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24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
29#include <linux/firmware.h>
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
46#include <linux/slab.h>
47
48#include <asm/system.h>
49#include <asm/io.h>
50#include <asm/uaccess.h>
51
52#include "moxa.h"
53
54#define MOXA_VERSION "6.0k"
55
56#define MOXA_FW_HDRLEN 32
57
58#define MOXAMAJOR 172
59
60#define MAX_BOARDS 4
61#define MAX_PORTS_PER_BOARD 32
62#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
63
64#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
65 (brd)->boardType == MOXA_BOARD_C320_PCI)
66
67
68
69
70#define MOXA_BUS_TYPE_ISA 0
71#define MOXA_BUS_TYPE_PCI 1
72
73enum {
74 MOXA_BOARD_C218_PCI = 1,
75 MOXA_BOARD_C218_ISA,
76 MOXA_BOARD_C320_PCI,
77 MOXA_BOARD_C320_ISA,
78 MOXA_BOARD_CP204J,
79};
80
81static char *moxa_brdname[] =
82{
83 "C218 Turbo PCI series",
84 "C218 Turbo ISA series",
85 "C320 Turbo PCI series",
86 "C320 Turbo ISA series",
87 "CP-204J series",
88};
89
90#ifdef CONFIG_PCI
91static struct pci_device_id moxa_pcibrds[] = {
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
93 .driver_data = MOXA_BOARD_C218_PCI },
94 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
95 .driver_data = MOXA_BOARD_C320_PCI },
96 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
97 .driver_data = MOXA_BOARD_CP204J },
98 { 0 }
99};
100MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
101#endif
102
103struct moxa_port;
104
105static struct moxa_board_conf {
106 int boardType;
107 int numPorts;
108 int busType;
109
110 unsigned int ready;
111
112 struct moxa_port *ports;
113
114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
126};
127
128struct moxaq_str {
129 int inq;
130 int outq;
131};
132
133struct moxa_port {
134 struct tty_port port;
135 struct moxa_board_conf *board;
136 void __iomem *tableAddr;
137
138 int type;
139 int cflag;
140 unsigned long statusflags;
141
142 u8 DCDState;
143 u8 lineCtrl;
144 u8 lowChkFlag;
145};
146
147struct mon_str {
148 int tick;
149 int rxcnt[MAX_PORTS];
150 int txcnt[MAX_PORTS];
151};
152
153
154#define TXSTOPPED 1
155#define LOWWAIT 2
156#define EMPTYWAIT 3
157
158#define SERIAL_DO_RESTART
159
160#define WAKEUP_CHARS 256
161
162static int ttymajor = MOXAMAJOR;
163static struct mon_str moxaLog;
164static unsigned int moxaFuncTout = HZ / 2;
165static unsigned int moxaLowWaterChk;
166static DEFINE_MUTEX(moxa_openlock);
167static DEFINE_SPINLOCK(moxa_lock);
168
169static unsigned long baseaddr[MAX_BOARDS];
170static unsigned int type[MAX_BOARDS];
171static unsigned int numports[MAX_BOARDS];
172
173MODULE_AUTHOR("William Chen");
174MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
175MODULE_LICENSE("GPL");
176MODULE_FIRMWARE("c218tunx.cod");
177MODULE_FIRMWARE("cp204unx.cod");
178MODULE_FIRMWARE("c320tunx.cod");
179
180module_param_array(type, uint, NULL, 0);
181MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
182module_param_array(baseaddr, ulong, NULL, 0);
183MODULE_PARM_DESC(baseaddr, "base address");
184module_param_array(numports, uint, NULL, 0);
185MODULE_PARM_DESC(numports, "numports (ignored for C218)");
186
187module_param(ttymajor, int, 0);
188
189
190
191
192static int moxa_open(struct tty_struct *, struct file *);
193static void moxa_close(struct tty_struct *, struct file *);
194static int moxa_write(struct tty_struct *, const unsigned char *, int);
195static int moxa_write_room(struct tty_struct *);
196static void moxa_flush_buffer(struct tty_struct *);
197static int moxa_chars_in_buffer(struct tty_struct *);
198static void moxa_set_termios(struct tty_struct *, struct ktermios *);
199static void moxa_stop(struct tty_struct *);
200static void moxa_start(struct tty_struct *);
201static void moxa_hangup(struct tty_struct *);
202static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
203static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
204 unsigned int set, unsigned int clear);
205static void moxa_poll(unsigned long);
206static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
207static void moxa_shutdown(struct tty_port *);
208static int moxa_carrier_raised(struct tty_port *);
209static void moxa_dtr_rts(struct tty_port *, int);
210
211
212
213static void MoxaPortEnable(struct moxa_port *);
214static void MoxaPortDisable(struct moxa_port *);
215static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
216static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
217static void MoxaPortLineCtrl(struct moxa_port *, int, int);
218static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
219static int MoxaPortLineStatus(struct moxa_port *);
220static void MoxaPortFlushData(struct moxa_port *, int);
221static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
222static int MoxaPortReadData(struct moxa_port *);
223static int MoxaPortTxQueue(struct moxa_port *);
224static int MoxaPortRxQueue(struct moxa_port *);
225static int MoxaPortTxFree(struct moxa_port *);
226static void MoxaPortTxDisable(struct moxa_port *);
227static void MoxaPortTxEnable(struct moxa_port *);
228static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
229static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
230static void MoxaSetFifo(struct moxa_port *port, int enable);
231
232
233
234
235
236static DEFINE_SPINLOCK(moxafunc_lock);
237
238static void moxa_wait_finish(void __iomem *ofsAddr)
239{
240 unsigned long end = jiffies + moxaFuncTout;
241
242 while (readw(ofsAddr + FuncCode) != 0)
243 if (time_after(jiffies, end))
244 return;
245 if (readw(ofsAddr + FuncCode) != 0 && printk_ratelimit())
246 printk(KERN_WARNING "moxa function expired\n");
247}
248
249static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
250{
251 unsigned long flags;
252 spin_lock_irqsave(&moxafunc_lock, flags);
253 writew(arg, ofsAddr + FuncArg);
254 writew(cmd, ofsAddr + FuncCode);
255 moxa_wait_finish(ofsAddr);
256 spin_unlock_irqrestore(&moxafunc_lock, flags);
257}
258
259static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
260{
261 unsigned long flags;
262 u16 ret;
263 spin_lock_irqsave(&moxafunc_lock, flags);
264 writew(arg, ofsAddr + FuncArg);
265 writew(cmd, ofsAddr + FuncCode);
266 moxa_wait_finish(ofsAddr);
267 ret = readw(ofsAddr + FuncArg);
268 spin_unlock_irqrestore(&moxafunc_lock, flags);
269 return ret;
270}
271
272static void moxa_low_water_check(void __iomem *ofsAddr)
273{
274 u16 rptr, wptr, mask, len;
275
276 if (readb(ofsAddr + FlagStat) & Xoff_state) {
277 rptr = readw(ofsAddr + RXrptr);
278 wptr = readw(ofsAddr + RXwptr);
279 mask = readw(ofsAddr + RX_mask);
280 len = (wptr - rptr) & mask;
281 if (len <= Low_water)
282 moxafunc(ofsAddr, FC_SendXon, 0);
283 }
284}
285
286
287
288
289
290static int moxa_ioctl(struct tty_struct *tty, struct file *file,
291 unsigned int cmd, unsigned long arg)
292{
293 struct moxa_port *ch = tty->driver_data;
294 void __user *argp = (void __user *)arg;
295 int status, ret = 0;
296
297 if (tty->index == MAX_PORTS) {
298 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
299 cmd != MOXA_GETMSTATUS)
300 return -EINVAL;
301 } else if (!ch)
302 return -ENODEV;
303
304 switch (cmd) {
305 case MOXA_GETDATACOUNT:
306 moxaLog.tick = jiffies;
307 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
308 ret = -EFAULT;
309 break;
310 case MOXA_FLUSH_QUEUE:
311 MoxaPortFlushData(ch, arg);
312 break;
313 case MOXA_GET_IOQUEUE: {
314 struct moxaq_str __user *argm = argp;
315 struct moxaq_str tmp;
316 struct moxa_port *p;
317 unsigned int i, j;
318
319 for (i = 0; i < MAX_BOARDS; i++) {
320 p = moxa_boards[i].ports;
321 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
322 memset(&tmp, 0, sizeof(tmp));
323 spin_lock_bh(&moxa_lock);
324 if (moxa_boards[i].ready) {
325 tmp.inq = MoxaPortRxQueue(p);
326 tmp.outq = MoxaPortTxQueue(p);
327 }
328 spin_unlock_bh(&moxa_lock);
329 if (copy_to_user(argm, &tmp, sizeof(tmp)))
330 return -EFAULT;
331 }
332 }
333 break;
334 } case MOXA_GET_OQUEUE:
335 status = MoxaPortTxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GET_IQUEUE:
339 status = MoxaPortRxQueue(ch);
340 ret = put_user(status, (unsigned long __user *)argp);
341 break;
342 case MOXA_GETMSTATUS: {
343 struct mxser_mstatus __user *argm = argp;
344 struct mxser_mstatus tmp;
345 struct moxa_port *p;
346 unsigned int i, j;
347
348 for (i = 0; i < MAX_BOARDS; i++) {
349 p = moxa_boards[i].ports;
350 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
351 struct tty_struct *ttyp;
352 memset(&tmp, 0, sizeof(tmp));
353 spin_lock_bh(&moxa_lock);
354 if (!moxa_boards[i].ready) {
355 spin_unlock_bh(&moxa_lock);
356 goto copy;
357 }
358
359 status = MoxaPortLineStatus(p);
360 spin_unlock_bh(&moxa_lock);
361
362 if (status & 1)
363 tmp.cts = 1;
364 if (status & 2)
365 tmp.dsr = 1;
366 if (status & 4)
367 tmp.dcd = 1;
368
369 ttyp = tty_port_tty_get(&p->port);
370 if (!ttyp || !ttyp->termios)
371 tmp.cflag = p->cflag;
372 else
373 tmp.cflag = ttyp->termios->c_cflag;
374 tty_kref_put(tty);
375copy:
376 if (copy_to_user(argm, &tmp, sizeof(tmp)))
377 return -EFAULT;
378 }
379 }
380 break;
381 }
382 case TIOCGSERIAL:
383 mutex_lock(&ch->port.mutex);
384 ret = moxa_get_serial_info(ch, argp);
385 mutex_unlock(&ch->port.mutex);
386 break;
387 case TIOCSSERIAL:
388 mutex_lock(&ch->port.mutex);
389 ret = moxa_set_serial_info(ch, argp);
390 mutex_unlock(&ch->port.mutex);
391 break;
392 default:
393 ret = -ENOIOCTLCMD;
394 }
395 return ret;
396}
397
398static int moxa_break_ctl(struct tty_struct *tty, int state)
399{
400 struct moxa_port *port = tty->driver_data;
401
402 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
403 Magic_code);
404 return 0;
405}
406
407static const struct tty_operations moxa_ops = {
408 .open = moxa_open,
409 .close = moxa_close,
410 .write = moxa_write,
411 .write_room = moxa_write_room,
412 .flush_buffer = moxa_flush_buffer,
413 .chars_in_buffer = moxa_chars_in_buffer,
414 .ioctl = moxa_ioctl,
415 .set_termios = moxa_set_termios,
416 .stop = moxa_stop,
417 .start = moxa_start,
418 .hangup = moxa_hangup,
419 .break_ctl = moxa_break_ctl,
420 .tiocmget = moxa_tiocmget,
421 .tiocmset = moxa_tiocmset,
422};
423
424static const struct tty_port_operations moxa_port_ops = {
425 .carrier_raised = moxa_carrier_raised,
426 .dtr_rts = moxa_dtr_rts,
427 .shutdown = moxa_shutdown,
428};
429
430static struct tty_driver *moxaDriver;
431static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
432
433
434
435
436
437static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
438{
439 switch (brd->boardType) {
440 case MOXA_BOARD_C218_ISA:
441 case MOXA_BOARD_C218_PCI:
442 if (model != 1)
443 goto err;
444 break;
445 case MOXA_BOARD_CP204J:
446 if (model != 3)
447 goto err;
448 break;
449 default:
450 if (model != 2)
451 goto err;
452 break;
453 }
454 return 0;
455err:
456 return -EINVAL;
457}
458
459static int moxa_check_fw(const void *ptr)
460{
461 const __le16 *lptr = ptr;
462
463 if (*lptr != cpu_to_le16(0x7980))
464 return -EINVAL;
465
466 return 0;
467}
468
469static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
470 size_t len)
471{
472 void __iomem *baseAddr = brd->basemem;
473 u16 tmp;
474
475 writeb(HW_reset, baseAddr + Control_reg);
476 msleep(10);
477 memset_io(baseAddr, 0, 4096);
478 memcpy_toio(baseAddr, buf, len);
479 writeb(0, baseAddr + Control_reg);
480
481 msleep(2000);
482
483 switch (brd->boardType) {
484 case MOXA_BOARD_C218_ISA:
485 case MOXA_BOARD_C218_PCI:
486 tmp = readw(baseAddr + C218_key);
487 if (tmp != C218_KeyCode)
488 goto err;
489 break;
490 case MOXA_BOARD_CP204J:
491 tmp = readw(baseAddr + C218_key);
492 if (tmp != CP204J_KeyCode)
493 goto err;
494 break;
495 default:
496 tmp = readw(baseAddr + C320_key);
497 if (tmp != C320_KeyCode)
498 goto err;
499 tmp = readw(baseAddr + C320_status);
500 if (tmp != STS_init) {
501 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
502 "module not found\n");
503 return -EIO;
504 }
505 break;
506 }
507
508 return 0;
509err:
510 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
511 return -EIO;
512}
513
514static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
515 size_t len)
516{
517 void __iomem *baseAddr = brd->basemem;
518
519 if (len < 7168) {
520 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
521 return -EINVAL;
522 }
523
524 writew(len - 7168 - 2, baseAddr + C320bapi_len);
525 writeb(1, baseAddr + Control_reg);
526 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
527 writeb(2, baseAddr + Control_reg);
528 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
529
530 return 0;
531}
532
533static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
534 size_t len)
535{
536 void __iomem *baseAddr = brd->basemem;
537 const __le16 *uptr = ptr;
538 size_t wlen, len2, j;
539 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
540 unsigned int i, retry;
541 u16 usum, keycode;
542
543 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
544 C218_KeyCode;
545
546 switch (brd->boardType) {
547 case MOXA_BOARD_CP204J:
548 case MOXA_BOARD_C218_ISA:
549 case MOXA_BOARD_C218_PCI:
550 key = C218_key;
551 loadbuf = C218_LoadBuf;
552 loadlen = C218DLoad_len;
553 checksum = C218check_sum;
554 checksum_ok = C218chksum_ok;
555 break;
556 default:
557 key = C320_key;
558 keycode = C320_KeyCode;
559 loadbuf = C320_LoadBuf;
560 loadlen = C320DLoad_len;
561 checksum = C320check_sum;
562 checksum_ok = C320chksum_ok;
563 break;
564 }
565
566 usum = 0;
567 wlen = len >> 1;
568 for (i = 0; i < wlen; i++)
569 usum += le16_to_cpu(uptr[i]);
570 retry = 0;
571 do {
572 wlen = len >> 1;
573 j = 0;
574 while (wlen) {
575 len2 = (wlen > 2048) ? 2048 : wlen;
576 wlen -= len2;
577 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
578 j += len2 << 1;
579
580 writew(len2, baseAddr + loadlen);
581 writew(0, baseAddr + key);
582 for (i = 0; i < 100; i++) {
583 if (readw(baseAddr + key) == keycode)
584 break;
585 msleep(10);
586 }
587 if (readw(baseAddr + key) != keycode)
588 return -EIO;
589 }
590 writew(0, baseAddr + loadlen);
591 writew(usum, baseAddr + checksum);
592 writew(0, baseAddr + key);
593 for (i = 0; i < 100; i++) {
594 if (readw(baseAddr + key) == keycode)
595 break;
596 msleep(10);
597 }
598 retry++;
599 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
600 if (readb(baseAddr + checksum_ok) != 1)
601 return -EIO;
602
603 writew(0, baseAddr + key);
604 for (i = 0; i < 600; i++) {
605 if (readw(baseAddr + Magic_no) == Magic_code)
606 break;
607 msleep(10);
608 }
609 if (readw(baseAddr + Magic_no) != Magic_code)
610 return -EIO;
611
612 if (MOXA_IS_320(brd)) {
613 if (brd->busType == MOXA_BUS_TYPE_PCI) {
614 writew(0x3800, baseAddr + TMS320_PORT1);
615 writew(0x3900, baseAddr + TMS320_PORT2);
616 writew(28499, baseAddr + TMS320_CLOCK);
617 } else {
618 writew(0x3200, baseAddr + TMS320_PORT1);
619 writew(0x3400, baseAddr + TMS320_PORT2);
620 writew(19999, baseAddr + TMS320_CLOCK);
621 }
622 }
623 writew(1, baseAddr + Disable_IRQ);
624 writew(0, baseAddr + Magic_no);
625 for (i = 0; i < 500; i++) {
626 if (readw(baseAddr + Magic_no) == Magic_code)
627 break;
628 msleep(10);
629 }
630 if (readw(baseAddr + Magic_no) != Magic_code)
631 return -EIO;
632
633 if (MOXA_IS_320(brd)) {
634 j = readw(baseAddr + Module_cnt);
635 if (j <= 0)
636 return -EIO;
637 brd->numPorts = j * 8;
638 writew(j, baseAddr + Module_no);
639 writew(0, baseAddr + Magic_no);
640 for (i = 0; i < 600; i++) {
641 if (readw(baseAddr + Magic_no) == Magic_code)
642 break;
643 msleep(10);
644 }
645 if (readw(baseAddr + Magic_no) != Magic_code)
646 return -EIO;
647 }
648 brd->intNdx = baseAddr + IRQindex;
649 brd->intPend = baseAddr + IRQpending;
650 brd->intTable = baseAddr + IRQtable;
651
652 return 0;
653}
654
655static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
656 size_t len)
657{
658 void __iomem *ofsAddr, *baseAddr = brd->basemem;
659 struct moxa_port *port;
660 int retval, i;
661
662 if (len % 2) {
663 printk(KERN_ERR "MOXA: bios length is not even\n");
664 return -EINVAL;
665 }
666
667 retval = moxa_real_load_code(brd, ptr, len);
668 if (retval)
669 return retval;
670
671 switch (brd->boardType) {
672 case MOXA_BOARD_C218_ISA:
673 case MOXA_BOARD_C218_PCI:
674 case MOXA_BOARD_CP204J:
675 port = brd->ports;
676 for (i = 0; i < brd->numPorts; i++, port++) {
677 port->board = brd;
678 port->DCDState = 0;
679 port->tableAddr = baseAddr + Extern_table +
680 Extern_size * i;
681 ofsAddr = port->tableAddr;
682 writew(C218rx_mask, ofsAddr + RX_mask);
683 writew(C218tx_mask, ofsAddr + TX_mask);
684 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
685 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
686
687 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
688 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
689
690 }
691 break;
692 default:
693 port = brd->ports;
694 for (i = 0; i < brd->numPorts; i++, port++) {
695 port->board = brd;
696 port->DCDState = 0;
697 port->tableAddr = baseAddr + Extern_table +
698 Extern_size * i;
699 ofsAddr = port->tableAddr;
700 switch (brd->numPorts) {
701 case 8:
702 writew(C320p8rx_mask, ofsAddr + RX_mask);
703 writew(C320p8tx_mask, ofsAddr + TX_mask);
704 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
705 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
706 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
707 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
708
709 break;
710 case 16:
711 writew(C320p16rx_mask, ofsAddr + RX_mask);
712 writew(C320p16tx_mask, ofsAddr + TX_mask);
713 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
714 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
715 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
716 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
717 break;
718
719 case 24:
720 writew(C320p24rx_mask, ofsAddr + RX_mask);
721 writew(C320p24tx_mask, ofsAddr + TX_mask);
722 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
723 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
724 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
725 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
726 break;
727 case 32:
728 writew(C320p32rx_mask, ofsAddr + RX_mask);
729 writew(C320p32tx_mask, ofsAddr + TX_mask);
730 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
731 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
732 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
733 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
734 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
735 break;
736 }
737 }
738 break;
739 }
740 return 0;
741}
742
743static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
744{
745 const void *ptr = fw->data;
746 char rsn[64];
747 u16 lens[5];
748 size_t len;
749 unsigned int a, lenp, lencnt;
750 int ret = -EINVAL;
751 struct {
752 __le32 magic;
753 u8 reserved1[2];
754 u8 type;
755 u8 model;
756 u8 reserved2[8];
757 __le16 len[5];
758 } const *hdr = ptr;
759
760 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
761
762 if (fw->size < MOXA_FW_HDRLEN) {
763 strcpy(rsn, "too short (even header won't fit)");
764 goto err;
765 }
766 if (hdr->magic != cpu_to_le32(0x30343034)) {
767 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
768 goto err;
769 }
770 if (hdr->type != 3) {
771 sprintf(rsn, "not for linux, type is %u", hdr->type);
772 goto err;
773 }
774 if (moxa_check_fw_model(brd, hdr->model)) {
775 sprintf(rsn, "not for this card, model is %u", hdr->model);
776 goto err;
777 }
778
779 len = MOXA_FW_HDRLEN;
780 lencnt = hdr->model == 2 ? 5 : 3;
781 for (a = 0; a < ARRAY_SIZE(lens); a++) {
782 lens[a] = le16_to_cpu(hdr->len[a]);
783 if (lens[a] && len + lens[a] <= fw->size &&
784 moxa_check_fw(&fw->data[len]))
785 printk(KERN_WARNING "MOXA firmware: unexpected input "
786 "at offset %u, but going on\n", (u32)len);
787 if (!lens[a] && a < lencnt) {
788 sprintf(rsn, "too few entries in fw file");
789 goto err;
790 }
791 len += lens[a];
792 }
793
794 if (len != fw->size) {
795 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
796 (u32)len);
797 goto err;
798 }
799
800 ptr += MOXA_FW_HDRLEN;
801 lenp = 0;
802
803 strcpy(rsn, "read above");
804
805 ret = moxa_load_bios(brd, ptr, lens[lenp]);
806 if (ret)
807 goto err;
808
809
810 ptr += lens[lenp] + lens[lenp + 1];
811 lenp += 2;
812
813 if (hdr->model == 2) {
814 ret = moxa_load_320b(brd, ptr, lens[lenp]);
815 if (ret)
816 goto err;
817
818 ptr += lens[lenp] + lens[lenp + 1];
819 lenp += 2;
820 }
821
822 ret = moxa_load_code(brd, ptr, lens[lenp]);
823 if (ret)
824 goto err;
825
826 return 0;
827err:
828 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
829 return ret;
830}
831
832static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
833{
834 const struct firmware *fw;
835 const char *file;
836 struct moxa_port *p;
837 unsigned int i;
838 int ret;
839
840 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
841 GFP_KERNEL);
842 if (brd->ports == NULL) {
843 printk(KERN_ERR "cannot allocate memory for ports\n");
844 ret = -ENOMEM;
845 goto err;
846 }
847
848 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
849 tty_port_init(&p->port);
850 p->port.ops = &moxa_port_ops;
851 p->type = PORT_16550A;
852 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
853 }
854
855 switch (brd->boardType) {
856 case MOXA_BOARD_C218_ISA:
857 case MOXA_BOARD_C218_PCI:
858 file = "c218tunx.cod";
859 break;
860 case MOXA_BOARD_CP204J:
861 file = "cp204unx.cod";
862 break;
863 default:
864 file = "c320tunx.cod";
865 break;
866 }
867
868 ret = request_firmware(&fw, file, dev);
869 if (ret) {
870 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
871 "you've placed '%s' file into your firmware "
872 "loader directory (e.g. /lib/firmware)\n",
873 file);
874 goto err_free;
875 }
876
877 ret = moxa_load_fw(brd, fw);
878
879 release_firmware(fw);
880
881 if (ret)
882 goto err_free;
883
884 spin_lock_bh(&moxa_lock);
885 brd->ready = 1;
886 if (!timer_pending(&moxaTimer))
887 mod_timer(&moxaTimer, jiffies + HZ / 50);
888 spin_unlock_bh(&moxa_lock);
889
890 return 0;
891err_free:
892 kfree(brd->ports);
893err:
894 return ret;
895}
896
897static void moxa_board_deinit(struct moxa_board_conf *brd)
898{
899 unsigned int a, opened;
900
901 mutex_lock(&moxa_openlock);
902 spin_lock_bh(&moxa_lock);
903 brd->ready = 0;
904 spin_unlock_bh(&moxa_lock);
905
906
907 for (a = 0; a < brd->numPorts; a++)
908 if (brd->ports[a].port.flags & ASYNC_INITIALIZED) {
909 struct tty_struct *tty = tty_port_tty_get(
910 &brd->ports[a].port);
911 if (tty) {
912 tty_hangup(tty);
913 tty_kref_put(tty);
914 }
915 }
916 while (1) {
917 opened = 0;
918 for (a = 0; a < brd->numPorts; a++)
919 if (brd->ports[a].port.flags & ASYNC_INITIALIZED)
920 opened++;
921 mutex_unlock(&moxa_openlock);
922 if (!opened)
923 break;
924 msleep(50);
925 mutex_lock(&moxa_openlock);
926 }
927
928 iounmap(brd->basemem);
929 brd->basemem = NULL;
930 kfree(brd->ports);
931}
932
933#ifdef CONFIG_PCI
934static int __devinit moxa_pci_probe(struct pci_dev *pdev,
935 const struct pci_device_id *ent)
936{
937 struct moxa_board_conf *board;
938 unsigned int i;
939 int board_type = ent->driver_data;
940 int retval;
941
942 retval = pci_enable_device(pdev);
943 if (retval) {
944 dev_err(&pdev->dev, "can't enable pci device\n");
945 goto err;
946 }
947
948 for (i = 0; i < MAX_BOARDS; i++)
949 if (moxa_boards[i].basemem == NULL)
950 break;
951
952 retval = -ENODEV;
953 if (i >= MAX_BOARDS) {
954 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
955 "found. Board is ignored.\n", MAX_BOARDS);
956 goto err;
957 }
958
959 board = &moxa_boards[i];
960
961 retval = pci_request_region(pdev, 2, "moxa-base");
962 if (retval) {
963 dev_err(&pdev->dev, "can't request pci region 2\n");
964 goto err;
965 }
966
967 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
968 if (board->basemem == NULL) {
969 dev_err(&pdev->dev, "can't remap io space 2\n");
970 goto err_reg;
971 }
972
973 board->boardType = board_type;
974 switch (board_type) {
975 case MOXA_BOARD_C218_ISA:
976 case MOXA_BOARD_C218_PCI:
977 board->numPorts = 8;
978 break;
979
980 case MOXA_BOARD_CP204J:
981 board->numPorts = 4;
982 break;
983 default:
984 board->numPorts = 0;
985 break;
986 }
987 board->busType = MOXA_BUS_TYPE_PCI;
988
989 retval = moxa_init_board(board, &pdev->dev);
990 if (retval)
991 goto err_base;
992
993 pci_set_drvdata(pdev, board);
994
995 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
996 moxa_brdname[board_type - 1], board->numPorts);
997
998 return 0;
999err_base:
1000 iounmap(board->basemem);
1001 board->basemem = NULL;
1002err_reg:
1003 pci_release_region(pdev, 2);
1004err:
1005 return retval;
1006}
1007
1008static void __devexit moxa_pci_remove(struct pci_dev *pdev)
1009{
1010 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1011
1012 moxa_board_deinit(brd);
1013
1014 pci_release_region(pdev, 2);
1015}
1016
1017static struct pci_driver moxa_pci_driver = {
1018 .name = "moxa",
1019 .id_table = moxa_pcibrds,
1020 .probe = moxa_pci_probe,
1021 .remove = __devexit_p(moxa_pci_remove)
1022};
1023#endif
1024
1025static int __init moxa_init(void)
1026{
1027 unsigned int isabrds = 0;
1028 int retval = 0;
1029 struct moxa_board_conf *brd = moxa_boards;
1030 unsigned int i;
1031
1032 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1033 MOXA_VERSION);
1034 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
1035 if (!moxaDriver)
1036 return -ENOMEM;
1037
1038 moxaDriver->owner = THIS_MODULE;
1039 moxaDriver->name = "ttyMX";
1040 moxaDriver->major = ttymajor;
1041 moxaDriver->minor_start = 0;
1042 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1043 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1044 moxaDriver->init_termios = tty_std_termios;
1045 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1046 moxaDriver->init_termios.c_ispeed = 9600;
1047 moxaDriver->init_termios.c_ospeed = 9600;
1048 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
1049 tty_set_operations(moxaDriver, &moxa_ops);
1050
1051 if (tty_register_driver(moxaDriver)) {
1052 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1053 put_tty_driver(moxaDriver);
1054 return -1;
1055 }
1056
1057
1058
1059 for (i = 0; i < MAX_BOARDS; i++) {
1060 if (!baseaddr[i])
1061 break;
1062 if (type[i] == MOXA_BOARD_C218_ISA ||
1063 type[i] == MOXA_BOARD_C320_ISA) {
1064 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1065 isabrds + 1, moxa_brdname[type[i] - 1],
1066 baseaddr[i]);
1067 brd->boardType = type[i];
1068 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1069 numports[i];
1070 brd->busType = MOXA_BUS_TYPE_ISA;
1071 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
1072 if (!brd->basemem) {
1073 printk(KERN_ERR "MOXA: can't remap %lx\n",
1074 baseaddr[i]);
1075 continue;
1076 }
1077 if (moxa_init_board(brd, NULL)) {
1078 iounmap(brd->basemem);
1079 brd->basemem = NULL;
1080 continue;
1081 }
1082
1083 printk(KERN_INFO "MOXA isa board found at 0x%.8lu and "
1084 "ready (%u ports, firmware loaded)\n",
1085 baseaddr[i], brd->numPorts);
1086
1087 brd++;
1088 isabrds++;
1089 }
1090 }
1091
1092#ifdef CONFIG_PCI
1093 retval = pci_register_driver(&moxa_pci_driver);
1094 if (retval) {
1095 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1096 if (isabrds)
1097 retval = 0;
1098 }
1099#endif
1100
1101 return retval;
1102}
1103
1104static void __exit moxa_exit(void)
1105{
1106 unsigned int i;
1107
1108#ifdef CONFIG_PCI
1109 pci_unregister_driver(&moxa_pci_driver);
1110#endif
1111
1112 for (i = 0; i < MAX_BOARDS; i++)
1113 if (moxa_boards[i].ready)
1114 moxa_board_deinit(&moxa_boards[i]);
1115
1116 del_timer_sync(&moxaTimer);
1117
1118 if (tty_unregister_driver(moxaDriver))
1119 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1120 "serial driver\n");
1121 put_tty_driver(moxaDriver);
1122}
1123
1124module_init(moxa_init);
1125module_exit(moxa_exit);
1126
1127static void moxa_shutdown(struct tty_port *port)
1128{
1129 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1130 MoxaPortDisable(ch);
1131 MoxaPortFlushData(ch, 2);
1132 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
1133}
1134
1135static int moxa_carrier_raised(struct tty_port *port)
1136{
1137 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1138 int dcd;
1139
1140 spin_lock_irq(&port->lock);
1141 dcd = ch->DCDState;
1142 spin_unlock_irq(&port->lock);
1143 return dcd;
1144}
1145
1146static void moxa_dtr_rts(struct tty_port *port, int onoff)
1147{
1148 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1149 MoxaPortLineCtrl(ch, onoff, onoff);
1150}
1151
1152
1153static int moxa_open(struct tty_struct *tty, struct file *filp)
1154{
1155 struct moxa_board_conf *brd;
1156 struct moxa_port *ch;
1157 int port;
1158 int retval;
1159
1160 port = tty->index;
1161 if (port == MAX_PORTS) {
1162 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1163 }
1164 if (mutex_lock_interruptible(&moxa_openlock))
1165 return -ERESTARTSYS;
1166 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1167 if (!brd->ready) {
1168 mutex_unlock(&moxa_openlock);
1169 return -ENODEV;
1170 }
1171
1172 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1173 mutex_unlock(&moxa_openlock);
1174 return -ENODEV;
1175 }
1176
1177 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1178 ch->port.count++;
1179 tty->driver_data = ch;
1180 tty_port_tty_set(&ch->port, tty);
1181 mutex_lock(&ch->port.mutex);
1182 if (!(ch->port.flags & ASYNC_INITIALIZED)) {
1183 ch->statusflags = 0;
1184 moxa_set_tty_param(tty, tty->termios);
1185 MoxaPortLineCtrl(ch, 1, 1);
1186 MoxaPortEnable(ch);
1187 MoxaSetFifo(ch, ch->type == PORT_16550A);
1188 ch->port.flags |= ASYNC_INITIALIZED;
1189 }
1190 mutex_unlock(&ch->port.mutex);
1191 mutex_unlock(&moxa_openlock);
1192
1193 retval = tty_port_block_til_ready(&ch->port, tty, filp);
1194 if (retval == 0)
1195 set_bit(ASYNCB_NORMAL_ACTIVE, &ch->port.flags);
1196 return retval;
1197}
1198
1199static void moxa_close(struct tty_struct *tty, struct file *filp)
1200{
1201 struct moxa_port *ch = tty->driver_data;
1202 ch->cflag = tty->termios->c_cflag;
1203 tty_port_close(&ch->port, tty, filp);
1204}
1205
1206static int moxa_write(struct tty_struct *tty,
1207 const unsigned char *buf, int count)
1208{
1209 struct moxa_port *ch = tty->driver_data;
1210 int len;
1211
1212 if (ch == NULL)
1213 return 0;
1214
1215 spin_lock_bh(&moxa_lock);
1216 len = MoxaPortWriteData(tty, buf, count);
1217 spin_unlock_bh(&moxa_lock);
1218
1219 set_bit(LOWWAIT, &ch->statusflags);
1220 return len;
1221}
1222
1223static int moxa_write_room(struct tty_struct *tty)
1224{
1225 struct moxa_port *ch;
1226
1227 if (tty->stopped)
1228 return 0;
1229 ch = tty->driver_data;
1230 if (ch == NULL)
1231 return 0;
1232 return MoxaPortTxFree(ch);
1233}
1234
1235static void moxa_flush_buffer(struct tty_struct *tty)
1236{
1237 struct moxa_port *ch = tty->driver_data;
1238
1239 if (ch == NULL)
1240 return;
1241 MoxaPortFlushData(ch, 1);
1242 tty_wakeup(tty);
1243}
1244
1245static int moxa_chars_in_buffer(struct tty_struct *tty)
1246{
1247 struct moxa_port *ch = tty->driver_data;
1248 int chars;
1249
1250 chars = MoxaPortTxQueue(ch);
1251 if (chars)
1252
1253
1254
1255
1256 set_bit(EMPTYWAIT, &ch->statusflags);
1257 return chars;
1258}
1259
1260static int moxa_tiocmget(struct tty_struct *tty, struct file *file)
1261{
1262 struct moxa_port *ch = tty->driver_data;
1263 int flag = 0, dtr, rts;
1264
1265 MoxaPortGetLineOut(ch, &dtr, &rts);
1266 if (dtr)
1267 flag |= TIOCM_DTR;
1268 if (rts)
1269 flag |= TIOCM_RTS;
1270 dtr = MoxaPortLineStatus(ch);
1271 if (dtr & 1)
1272 flag |= TIOCM_CTS;
1273 if (dtr & 2)
1274 flag |= TIOCM_DSR;
1275 if (dtr & 4)
1276 flag |= TIOCM_CD;
1277 return flag;
1278}
1279
1280static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
1281 unsigned int set, unsigned int clear)
1282{
1283 struct moxa_port *ch;
1284 int port;
1285 int dtr, rts;
1286
1287 port = tty->index;
1288 mutex_lock(&moxa_openlock);
1289 ch = tty->driver_data;
1290 if (!ch) {
1291 mutex_unlock(&moxa_openlock);
1292 return -EINVAL;
1293 }
1294
1295 MoxaPortGetLineOut(ch, &dtr, &rts);
1296 if (set & TIOCM_RTS)
1297 rts = 1;
1298 if (set & TIOCM_DTR)
1299 dtr = 1;
1300 if (clear & TIOCM_RTS)
1301 rts = 0;
1302 if (clear & TIOCM_DTR)
1303 dtr = 0;
1304 MoxaPortLineCtrl(ch, dtr, rts);
1305 mutex_unlock(&moxa_openlock);
1306 return 0;
1307}
1308
1309static void moxa_set_termios(struct tty_struct *tty,
1310 struct ktermios *old_termios)
1311{
1312 struct moxa_port *ch = tty->driver_data;
1313
1314 if (ch == NULL)
1315 return;
1316 moxa_set_tty_param(tty, old_termios);
1317 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1318 wake_up_interruptible(&ch->port.open_wait);
1319}
1320
1321static void moxa_stop(struct tty_struct *tty)
1322{
1323 struct moxa_port *ch = tty->driver_data;
1324
1325 if (ch == NULL)
1326 return;
1327 MoxaPortTxDisable(ch);
1328 set_bit(TXSTOPPED, &ch->statusflags);
1329}
1330
1331
1332static void moxa_start(struct tty_struct *tty)
1333{
1334 struct moxa_port *ch = tty->driver_data;
1335
1336 if (ch == NULL)
1337 return;
1338
1339 if (!(ch->statusflags & TXSTOPPED))
1340 return;
1341
1342 MoxaPortTxEnable(ch);
1343 clear_bit(TXSTOPPED, &ch->statusflags);
1344}
1345
1346static void moxa_hangup(struct tty_struct *tty)
1347{
1348 struct moxa_port *ch = tty->driver_data;
1349 tty_port_hangup(&ch->port);
1350}
1351
1352static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1353{
1354 struct tty_struct *tty;
1355 unsigned long flags;
1356 dcd = !!dcd;
1357
1358 spin_lock_irqsave(&p->port.lock, flags);
1359 if (dcd != p->DCDState) {
1360 p->DCDState = dcd;
1361 spin_unlock_irqrestore(&p->port.lock, flags);
1362 tty = tty_port_tty_get(&p->port);
1363 if (tty && C_CLOCAL(tty) && !dcd)
1364 tty_hangup(tty);
1365 tty_kref_put(tty);
1366 }
1367 else
1368 spin_unlock_irqrestore(&p->port.lock, flags);
1369}
1370
1371static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1372 u16 __iomem *ip)
1373{
1374 struct tty_struct *tty = tty_port_tty_get(&p->port);
1375 void __iomem *ofsAddr;
1376 unsigned int inited = p->port.flags & ASYNC_INITIALIZED;
1377 u16 intr;
1378
1379 if (tty) {
1380 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1381 MoxaPortTxQueue(p) == 0) {
1382 clear_bit(EMPTYWAIT, &p->statusflags);
1383 tty_wakeup(tty);
1384 }
1385 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1386 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1387 clear_bit(LOWWAIT, &p->statusflags);
1388 tty_wakeup(tty);
1389 }
1390
1391 if (inited && !test_bit(TTY_THROTTLED, &tty->flags) &&
1392 MoxaPortRxQueue(p) > 0) {
1393 MoxaPortReadData(p);
1394 tty_schedule_flip(tty);
1395 }
1396 } else {
1397 clear_bit(EMPTYWAIT, &p->statusflags);
1398 MoxaPortFlushData(p, 0);
1399 }
1400
1401 if (!handle)
1402 goto put;
1403
1404 intr = readw(ip);
1405 if (intr == 0)
1406 goto put;
1407
1408 writew(0, ip);
1409 ofsAddr = p->tableAddr;
1410 if (intr & IntrTx)
1411 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1412 ofsAddr + HostStat);
1413
1414 if (!inited)
1415 goto put;
1416
1417 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) {
1418 tty_insert_flip_char(tty, 0, TTY_BREAK);
1419 tty_schedule_flip(tty);
1420 }
1421
1422 if (intr & IntrLine)
1423 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1424put:
1425 tty_kref_put(tty);
1426
1427 return 0;
1428}
1429
1430static void moxa_poll(unsigned long ignored)
1431{
1432 struct moxa_board_conf *brd;
1433 u16 __iomem *ip;
1434 unsigned int card, port, served = 0;
1435
1436 spin_lock(&moxa_lock);
1437 for (card = 0; card < MAX_BOARDS; card++) {
1438 brd = &moxa_boards[card];
1439 if (!brd->ready)
1440 continue;
1441
1442 served++;
1443
1444 ip = NULL;
1445 if (readb(brd->intPend) == 0xff)
1446 ip = brd->intTable + readb(brd->intNdx);
1447
1448 for (port = 0; port < brd->numPorts; port++)
1449 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1450
1451 if (ip)
1452 writeb(0, brd->intPend);
1453
1454 if (moxaLowWaterChk) {
1455 struct moxa_port *p = brd->ports;
1456 for (port = 0; port < brd->numPorts; port++, p++)
1457 if (p->lowChkFlag) {
1458 p->lowChkFlag = 0;
1459 moxa_low_water_check(p->tableAddr);
1460 }
1461 }
1462 }
1463 moxaLowWaterChk = 0;
1464
1465 if (served)
1466 mod_timer(&moxaTimer, jiffies + HZ / 50);
1467 spin_unlock(&moxa_lock);
1468}
1469
1470
1471
1472static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1473{
1474 register struct ktermios *ts = tty->termios;
1475 struct moxa_port *ch = tty->driver_data;
1476 int rts, cts, txflow, rxflow, xany, baud;
1477
1478 rts = cts = txflow = rxflow = xany = 0;
1479 if (ts->c_cflag & CRTSCTS)
1480 rts = cts = 1;
1481 if (ts->c_iflag & IXON)
1482 txflow = 1;
1483 if (ts->c_iflag & IXOFF)
1484 rxflow = 1;
1485 if (ts->c_iflag & IXANY)
1486 xany = 1;
1487
1488
1489 ts->c_cflag &= ~CMSPAR;
1490 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1491 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1492 if (baud == -1)
1493 baud = tty_termios_baud_rate(old_termios);
1494
1495 tty_encode_baud_rate(tty, baud, baud);
1496}
1497
1498
1499
1500
1501
1502static void MoxaPortFlushData(struct moxa_port *port, int mode)
1503{
1504 void __iomem *ofsAddr;
1505 if (mode < 0 || mode > 2)
1506 return;
1507 ofsAddr = port->tableAddr;
1508 moxafunc(ofsAddr, FC_FlushQueue, mode);
1509 if (mode != 1) {
1510 port->lowChkFlag = 0;
1511 moxa_low_water_check(ofsAddr);
1512 }
1513}
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1706
1707static void MoxaPortEnable(struct moxa_port *port)
1708{
1709 void __iomem *ofsAddr;
1710 u16 lowwater = 512;
1711
1712 ofsAddr = port->tableAddr;
1713 writew(lowwater, ofsAddr + Low_water);
1714 if (MOXA_IS_320(port->board))
1715 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1716 else
1717 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1718 ofsAddr + HostStat);
1719
1720 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1721 moxafunc(ofsAddr, FC_FlushQueue, 2);
1722
1723 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1724 MoxaPortLineStatus(port);
1725}
1726
1727static void MoxaPortDisable(struct moxa_port *port)
1728{
1729 void __iomem *ofsAddr = port->tableAddr;
1730
1731 moxafunc(ofsAddr, FC_SetFlowCtl, 0);
1732 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1733 writew(0, ofsAddr + HostStat);
1734 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1735}
1736
1737static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1738{
1739 void __iomem *ofsAddr = port->tableAddr;
1740 unsigned int clock, val;
1741 speed_t max;
1742
1743 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1744 if (baud < 50)
1745 return 0;
1746 if (baud > max)
1747 baud = max;
1748 clock = 921600;
1749 val = clock / baud;
1750 moxafunc(ofsAddr, FC_SetBaud, val);
1751 baud = clock / val;
1752 return baud;
1753}
1754
1755static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1756 speed_t baud)
1757{
1758 void __iomem *ofsAddr;
1759 tcflag_t cflag;
1760 tcflag_t mode = 0;
1761
1762 ofsAddr = port->tableAddr;
1763 cflag = termio->c_cflag;
1764
1765 mode = termio->c_cflag & CSIZE;
1766 if (mode == CS5)
1767 mode = MX_CS5;
1768 else if (mode == CS6)
1769 mode = MX_CS6;
1770 else if (mode == CS7)
1771 mode = MX_CS7;
1772 else if (mode == CS8)
1773 mode = MX_CS8;
1774
1775 if (termio->c_cflag & CSTOPB) {
1776 if (mode == MX_CS5)
1777 mode |= MX_STOP15;
1778 else
1779 mode |= MX_STOP2;
1780 } else
1781 mode |= MX_STOP1;
1782
1783 if (termio->c_cflag & PARENB) {
1784 if (termio->c_cflag & PARODD)
1785 mode |= MX_PARODD;
1786 else
1787 mode |= MX_PAREVEN;
1788 } else
1789 mode |= MX_PARNONE;
1790
1791 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1792
1793 if (MOXA_IS_320(port->board) && baud >= 921600)
1794 return -1;
1795
1796 baud = MoxaPortSetBaud(port, baud);
1797
1798 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1799 spin_lock_irq(&moxafunc_lock);
1800 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1801 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1802 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1803 moxa_wait_finish(ofsAddr);
1804 spin_unlock_irq(&moxafunc_lock);
1805
1806 }
1807 return baud;
1808}
1809
1810static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1811 int *rtsState)
1812{
1813 if (dtrState)
1814 *dtrState = !!(port->lineCtrl & DTR_ON);
1815 if (rtsState)
1816 *rtsState = !!(port->lineCtrl & RTS_ON);
1817
1818 return 0;
1819}
1820
1821static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1822{
1823 u8 mode = 0;
1824
1825 if (dtr)
1826 mode |= DTR_ON;
1827 if (rts)
1828 mode |= RTS_ON;
1829 port->lineCtrl = mode;
1830 moxafunc(port->tableAddr, FC_LineControl, mode);
1831}
1832
1833static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1834 int txflow, int rxflow, int txany)
1835{
1836 int mode = 0;
1837
1838 if (rts)
1839 mode |= RTS_FlowCtl;
1840 if (cts)
1841 mode |= CTS_FlowCtl;
1842 if (txflow)
1843 mode |= Tx_FlowCtl;
1844 if (rxflow)
1845 mode |= Rx_FlowCtl;
1846 if (txany)
1847 mode |= IXM_IXANY;
1848 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1849}
1850
1851static int MoxaPortLineStatus(struct moxa_port *port)
1852{
1853 void __iomem *ofsAddr;
1854 int val;
1855
1856 ofsAddr = port->tableAddr;
1857 if (MOXA_IS_320(port->board))
1858 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1859 else
1860 val = readw(ofsAddr + FlagStat) >> 4;
1861 val &= 0x0B;
1862 if (val & 8)
1863 val |= 4;
1864 moxa_new_dcdstate(port, val & 8);
1865 val &= 7;
1866 return val;
1867}
1868
1869static int MoxaPortWriteData(struct tty_struct *tty,
1870 const unsigned char *buffer, int len)
1871{
1872 struct moxa_port *port = tty->driver_data;
1873 void __iomem *baseAddr, *ofsAddr, *ofs;
1874 unsigned int c, total;
1875 u16 head, tail, tx_mask, spage, epage;
1876 u16 pageno, pageofs, bufhead;
1877
1878 ofsAddr = port->tableAddr;
1879 baseAddr = port->board->basemem;
1880 tx_mask = readw(ofsAddr + TX_mask);
1881 spage = readw(ofsAddr + Page_txb);
1882 epage = readw(ofsAddr + EndPage_txb);
1883 tail = readw(ofsAddr + TXwptr);
1884 head = readw(ofsAddr + TXrptr);
1885 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1886 if (c > len)
1887 c = len;
1888 moxaLog.txcnt[port->port.tty->index] += c;
1889 total = c;
1890 if (spage == epage) {
1891 bufhead = readw(ofsAddr + Ofs_txb);
1892 writew(spage, baseAddr + Control_reg);
1893 while (c > 0) {
1894 if (head > tail)
1895 len = head - tail - 1;
1896 else
1897 len = tx_mask + 1 - tail;
1898 len = (c > len) ? len : c;
1899 ofs = baseAddr + DynPage_addr + bufhead + tail;
1900 memcpy_toio(ofs, buffer, len);
1901 buffer += len;
1902 tail = (tail + len) & tx_mask;
1903 c -= len;
1904 }
1905 } else {
1906 pageno = spage + (tail >> 13);
1907 pageofs = tail & Page_mask;
1908 while (c > 0) {
1909 len = Page_size - pageofs;
1910 if (len > c)
1911 len = c;
1912 writeb(pageno, baseAddr + Control_reg);
1913 ofs = baseAddr + DynPage_addr + pageofs;
1914 memcpy_toio(ofs, buffer, len);
1915 buffer += len;
1916 if (++pageno == epage)
1917 pageno = spage;
1918 pageofs = 0;
1919 c -= len;
1920 }
1921 tail = (tail + total) & tx_mask;
1922 }
1923 writew(tail, ofsAddr + TXwptr);
1924 writeb(1, ofsAddr + CD180TXirq);
1925 return total;
1926}
1927
1928static int MoxaPortReadData(struct moxa_port *port)
1929{
1930 struct tty_struct *tty = port->port.tty;
1931 unsigned char *dst;
1932 void __iomem *baseAddr, *ofsAddr, *ofs;
1933 unsigned int count, len, total;
1934 u16 tail, rx_mask, spage, epage;
1935 u16 pageno, pageofs, bufhead, head;
1936
1937 ofsAddr = port->tableAddr;
1938 baseAddr = port->board->basemem;
1939 head = readw(ofsAddr + RXrptr);
1940 tail = readw(ofsAddr + RXwptr);
1941 rx_mask = readw(ofsAddr + RX_mask);
1942 spage = readw(ofsAddr + Page_rxb);
1943 epage = readw(ofsAddr + EndPage_rxb);
1944 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1945 if (count == 0)
1946 return 0;
1947
1948 total = count;
1949 moxaLog.rxcnt[tty->index] += total;
1950 if (spage == epage) {
1951 bufhead = readw(ofsAddr + Ofs_rxb);
1952 writew(spage, baseAddr + Control_reg);
1953 while (count > 0) {
1954 ofs = baseAddr + DynPage_addr + bufhead + head;
1955 len = (tail >= head) ? (tail - head) :
1956 (rx_mask + 1 - head);
1957 len = tty_prepare_flip_string(tty, &dst,
1958 min(len, count));
1959 memcpy_fromio(dst, ofs, len);
1960 head = (head + len) & rx_mask;
1961 count -= len;
1962 }
1963 } else {
1964 pageno = spage + (head >> 13);
1965 pageofs = head & Page_mask;
1966 while (count > 0) {
1967 writew(pageno, baseAddr + Control_reg);
1968 ofs = baseAddr + DynPage_addr + pageofs;
1969 len = tty_prepare_flip_string(tty, &dst,
1970 min(Page_size - pageofs, count));
1971 memcpy_fromio(dst, ofs, len);
1972
1973 count -= len;
1974 pageofs = (pageofs + len) & Page_mask;
1975 if (pageofs == 0 && ++pageno == epage)
1976 pageno = spage;
1977 }
1978 head = (head + total) & rx_mask;
1979 }
1980 writew(head, ofsAddr + RXrptr);
1981 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1982 moxaLowWaterChk = 1;
1983 port->lowChkFlag = 1;
1984 }
1985 return total;
1986}
1987
1988
1989static int MoxaPortTxQueue(struct moxa_port *port)
1990{
1991 void __iomem *ofsAddr = port->tableAddr;
1992 u16 rptr, wptr, mask;
1993
1994 rptr = readw(ofsAddr + TXrptr);
1995 wptr = readw(ofsAddr + TXwptr);
1996 mask = readw(ofsAddr + TX_mask);
1997 return (wptr - rptr) & mask;
1998}
1999
2000static int MoxaPortTxFree(struct moxa_port *port)
2001{
2002 void __iomem *ofsAddr = port->tableAddr;
2003 u16 rptr, wptr, mask;
2004
2005 rptr = readw(ofsAddr + TXrptr);
2006 wptr = readw(ofsAddr + TXwptr);
2007 mask = readw(ofsAddr + TX_mask);
2008 return mask - ((wptr - rptr) & mask);
2009}
2010
2011static int MoxaPortRxQueue(struct moxa_port *port)
2012{
2013 void __iomem *ofsAddr = port->tableAddr;
2014 u16 rptr, wptr, mask;
2015
2016 rptr = readw(ofsAddr + RXrptr);
2017 wptr = readw(ofsAddr + RXwptr);
2018 mask = readw(ofsAddr + RX_mask);
2019 return (wptr - rptr) & mask;
2020}
2021
2022static void MoxaPortTxDisable(struct moxa_port *port)
2023{
2024 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2025}
2026
2027static void MoxaPortTxEnable(struct moxa_port *port)
2028{
2029 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2030}
2031
2032static int moxa_get_serial_info(struct moxa_port *info,
2033 struct serial_struct __user *retinfo)
2034{
2035 struct serial_struct tmp = {
2036 .type = info->type,
2037 .line = info->port.tty->index,
2038 .flags = info->port.flags,
2039 .baud_base = 921600,
2040 .close_delay = info->port.close_delay
2041 };
2042 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
2043}
2044
2045
2046static int moxa_set_serial_info(struct moxa_port *info,
2047 struct serial_struct __user *new_info)
2048{
2049 struct serial_struct new_serial;
2050
2051 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2052 return -EFAULT;
2053
2054 if (new_serial.irq != 0 || new_serial.port != 0 ||
2055 new_serial.custom_divisor != 0 ||
2056 new_serial.baud_base != 921600)
2057 return -EPERM;
2058
2059 if (!capable(CAP_SYS_ADMIN)) {
2060 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2061 (info->port.flags & ~ASYNC_USR_MASK)))
2062 return -EPERM;
2063 } else
2064 info->port.close_delay = new_serial.close_delay * HZ / 100;
2065
2066 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2067 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
2068
2069 MoxaSetFifo(info, new_serial.type == PORT_16550A);
2070
2071 info->type = new_serial.type;
2072 return 0;
2073}
2074
2075
2076
2077
2078
2079
2080
2081static void MoxaSetFifo(struct moxa_port *port, int enable)
2082{
2083 void __iomem *ofsAddr = port->tableAddr;
2084
2085 if (!enable) {
2086 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2087 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2088 } else {
2089 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2090 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2091 }
2092}
2093
