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29#include <linux/module.h>
30#include <linux/platform_device.h>
31#include <linux/kernel.h>
32#include <linux/delay.h>
33#include <linux/stddef.h>
34#include <linux/ioport.h>
35#include <linux/i2c.h>
36#include <linux/init.h>
37#include <linux/io.h>
38#include <linux/acpi.h>
39
40
41#define SMBHSTCNT (0 + sch_smba)
42#define SMBHSTSTS (1 + sch_smba)
43#define SMBHSTADD (4 + sch_smba)
44#define SMBHSTCMD (5 + sch_smba)
45#define SMBHSTDAT0 (6 + sch_smba)
46#define SMBHSTDAT1 (7 + sch_smba)
47#define SMBBLKDAT (0x20 + sch_smba)
48
49
50#define MAX_TIMEOUT 500
51
52
53#define SCH_QUICK 0x00
54#define SCH_BYTE 0x01
55#define SCH_BYTE_DATA 0x02
56#define SCH_WORD_DATA 0x03
57#define SCH_BLOCK_DATA 0x05
58
59static unsigned short sch_smba;
60static struct i2c_adapter sch_adapter;
61
62
63
64
65
66
67static int sch_transaction(void)
68{
69 int temp;
70 int result = 0;
71 int timeout = 0;
72
73 dev_dbg(&sch_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
74 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
75 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
76 inb(SMBHSTDAT1));
77
78
79 temp = inb(SMBHSTSTS) & 0x0f;
80 if (temp) {
81
82 if (temp & 0x01) {
83 dev_dbg(&sch_adapter.dev, "Completion (%02x). "
84 "Clear...\n", temp);
85 }
86 if (temp & 0x06) {
87 dev_dbg(&sch_adapter.dev, "SMBus error (%02x). "
88 "Resetting...\n", temp);
89 }
90 outb(temp, SMBHSTSTS);
91 temp = inb(SMBHSTSTS) & 0x0f;
92 if (temp) {
93 dev_err(&sch_adapter.dev,
94 "SMBus is not ready: (%02x)\n", temp);
95 return -EAGAIN;
96 }
97 }
98
99
100 outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT);
101
102 do {
103 msleep(1);
104 temp = inb(SMBHSTSTS) & 0x0f;
105 } while ((temp & 0x08) && (timeout++ < MAX_TIMEOUT));
106
107
108 if (timeout > MAX_TIMEOUT) {
109 dev_err(&sch_adapter.dev, "SMBus Timeout!\n");
110 result = -ETIMEDOUT;
111 }
112 if (temp & 0x04) {
113 result = -EIO;
114 dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be "
115 "locked until next hard reset. (sorry!)\n");
116
117 } else if (temp & 0x02) {
118 result = -EIO;
119 dev_err(&sch_adapter.dev, "Error: no response!\n");
120 } else if (temp & 0x01) {
121 dev_dbg(&sch_adapter.dev, "Post complete!\n");
122 outb(temp, SMBHSTSTS);
123 temp = inb(SMBHSTSTS) & 0x07;
124 if (temp & 0x06) {
125
126 dev_dbg(&sch_adapter.dev, "Failed reset at end of "
127 "transaction (%02x), Bus error!\n", temp);
128 }
129 } else {
130 result = -ENXIO;
131 dev_dbg(&sch_adapter.dev, "No such address.\n");
132 }
133 dev_dbg(&sch_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
134 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
135 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
136 inb(SMBHSTDAT1));
137 return result;
138}
139
140
141
142
143
144
145
146
147static s32 sch_access(struct i2c_adapter *adap, u16 addr,
148 unsigned short flags, char read_write,
149 u8 command, int size, union i2c_smbus_data *data)
150{
151 int i, len, temp, rc;
152
153
154 temp = inb(SMBHSTSTS) & 0x0f;
155 if (temp & 0x08) {
156 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp);
157 return -EAGAIN;
158 }
159 dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size,
160 (read_write)?"READ":"WRITE");
161 switch (size) {
162 case I2C_SMBUS_QUICK:
163 outb((addr << 1) | read_write, SMBHSTADD);
164 size = SCH_QUICK;
165 break;
166 case I2C_SMBUS_BYTE:
167 outb((addr << 1) | read_write, SMBHSTADD);
168 if (read_write == I2C_SMBUS_WRITE)
169 outb(command, SMBHSTCMD);
170 size = SCH_BYTE;
171 break;
172 case I2C_SMBUS_BYTE_DATA:
173 outb((addr << 1) | read_write, SMBHSTADD);
174 outb(command, SMBHSTCMD);
175 if (read_write == I2C_SMBUS_WRITE)
176 outb(data->byte, SMBHSTDAT0);
177 size = SCH_BYTE_DATA;
178 break;
179 case I2C_SMBUS_WORD_DATA:
180 outb((addr << 1) | read_write, SMBHSTADD);
181 outb(command, SMBHSTCMD);
182 if (read_write == I2C_SMBUS_WRITE) {
183 outb(data->word & 0xff, SMBHSTDAT0);
184 outb((data->word & 0xff00) >> 8, SMBHSTDAT1);
185 }
186 size = SCH_WORD_DATA;
187 break;
188 case I2C_SMBUS_BLOCK_DATA:
189 outb((addr << 1) | read_write, SMBHSTADD);
190 outb(command, SMBHSTCMD);
191 if (read_write == I2C_SMBUS_WRITE) {
192 len = data->block[0];
193 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
194 return -EINVAL;
195 outb(len, SMBHSTDAT0);
196 for (i = 1; i <= len; i++)
197 outb(data->block[i], SMBBLKDAT+i-1);
198 }
199 size = SCH_BLOCK_DATA;
200 break;
201 default:
202 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
203 return -EOPNOTSUPP;
204 }
205 dev_dbg(&sch_adapter.dev, "write size %d to 0x%04x\n", size, SMBHSTCNT);
206 outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT);
207
208 rc = sch_transaction();
209 if (rc)
210 return rc;
211
212 if ((read_write == I2C_SMBUS_WRITE) || (size == SCH_QUICK))
213 return 0;
214
215 switch (size) {
216 case SCH_BYTE:
217 case SCH_BYTE_DATA:
218 data->byte = inb(SMBHSTDAT0);
219 break;
220 case SCH_WORD_DATA:
221 data->word = inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8);
222 break;
223 case SCH_BLOCK_DATA:
224 data->block[0] = inb(SMBHSTDAT0);
225 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
226 return -EPROTO;
227 for (i = 1; i <= data->block[0]; i++)
228 data->block[i] = inb(SMBBLKDAT+i-1);
229 break;
230 }
231 return 0;
232}
233
234static u32 sch_func(struct i2c_adapter *adapter)
235{
236 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
237 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
238 I2C_FUNC_SMBUS_BLOCK_DATA;
239}
240
241static const struct i2c_algorithm smbus_algorithm = {
242 .smbus_xfer = sch_access,
243 .functionality = sch_func,
244};
245
246static struct i2c_adapter sch_adapter = {
247 .owner = THIS_MODULE,
248 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
249 .algo = &smbus_algorithm,
250};
251
252static int __devinit smbus_sch_probe(struct platform_device *dev)
253{
254 struct resource *res;
255 int retval;
256
257 res = platform_get_resource(dev, IORESOURCE_IO, 0);
258 if (!res)
259 return -EBUSY;
260
261 if (!request_region(res->start, resource_size(res), dev->name)) {
262 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
263 sch_smba);
264 return -EBUSY;
265 }
266
267 sch_smba = res->start;
268
269 dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
270
271
272 sch_adapter.dev.parent = &dev->dev;
273
274 snprintf(sch_adapter.name, sizeof(sch_adapter.name),
275 "SMBus SCH adapter at %04x", sch_smba);
276
277 retval = i2c_add_adapter(&sch_adapter);
278 if (retval) {
279 dev_err(&dev->dev, "Couldn't register adapter!\n");
280 release_region(res->start, resource_size(res));
281 sch_smba = 0;
282 }
283
284 return retval;
285}
286
287static int __devexit smbus_sch_remove(struct platform_device *pdev)
288{
289 struct resource *res;
290 if (sch_smba) {
291 i2c_del_adapter(&sch_adapter);
292 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
293 release_region(res->start, resource_size(res));
294 sch_smba = 0;
295 }
296
297 return 0;
298}
299
300static struct platform_driver smbus_sch_driver = {
301 .driver = {
302 .name = "isch_smbus",
303 .owner = THIS_MODULE,
304 },
305 .probe = smbus_sch_probe,
306 .remove = __devexit_p(smbus_sch_remove),
307};
308
309static int __init i2c_sch_init(void)
310{
311 return platform_driver_register(&smbus_sch_driver);
312}
313
314static void __exit i2c_sch_exit(void)
315{
316 platform_driver_unregister(&smbus_sch_driver);
317}
318
319MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
320MODULE_DESCRIPTION("Intel SCH SMBus driver");
321MODULE_LICENSE("GPL");
322
323module_init(i2c_sch_init);
324module_exit(i2c_sch_exit);
325MODULE_ALIAS("platform:isch_smbus");
326
