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22#include <linux/pci.h>
23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h>
25#include <linux/kdev_t.h>
26#include <linux/slab.h>
27
28#include <media/v4l2-device.h>
29#include <media/tuner.h>
30#include <media/tveeprom.h>
31#include <media/videobuf-dma-sg.h>
32#include <media/videobuf-dvb.h>
33#include <media/rc-core.h>
34
35#include "btcx-risc.h"
36#include "cx23885-reg.h"
37#include "media/cx2341x.h"
38
39#include <linux/version.h>
40#include <linux/mutex.h>
41
42#define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
43
44#define UNSET (-1U)
45
46#define CX23885_MAXBOARDS 8
47
48
49#define MAX_CX23885_INPUT 8
50#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
51#define RESOURCE_OVERLAY 1
52#define RESOURCE_VIDEO 2
53#define RESOURCE_VBI 4
54
55#define BUFFER_TIMEOUT (HZ)
56
57#define CX23885_BOARD_NOAUTO UNSET
58#define CX23885_BOARD_UNKNOWN 0
59#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
60#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
61#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
62#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
63#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
64#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
65#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
66#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
67#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
68#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
69#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
70#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
71#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
72#define CX23885_BOARD_TBS_6920 14
73#define CX23885_BOARD_TEVII_S470 15
74#define CX23885_BOARD_DVBWORLD_2005 16
75#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
76#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
77#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
78#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
79#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
80#define CX23885_BOARD_MYGICA_X8506 22
81#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
82#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
83#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
84#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
85#define CX23885_BOARD_MYGICA_X8558PRO 27
86#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
87#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
88
89#define GPIO_0 0x00000001
90#define GPIO_1 0x00000002
91#define GPIO_2 0x00000004
92#define GPIO_3 0x00000008
93#define GPIO_4 0x00000010
94#define GPIO_5 0x00000020
95#define GPIO_6 0x00000040
96#define GPIO_7 0x00000080
97#define GPIO_8 0x00000100
98#define GPIO_9 0x00000200
99#define GPIO_10 0x00000400
100#define GPIO_11 0x00000800
101#define GPIO_12 0x00001000
102#define GPIO_13 0x00002000
103#define GPIO_14 0x00004000
104#define GPIO_15 0x00008000
105
106
107#define CX23885_NORMS (\
108 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
109 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
110 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
111 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
112
113struct cx23885_fmt {
114 char *name;
115 u32 fourcc;
116 int depth;
117 int flags;
118 u32 cxformat;
119};
120
121struct cx23885_ctrl {
122 struct v4l2_queryctrl v;
123 u32 off;
124 u32 reg;
125 u32 mask;
126 u32 shift;
127};
128
129struct cx23885_tvnorm {
130 char *name;
131 v4l2_std_id id;
132 u32 cxiformat;
133 u32 cxoformat;
134};
135
136struct cx23885_fh {
137 struct cx23885_dev *dev;
138 enum v4l2_buf_type type;
139 int radio;
140 u32 resources;
141
142
143 struct v4l2_window win;
144 struct v4l2_clip *clips;
145 unsigned int nclips;
146
147
148 struct cx23885_fmt *fmt;
149 unsigned int width, height;
150
151
152 struct videobuf_queue vidq;
153 struct videobuf_queue vbiq;
154
155
156 struct videobuf_queue mpegq;
157 atomic_t v4l_reading;
158};
159
160enum cx23885_itype {
161 CX23885_VMUX_COMPOSITE1 = 1,
162 CX23885_VMUX_COMPOSITE2,
163 CX23885_VMUX_COMPOSITE3,
164 CX23885_VMUX_COMPOSITE4,
165 CX23885_VMUX_SVIDEO,
166 CX23885_VMUX_COMPONENT,
167 CX23885_VMUX_TELEVISION,
168 CX23885_VMUX_CABLE,
169 CX23885_VMUX_DVB,
170 CX23885_VMUX_DEBUG,
171 CX23885_RADIO,
172};
173
174enum cx23885_src_sel_type {
175 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
176 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
177};
178
179
180struct cx23885_buffer {
181
182 struct videobuf_buffer vb;
183
184
185 unsigned int bpl;
186 struct btcx_riscmem risc;
187 struct cx23885_fmt *fmt;
188 u32 count;
189};
190
191struct cx23885_input {
192 enum cx23885_itype type;
193 unsigned int vmux;
194 u32 gpio0, gpio1, gpio2, gpio3;
195};
196
197typedef enum {
198 CX23885_MPEG_UNDEFINED = 0,
199 CX23885_MPEG_DVB,
200 CX23885_ANALOG_VIDEO,
201 CX23885_MPEG_ENCODER,
202} port_t;
203
204struct cx23885_board {
205 char *name;
206 port_t porta, portb, portc;
207 unsigned int tuner_type;
208 unsigned int radio_type;
209 unsigned char tuner_addr;
210 unsigned char radio_addr;
211
212
213
214
215
216
217
218
219
220
221 u32 clk_freq;
222 struct cx23885_input input[MAX_CX23885_INPUT];
223 int cimax;
224};
225
226struct cx23885_subid {
227 u16 subvendor;
228 u16 subdevice;
229 u32 card;
230};
231
232struct cx23885_i2c {
233 struct cx23885_dev *dev;
234
235 int nr;
236
237
238 struct i2c_adapter i2c_adap;
239 struct i2c_algo_bit_data i2c_algo;
240 struct i2c_client i2c_client;
241 u32 i2c_rc;
242
243
244 u32 i2c_period;
245 u32 reg_ctrl;
246 u32 reg_stat;
247 u32 reg_addr;
248 u32 reg_rdata;
249 u32 reg_wdata;
250};
251
252struct cx23885_dmaqueue {
253 struct list_head active;
254 struct list_head queued;
255 struct timer_list timeout;
256 struct btcx_riscmem stopper;
257 u32 count;
258};
259
260struct cx23885_tsport {
261 struct cx23885_dev *dev;
262
263 int nr;
264 int sram_chno;
265
266 struct videobuf_dvb_frontends frontends;
267
268
269 struct cx23885_dmaqueue mpegq;
270 u32 ts_packet_size;
271 u32 ts_packet_count;
272
273 int width;
274 int height;
275
276 spinlock_t slock;
277
278
279 u32 reg_gpcnt;
280 u32 reg_gpcnt_ctl;
281 u32 reg_dma_ctl;
282 u32 reg_lngth;
283 u32 reg_hw_sop_ctrl;
284 u32 reg_gen_ctrl;
285 u32 reg_bd_pkt_status;
286 u32 reg_sop_status;
287 u32 reg_fifo_ovfl_stat;
288 u32 reg_vld_misc;
289 u32 reg_ts_clk_en;
290 u32 reg_ts_int_msk;
291 u32 reg_ts_int_stat;
292 u32 reg_src_sel;
293
294
295 int pci_irqmask;
296 u32 dma_ctl_val;
297 u32 ts_int_msk_val;
298 u32 gen_ctrl_val;
299 u32 ts_clk_en_val;
300 u32 src_sel_val;
301 u32 vld_misc_val;
302 u32 hw_sop_ctrl_val;
303
304
305 u32 num_frontends;
306 void *port_priv;
307};
308
309struct cx23885_kernel_ir {
310 struct cx23885_dev *cx;
311 char *name;
312 char *phys;
313
314 struct rc_dev *rc;
315};
316
317struct cx23885_dev {
318 atomic_t refcount;
319 struct v4l2_device v4l2_dev;
320
321
322 struct pci_dev *pci;
323 unsigned char pci_rev, pci_lat;
324 int pci_bus, pci_slot;
325 u32 __iomem *lmmio;
326 u8 __iomem *bmmio;
327 int pci_irqmask;
328 spinlock_t pci_irqmask_lock;
329 int hwrevision;
330
331
332
333 u32 clk_freq;
334
335
336 struct cx23885_i2c i2c_bus[3];
337
338 int nr;
339 struct mutex lock;
340 struct mutex gpio_lock;
341
342
343 unsigned int board;
344 char name[32];
345
346 struct cx23885_tsport ts1, ts2;
347
348
349 struct sram_channel *sram_channels;
350
351 enum {
352 CX23885_BRIDGE_UNDEFINED = 0,
353 CX23885_BRIDGE_885 = 885,
354 CX23885_BRIDGE_887 = 887,
355 CX23885_BRIDGE_888 = 888,
356 } bridge;
357
358
359 u32 resources;
360 unsigned int input;
361 u32 tvaudio;
362 v4l2_std_id tvnorm;
363 unsigned int tuner_type;
364 unsigned char tuner_addr;
365 unsigned int radio_type;
366 unsigned char radio_addr;
367 unsigned int has_radio;
368 struct v4l2_subdev *sd_cx25840;
369 struct work_struct cx25840_work;
370
371
372 struct v4l2_subdev *sd_ir;
373 struct work_struct ir_rx_work;
374 unsigned long ir_rx_notifications;
375 struct work_struct ir_tx_work;
376 unsigned long ir_tx_notifications;
377
378 struct cx23885_kernel_ir *kernel_ir;
379 atomic_t ir_input_stopping;
380
381
382 u32 freq;
383 struct video_device *video_dev;
384 struct video_device *vbi_dev;
385 struct video_device *radio_dev;
386
387 struct cx23885_dmaqueue vidq;
388 struct cx23885_dmaqueue vbiq;
389 spinlock_t slock;
390
391
392 u32 cx23417_mailbox;
393 struct cx2341x_mpeg_params mpeg_params;
394 struct video_device *v4l_device;
395 atomic_t v4l_reader_count;
396 struct cx23885_tvnorm encodernorm;
397
398};
399
400static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
401{
402 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
403}
404
405#define call_all(dev, o, f, args...) \
406 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
407
408#define CX23885_HW_888_IR (1 << 0)
409#define CX23885_HW_AV_CORE (1 << 1)
410
411#define call_hw(dev, grpid, o, f, args...) \
412 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
413
414extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
415
416#define SRAM_CH01 0
417#define SRAM_CH02 1
418#define SRAM_CH03 2
419#define SRAM_CH04 3
420#define SRAM_CH05 4
421#define SRAM_CH06 5
422#define SRAM_CH07 6
423#define SRAM_CH08 7
424#define SRAM_CH09 8
425#define SRAM_CH10 9
426#define SRAM_CH11 10
427#define SRAM_CH12 11
428#define SRAM_CH13 12
429#define SRAM_CH14 13
430#define SRAM_CH15 14
431
432struct sram_channel {
433 char *name;
434 u32 cmds_start;
435 u32 ctrl_start;
436 u32 cdt;
437 u32 fifo_start;
438 u32 fifo_size;
439 u32 ptr1_reg;
440 u32 ptr2_reg;
441 u32 cnt1_reg;
442 u32 cnt2_reg;
443 u32 jumponly;
444};
445
446
447
448#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
449#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
450
451#define cx_andor(reg, mask, value) \
452 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
453 ((value) & (mask)), dev->lmmio+((reg)>>2))
454
455#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
456#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
457
458
459
460
461extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
462 struct sram_channel *ch,
463 unsigned int bpl, u32 risc);
464
465extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
466 struct sram_channel *ch);
467
468extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
469 u32 reg, u32 mask, u32 value);
470
471extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
472 struct scatterlist *sglist,
473 unsigned int top_offset, unsigned int bottom_offset,
474 unsigned int bpl, unsigned int padding, unsigned int lines);
475
476void cx23885_cancel_buffers(struct cx23885_tsport *port);
477
478extern int cx23885_restart_queue(struct cx23885_tsport *port,
479 struct cx23885_dmaqueue *q);
480
481extern void cx23885_wakeup(struct cx23885_tsport *port,
482 struct cx23885_dmaqueue *q, u32 count);
483
484extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
485extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
486extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
487extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
488 int asoutput);
489
490extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
491extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
492extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
493extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
494
495
496
497extern struct cx23885_board cx23885_boards[];
498extern const unsigned int cx23885_bcount;
499
500extern struct cx23885_subid cx23885_subids[];
501extern const unsigned int cx23885_idcount;
502
503extern int cx23885_tuner_callback(void *priv, int component,
504 int command, int arg);
505extern void cx23885_card_list(struct cx23885_dev *dev);
506extern int cx23885_ir_init(struct cx23885_dev *dev);
507extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
508extern void cx23885_ir_fini(struct cx23885_dev *dev);
509extern void cx23885_gpio_setup(struct cx23885_dev *dev);
510extern void cx23885_card_setup(struct cx23885_dev *dev);
511extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
512
513extern int cx23885_dvb_register(struct cx23885_tsport *port);
514extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
515
516extern int cx23885_buf_prepare(struct videobuf_queue *q,
517 struct cx23885_tsport *port,
518 struct cx23885_buffer *buf,
519 enum v4l2_field field);
520extern void cx23885_buf_queue(struct cx23885_tsport *port,
521 struct cx23885_buffer *buf);
522extern void cx23885_free_buffer(struct videobuf_queue *q,
523 struct cx23885_buffer *buf);
524
525
526
527
528extern int cx23885_video_register(struct cx23885_dev *dev);
529extern void cx23885_video_unregister(struct cx23885_dev *dev);
530extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
531
532
533
534extern int cx23885_vbi_fmt(struct file *file, void *priv,
535 struct v4l2_format *f);
536extern void cx23885_vbi_timeout(unsigned long data);
537extern struct videobuf_queue_ops cx23885_vbi_qops;
538
539
540extern int cx23885_i2c_register(struct cx23885_i2c *bus);
541extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
542extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
543
544
545
546extern int cx23885_417_register(struct cx23885_dev *dev);
547extern void cx23885_417_unregister(struct cx23885_dev *dev);
548extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
549extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
550extern void cx23885_mc417_init(struct cx23885_dev *dev);
551extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
552extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
553extern int mc417_register_read(struct cx23885_dev *dev,
554 u16 address, u32 *value);
555extern int mc417_register_write(struct cx23885_dev *dev,
556 u16 address, u32 value);
557extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
558extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
559extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
560
561
562
563
564
565static inline unsigned int norm_maxw(v4l2_std_id norm)
566{
567 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
568}
569
570static inline unsigned int norm_maxh(v4l2_std_id norm)
571{
572 return (norm & V4L2_STD_625_50) ? 576 : 480;
573}
574
575static inline unsigned int norm_swidth(v4l2_std_id norm)
576{
577 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
578}
579
