1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h>
25#include <linux/videodev2.h>
26#include <linux/kdev_t.h>
27
28#include <media/v4l2-device.h>
29#include <media/tuner.h>
30#include <media/tveeprom.h>
31#include <media/videobuf-dma-sg.h>
32#include <media/v4l2-chip-ident.h>
33#include <media/cx2341x.h>
34#include <media/videobuf-dvb.h>
35#include <media/ir-kbd-i2c.h>
36
37#include "btcx-risc.h"
38#include "cx88-reg.h"
39#include "tuner-xc2028.h"
40
41#include <linux/version.h>
42#include <linux/mutex.h>
43#define CX88_VERSION_CODE KERNEL_VERSION(0, 0, 8)
44
45#define UNSET (-1U)
46
47#define CX88_MAXBOARDS 8
48
49
50#define MAX_CX88_INPUT 8
51
52
53
54
55
56#define CX88_NORMS (V4L2_STD_ALL \
57 & ~V4L2_STD_PAL_H \
58 & ~V4L2_STD_NTSC_M_KR \
59 & ~V4L2_STD_SECAM_LC)
60
61#define FORMAT_FLAGS_PACKED 0x01
62#define FORMAT_FLAGS_PLANAR 0x02
63
64#define VBI_LINE_COUNT 17
65#define VBI_LINE_LENGTH 2048
66
67#define AUD_RDS_LINES 4
68
69
70#define SHADOW_AUD_VOL_CTL 1
71#define SHADOW_AUD_BAL_CTL 2
72#define SHADOW_MAX 3
73
74
75enum cx88_deemph_type {
76 FM_NO_DEEMPH = 0,
77 FM_DEEMPH_50,
78 FM_DEEMPH_75
79};
80
81enum cx88_board_type {
82 CX88_BOARD_NONE = 0,
83 CX88_MPEG_DVB,
84 CX88_MPEG_BLACKBIRD
85};
86
87enum cx8802_board_access {
88 CX8802_DRVCTL_SHARED = 1,
89 CX8802_DRVCTL_EXCLUSIVE = 2,
90};
91
92
93
94
95static unsigned int inline norm_maxw(v4l2_std_id norm)
96{
97 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
98}
99
100
101static unsigned int inline norm_maxh(v4l2_std_id norm)
102{
103 return (norm & V4L2_STD_625_50) ? 576 : 480;
104}
105
106
107
108
109struct cx8800_fmt {
110 const char *name;
111 u32 fourcc;
112 int depth;
113 int flags;
114 u32 cxformat;
115};
116
117struct cx88_ctrl {
118 struct v4l2_queryctrl v;
119 u32 off;
120 u32 reg;
121 u32 sreg;
122 u32 mask;
123 u32 shift;
124};
125
126
127
128
129#define SRAM_CH21 0
130#define SRAM_CH22 1
131#define SRAM_CH23 2
132#define SRAM_CH24 3
133#define SRAM_CH25 4
134#define SRAM_CH26 5
135#define SRAM_CH28 6
136#define SRAM_CH27 7
137
138
139struct sram_channel {
140 const char *name;
141 u32 cmds_start;
142 u32 ctrl_start;
143 u32 cdt;
144 u32 fifo_start;
145 u32 fifo_size;
146 u32 ptr1_reg;
147 u32 ptr2_reg;
148 u32 cnt1_reg;
149 u32 cnt2_reg;
150};
151extern const struct sram_channel const cx88_sram_channels[];
152
153
154
155
156#define CX88_BOARD_NOAUTO UNSET
157#define CX88_BOARD_UNKNOWN 0
158#define CX88_BOARD_HAUPPAUGE 1
159#define CX88_BOARD_GDI 2
160#define CX88_BOARD_PIXELVIEW 3
161#define CX88_BOARD_ATI_WONDER_PRO 4
162#define CX88_BOARD_WINFAST2000XP_EXPERT 5
163#define CX88_BOARD_AVERTV_STUDIO_303 6
164#define CX88_BOARD_MSI_TVANYWHERE_MASTER 7
165#define CX88_BOARD_WINFAST_DV2000 8
166#define CX88_BOARD_LEADTEK_PVR2000 9
167#define CX88_BOARD_IODATA_GVVCP3PCI 10
168#define CX88_BOARD_PROLINK_PLAYTVPVR 11
169#define CX88_BOARD_ASUS_PVR_416 12
170#define CX88_BOARD_MSI_TVANYWHERE 13
171#define CX88_BOARD_KWORLD_DVB_T 14
172#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
173#define CX88_BOARD_KWORLD_LTV883 16
174#define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q 17
175#define CX88_BOARD_HAUPPAUGE_DVB_T1 18
176#define CX88_BOARD_CONEXANT_DVB_T1 19
177#define CX88_BOARD_PROVIDEO_PV259 20
178#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
179#define CX88_BOARD_PCHDTV_HD3000 22
180#define CX88_BOARD_DNTV_LIVE_DVB_T 23
181#define CX88_BOARD_HAUPPAUGE_ROSLYN 24
182#define CX88_BOARD_DIGITALLOGIC_MEC 25
183#define CX88_BOARD_IODATA_GVBCTV7E 26
184#define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
185#define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T 28
186#define CX88_BOARD_ADSTECH_DVB_T_PCI 29
187#define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30
188#define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
189#define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
190#define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
191#define CX88_BOARD_ATI_HDTVWONDER 34
192#define CX88_BOARD_WINFAST_DTV1000 35
193#define CX88_BOARD_AVERTV_303 36
194#define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1 37
195#define CX88_BOARD_HAUPPAUGE_NOVASE2_S1 38
196#define CX88_BOARD_KWORLD_DVBS_100 39
197#define CX88_BOARD_HAUPPAUGE_HVR1100 40
198#define CX88_BOARD_HAUPPAUGE_HVR1100LP 41
199#define CX88_BOARD_DNTV_LIVE_DVB_T_PRO 42
200#define CX88_BOARD_KWORLD_DVB_T_CX22702 43
201#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
202#define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
203#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
204#define CX88_BOARD_PCHDTV_HD5500 47
205#define CX88_BOARD_KWORLD_MCE200_DELUXE 48
206#define CX88_BOARD_PIXELVIEW_PLAYTV_P7000 49
207#define CX88_BOARD_NPGTECH_REALTV_TOP10FM 50
208#define CX88_BOARD_WINFAST_DTV2000H 51
209#define CX88_BOARD_GENIATECH_DVBS 52
210#define CX88_BOARD_HAUPPAUGE_HVR3000 53
211#define CX88_BOARD_NORWOOD_MICRO 54
212#define CX88_BOARD_TE_DTV_250_OEM_SWANN 55
213#define CX88_BOARD_HAUPPAUGE_HVR1300 56
214#define CX88_BOARD_ADSTECH_PTV_390 57
215#define CX88_BOARD_PINNACLE_PCTV_HD_800i 58
216#define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
217#define CX88_BOARD_PINNACLE_HYBRID_PCTV 60
218#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
219#define CX88_BOARD_POWERCOLOR_REAL_ANGEL 62
220#define CX88_BOARD_GENIATECH_X8000_MT 63
221#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
222#define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
223#define CX88_BOARD_PROLINK_PV_8000GT 66
224#define CX88_BOARD_KWORLD_ATSC_120 67
225#define CX88_BOARD_HAUPPAUGE_HVR4000 68
226#define CX88_BOARD_HAUPPAUGE_HVR4000LITE 69
227#define CX88_BOARD_TEVII_S460 70
228#define CX88_BOARD_OMICOM_SS4_PCI 71
229#define CX88_BOARD_TBS_8920 72
230#define CX88_BOARD_TEVII_S420 73
231#define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
232#define CX88_BOARD_PROF_7300 75
233#define CX88_BOARD_SATTRADE_ST4200 76
234#define CX88_BOARD_TBS_8910 77
235#define CX88_BOARD_PROF_6200 78
236#define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
237#define CX88_BOARD_HAUPPAUGE_IRONLY 80
238#define CX88_BOARD_WINFAST_DTV1800H 81
239#define CX88_BOARD_WINFAST_DTV2000H_J 82
240#define CX88_BOARD_PROF_7301 83
241#define CX88_BOARD_SAMSUNG_SMT_7020 84
242#define CX88_BOARD_TWINHAN_VP1027_DVBS 85
243
244enum cx88_itype {
245 CX88_VMUX_COMPOSITE1 = 1,
246 CX88_VMUX_COMPOSITE2,
247 CX88_VMUX_COMPOSITE3,
248 CX88_VMUX_COMPOSITE4,
249 CX88_VMUX_SVIDEO,
250 CX88_VMUX_TELEVISION,
251 CX88_VMUX_CABLE,
252 CX88_VMUX_DVB,
253 CX88_VMUX_DEBUG,
254 CX88_RADIO,
255};
256
257struct cx88_input {
258 enum cx88_itype type;
259 u32 gpio0, gpio1, gpio2, gpio3;
260 unsigned int vmux:2;
261 unsigned int audioroute:4;
262};
263
264struct cx88_board {
265 const char *name;
266 unsigned int tuner_type;
267 unsigned int radio_type;
268 unsigned char tuner_addr;
269 unsigned char radio_addr;
270 int tda9887_conf;
271 struct cx88_input input[MAX_CX88_INPUT];
272 struct cx88_input radio;
273 enum cx88_board_type mpeg;
274 unsigned int audio_chip;
275 int num_frontends;
276};
277
278struct cx88_subid {
279 u16 subvendor;
280 u16 subdevice;
281 u32 card;
282};
283
284enum cx88_tvaudio {
285 WW_NONE = 1,
286 WW_BTSC,
287 WW_BG,
288 WW_DK,
289 WW_I,
290 WW_L,
291 WW_EIAJ,
292 WW_I2SPT,
293 WW_FM,
294 WW_I2SADC,
295 WW_M
296};
297
298#define INPUT(nr) (core->board.input[nr])
299
300
301
302
303#define RESOURCE_OVERLAY 1
304#define RESOURCE_VIDEO 2
305#define RESOURCE_VBI 4
306
307#define BUFFER_TIMEOUT msecs_to_jiffies(2000)
308
309
310struct cx88_buffer {
311
312 struct videobuf_buffer vb;
313
314
315 unsigned int bpl;
316 struct btcx_riscmem risc;
317 const struct cx8800_fmt *fmt;
318 u32 count;
319};
320
321struct cx88_dmaqueue {
322 struct list_head active;
323 struct list_head queued;
324 struct timer_list timeout;
325 struct btcx_riscmem stopper;
326 u32 count;
327};
328
329struct cx88_core {
330 struct list_head devlist;
331 atomic_t refcount;
332
333
334 int nr;
335 char name[32];
336
337
338 int pci_bus;
339 int pci_slot;
340 u32 __iomem *lmmio;
341 u8 __iomem *bmmio;
342 u32 shadow[SHADOW_MAX];
343 int pci_irqmask;
344
345
346 struct i2c_adapter i2c_adap;
347 struct i2c_algo_bit_data i2c_algo;
348 struct i2c_client i2c_client;
349 u32 i2c_state, i2c_rc;
350
351
352 struct v4l2_device v4l2_dev;
353 struct i2c_client *i2c_rtc;
354 unsigned int boardnr;
355 struct cx88_board board;
356
357
358 unsigned int tuner_formats;
359
360
361#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
362 int (*prev_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
363#endif
364 void (*gate_ctrl)(struct cx88_core *core, int open);
365
366
367 struct task_struct *kthread;
368 v4l2_std_id tvnorm;
369 enum cx88_tvaudio tvaudio;
370 u32 audiomode_manual;
371 u32 audiomode_current;
372 u32 input;
373 u32 astat;
374 u32 use_nicam;
375 unsigned long last_change;
376
377
378 struct cx88_IR *ir;
379
380
381 struct IR_i2c_init_data init_data;
382
383 struct mutex lock;
384
385 u32 freq;
386 atomic_t users;
387 atomic_t mpeg_users;
388
389
390 struct cx8802_dev *dvbdev;
391 enum cx88_board_type active_type_id;
392 int active_ref;
393 int active_fe_id;
394};
395
396static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
397{
398 return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
399}
400
401#define call_all(core, o, f, args...) \
402 do { \
403 if (!core->i2c_rc) { \
404 if (core->gate_ctrl) \
405 core->gate_ctrl(core, 1); \
406 v4l2_device_call_all(&core->v4l2_dev, 0, o, f, ##args); \
407 if (core->gate_ctrl) \
408 core->gate_ctrl(core, 0); \
409 } \
410 } while (0)
411
412struct cx8800_dev;
413struct cx8802_dev;
414
415
416
417
418struct cx8800_fh {
419 struct cx8800_dev *dev;
420 enum v4l2_buf_type type;
421 int radio;
422 unsigned int resources;
423
424
425 struct v4l2_window win;
426 struct v4l2_clip *clips;
427 unsigned int nclips;
428
429
430 const struct cx8800_fmt *fmt;
431 unsigned int width,height;
432 struct videobuf_queue vidq;
433
434
435 struct videobuf_queue vbiq;
436};
437
438struct cx8800_suspend_state {
439 int disabled;
440};
441
442struct cx8800_dev {
443 struct cx88_core *core;
444 spinlock_t slock;
445
446
447 unsigned int resources;
448 struct video_device *video_dev;
449 struct video_device *vbi_dev;
450 struct video_device *radio_dev;
451
452
453 struct pci_dev *pci;
454 unsigned char pci_rev,pci_lat;
455
456
457
458 struct cx88_dmaqueue vidq;
459 struct cx88_dmaqueue vbiq;
460
461
462
463
464 struct cx8800_suspend_state state;
465};
466
467
468
469
470
471
472
473
474
475struct cx8802_fh {
476 struct cx8802_dev *dev;
477 struct videobuf_queue mpegq;
478};
479
480struct cx8802_suspend_state {
481 int disabled;
482};
483
484struct cx8802_driver {
485 struct cx88_core *core;
486
487
488 struct list_head drvlist;
489
490
491 enum cx88_board_type type_id;
492 enum cx8802_board_access hw_access;
493
494
495 int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
496 int (*resume)(struct pci_dev *pci_dev);
497
498
499 int (*probe)(struct cx8802_driver *drv);
500 int (*remove)(struct cx8802_driver *drv);
501
502
503 int (*advise_acquire)(struct cx8802_driver *drv);
504 int (*advise_release)(struct cx8802_driver *drv);
505
506
507 int (*request_acquire)(struct cx8802_driver *drv);
508 int (*request_release)(struct cx8802_driver *drv);
509};
510
511struct cx8802_dev {
512 struct cx88_core *core;
513 spinlock_t slock;
514
515
516 struct pci_dev *pci;
517 unsigned char pci_rev,pci_lat;
518
519
520 struct cx88_dmaqueue mpegq;
521 u32 ts_packet_size;
522 u32 ts_packet_count;
523
524
525 struct cx8802_suspend_state state;
526
527
528 struct list_head devlist;
529#if defined(CONFIG_VIDEO_CX88_BLACKBIRD) || \
530 defined(CONFIG_VIDEO_CX88_BLACKBIRD_MODULE)
531 struct video_device *mpeg_dev;
532 u32 mailbox;
533 int width;
534 int height;
535 unsigned char mpeg_active;
536
537
538 struct cx2341x_mpeg_params params;
539#endif
540
541#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
542
543 struct videobuf_dvb_frontends frontends;
544#endif
545
546#if defined(CONFIG_VIDEO_CX88_VP3054) || \
547 defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
548
549 struct vp3054_i2c_state *vp3054;
550#endif
551
552 unsigned char ts_gen_cntrl;
553
554
555 struct list_head drvlist;
556 struct work_struct request_module_wk;
557};
558
559
560
561#define cx_read(reg) readl(core->lmmio + ((reg)>>2))
562#define cx_write(reg,value) writel((value), core->lmmio + ((reg)>>2))
563#define cx_writeb(reg,value) writeb((value), core->bmmio + (reg))
564
565#define cx_andor(reg,mask,value) \
566 writel((readl(core->lmmio+((reg)>>2)) & ~(mask)) |\
567 ((value) & (mask)), core->lmmio+((reg)>>2))
568#define cx_set(reg,bit) cx_andor((reg),(bit),(bit))
569#define cx_clear(reg,bit) cx_andor((reg),(bit),0)
570
571#define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
572
573
574#define cx_sread(sreg) (core->shadow[sreg])
575#define cx_swrite(sreg,reg,value) \
576 (core->shadow[sreg] = value, \
577 writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
578#define cx_sandor(sreg,reg,mask,value) \
579 (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | ((value) & (mask)), \
580 writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
581
582
583
584
585extern void cx88_print_irqbits(const char *name, const char *tag, const char *strings[],
586 int len, u32 bits, u32 mask);
587
588extern int cx88_core_irq(struct cx88_core *core, u32 status);
589extern void cx88_wakeup(struct cx88_core *core,
590 struct cx88_dmaqueue *q, u32 count);
591extern void cx88_shutdown(struct cx88_core *core);
592extern int cx88_reset(struct cx88_core *core);
593
594extern int
595cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
596 struct scatterlist *sglist,
597 unsigned int top_offset, unsigned int bottom_offset,
598 unsigned int bpl, unsigned int padding, unsigned int lines);
599extern int
600cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
601 struct scatterlist *sglist, unsigned int bpl,
602 unsigned int lines, unsigned int lpi);
603extern int
604cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
605 u32 reg, u32 mask, u32 value);
606extern void
607cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf);
608
609extern void cx88_risc_disasm(struct cx88_core *core,
610 struct btcx_riscmem *risc);
611extern int cx88_sram_channel_setup(struct cx88_core *core,
612 const struct sram_channel *ch,
613 unsigned int bpl, u32 risc);
614extern void cx88_sram_channel_dump(struct cx88_core *core,
615 const struct sram_channel *ch);
616
617extern int cx88_set_scale(struct cx88_core *core, unsigned int width,
618 unsigned int height, enum v4l2_field field);
619extern int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
620
621extern struct video_device *cx88_vdev_init(struct cx88_core *core,
622 struct pci_dev *pci,
623 const struct video_device *template_,
624 const char *type);
625extern struct cx88_core* cx88_core_get(struct pci_dev *pci);
626extern void cx88_core_put(struct cx88_core *core,
627 struct pci_dev *pci);
628
629extern int cx88_start_audio_dma(struct cx88_core *core);
630extern int cx88_stop_audio_dma(struct cx88_core *core);
631
632
633
634
635
636
637int cx8800_vbi_fmt (struct file *file, void *priv,
638 struct v4l2_format *f);
639
640
641
642
643
644
645int cx8800_stop_vbi_dma(struct cx8800_dev *dev);
646int cx8800_restart_vbi_queue(struct cx8800_dev *dev,
647 struct cx88_dmaqueue *q);
648void cx8800_vbi_timeout(unsigned long data);
649
650extern const struct videobuf_queue_ops cx8800_vbi_qops;
651
652
653
654
655extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
656
657
658
659
660
661extern int cx88_tuner_callback(void *dev, int component, int command, int arg);
662extern int cx88_get_resources(const struct cx88_core *core,
663 struct pci_dev *pci);
664extern struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
665extern void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
666
667
668
669
670void cx88_set_tvaudio(struct cx88_core *core);
671void cx88_newstation(struct cx88_core *core);
672void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
673void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
674int cx88_audio_thread(void *data);
675
676int cx8802_register_driver(struct cx8802_driver *drv);
677int cx8802_unregister_driver(struct cx8802_driver *drv);
678struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype);
679
680
681
682
683s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
684
685
686
687
688int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
689int cx88_ir_fini(struct cx88_core *core);
690void cx88_ir_irq(struct cx88_core *core);
691int cx88_ir_start(struct cx88_core *core);
692void cx88_ir_stop(struct cx88_core *core);
693extern void cx88_i2c_init_ir(struct cx88_core *core);
694
695
696
697
698int cx8802_buf_prepare(struct videobuf_queue *q,struct cx8802_dev *dev,
699 struct cx88_buffer *buf, enum v4l2_field field);
700void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
701void cx8802_cancel_buffers(struct cx8802_dev *dev);
702
703
704
705extern const u32 cx88_user_ctrls[];
706extern int cx8800_ctrl_query(struct cx88_core *core,
707 struct v4l2_queryctrl *qctrl);
708int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i);
709int cx88_set_freq (struct cx88_core *core,struct v4l2_frequency *f);
710int cx88_get_control(struct cx88_core *core, struct v4l2_control *ctl);
711int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl);
712int cx88_video_mux(struct cx88_core *core, unsigned int input);
713