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16#include <linux/err.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/interrupt.h>
21#include <linux/delay.h>
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_address.h>
25#include <linux/of_irq.h>
26#include <linux/mmc/host.h>
27#ifdef CONFIG_PPC
28#include <asm/machdep.h>
29#endif
30#include "sdhci-of.h"
31#include "sdhci.h"
32
33#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
34
35
36
37
38
39
40u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
41{
42 return in_be32(host->ioaddr + reg);
43}
44
45u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
46{
47 return in_be16(host->ioaddr + (reg ^ 0x2));
48}
49
50u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
51{
52 return in_8(host->ioaddr + (reg ^ 0x3));
53}
54
55void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
56{
57 out_be32(host->ioaddr + reg, val);
58}
59
60void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
61{
62 struct sdhci_of_host *of_host = sdhci_priv(host);
63 int base = reg & ~0x3;
64 int shift = (reg & 0x2) * 8;
65
66 switch (reg) {
67 case SDHCI_TRANSFER_MODE:
68
69
70
71
72 of_host->xfer_mode_shadow = val;
73 return;
74 case SDHCI_COMMAND:
75 sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
76 SDHCI_TRANSFER_MODE);
77 return;
78 }
79 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
80}
81
82void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
83{
84 int base = reg & ~0x3;
85 int shift = (reg & 0x3) * 8;
86
87 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
88}
89#endif
90
91#ifdef CONFIG_PM
92
93static int sdhci_of_suspend(struct platform_device *ofdev, pm_message_t state)
94{
95 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
96
97 return mmc_suspend_host(host->mmc);
98}
99
100static int sdhci_of_resume(struct platform_device *ofdev)
101{
102 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
103
104 return mmc_resume_host(host->mmc);
105}
106
107#else
108
109#define sdhci_of_suspend NULL
110#define sdhci_of_resume NULL
111
112#endif
113
114static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
115{
116 if (of_get_property(np, "sdhci,wp-inverted", NULL))
117 return true;
118
119
120#ifdef CONFIG_PPC
121 return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
122#else
123 return false;
124#endif
125}
126
127static int __devinit sdhci_of_probe(struct platform_device *ofdev,
128 const struct of_device_id *match)
129{
130 struct device_node *np = ofdev->dev.of_node;
131 struct sdhci_of_data *sdhci_of_data = match->data;
132 struct sdhci_host *host;
133 struct sdhci_of_host *of_host;
134 const __be32 *clk;
135 int size;
136 int ret;
137
138 if (!of_device_is_available(np))
139 return -ENODEV;
140
141 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
142 if (IS_ERR(host))
143 return -ENOMEM;
144
145 of_host = sdhci_priv(host);
146 dev_set_drvdata(&ofdev->dev, host);
147
148 host->ioaddr = of_iomap(np, 0);
149 if (!host->ioaddr) {
150 ret = -ENOMEM;
151 goto err_addr_map;
152 }
153
154 host->irq = irq_of_parse_and_map(np, 0);
155 if (!host->irq) {
156 ret = -EINVAL;
157 goto err_no_irq;
158 }
159
160 host->hw_name = dev_name(&ofdev->dev);
161 if (sdhci_of_data) {
162 host->quirks = sdhci_of_data->quirks;
163 host->ops = &sdhci_of_data->ops;
164 }
165
166 if (of_get_property(np, "sdhci,auto-cmd12", NULL))
167 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
168
169
170 if (of_get_property(np, "sdhci,1-bit-only", NULL))
171 host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
172
173 if (sdhci_of_wp_inverted(np))
174 host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
175
176 clk = of_get_property(np, "clock-frequency", &size);
177 if (clk && size == sizeof(*clk) && *clk)
178 of_host->clock = be32_to_cpup(clk);
179
180 ret = sdhci_add_host(host);
181 if (ret)
182 goto err_add_host;
183
184 return 0;
185
186err_add_host:
187 irq_dispose_mapping(host->irq);
188err_no_irq:
189 iounmap(host->ioaddr);
190err_addr_map:
191 sdhci_free_host(host);
192 return ret;
193}
194
195static int __devexit sdhci_of_remove(struct platform_device *ofdev)
196{
197 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
198
199 sdhci_remove_host(host, 0);
200 sdhci_free_host(host);
201 irq_dispose_mapping(host->irq);
202 iounmap(host->ioaddr);
203 return 0;
204}
205
206static const struct of_device_id sdhci_of_match[] = {
207#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
208 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
209 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
210 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
211#endif
212#ifdef CONFIG_MMC_SDHCI_OF_HLWD
213 { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
214#endif
215 { .compatible = "generic-sdhci", },
216 {},
217};
218MODULE_DEVICE_TABLE(of, sdhci_of_match);
219
220static struct of_platform_driver sdhci_of_driver = {
221 .driver = {
222 .name = "sdhci-of",
223 .owner = THIS_MODULE,
224 .of_match_table = sdhci_of_match,
225 },
226 .probe = sdhci_of_probe,
227 .remove = __devexit_p(sdhci_of_remove),
228 .suspend = sdhci_of_suspend,
229 .resume = sdhci_of_resume,
230};
231
232static int __init sdhci_of_init(void)
233{
234 return of_register_platform_driver(&sdhci_of_driver);
235}
236module_init(sdhci_of_init);
237
238static void __exit sdhci_of_exit(void)
239{
240 of_unregister_platform_driver(&sdhci_of_driver);
241}
242module_exit(sdhci_of_exit);
243
244MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
245MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
246 "Anton Vorontsov <avorontsov@ru.mvista.com>");
247MODULE_LICENSE("GPL");
248
