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15#include <linux/delay.h>
16#include <linux/highmem.h>
17#include <linux/pci.h>
18#include <linux/dma-mapping.h>
19#include <linux/slab.h>
20#include <linux/device.h>
21
22#include <linux/mmc/host.h>
23
24#include <asm/scatterlist.h>
25#include <asm/io.h>
26
27#include "sdhci.h"
28
29
30
31
32
33#define PCI_SDHCI_IFPIO 0x00
34#define PCI_SDHCI_IFDMA 0x01
35#define PCI_SDHCI_IFVENDOR 0x02
36
37#define PCI_SLOT_INFO 0x40
38#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
39#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
40
41#define MAX_SLOTS 8
42
43struct sdhci_pci_chip;
44struct sdhci_pci_slot;
45
46struct sdhci_pci_fixes {
47 unsigned int quirks;
48
49 int (*probe)(struct sdhci_pci_chip*);
50
51 int (*probe_slot)(struct sdhci_pci_slot*);
52 void (*remove_slot)(struct sdhci_pci_slot*, int);
53
54 int (*suspend)(struct sdhci_pci_chip*,
55 pm_message_t);
56 int (*resume)(struct sdhci_pci_chip*);
57};
58
59struct sdhci_pci_slot {
60 struct sdhci_pci_chip *chip;
61 struct sdhci_host *host;
62
63 int pci_bar;
64};
65
66struct sdhci_pci_chip {
67 struct pci_dev *pdev;
68
69 unsigned int quirks;
70 const struct sdhci_pci_fixes *fixes;
71
72 int num_slots;
73 struct sdhci_pci_slot *slots[MAX_SLOTS];
74};
75
76
77
78
79
80
81
82
83static int ricoh_probe(struct sdhci_pci_chip *chip)
84{
85 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
86 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
87 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
88 return 0;
89}
90
91static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
92{
93 slot->host->caps =
94 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
95 & SDHCI_TIMEOUT_CLK_MASK) |
96
97 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
98 & SDHCI_CLOCK_BASE_MASK) |
99
100 SDHCI_TIMEOUT_CLK_UNIT |
101 SDHCI_CAN_VDD_330 |
102 SDHCI_CAN_DO_SDMA;
103 return 0;
104}
105
106static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
107{
108
109
110
111 msleep(500);
112 return 0;
113}
114
115static const struct sdhci_pci_fixes sdhci_ricoh = {
116 .probe = ricoh_probe,
117 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
118 SDHCI_QUIRK_FORCE_DMA |
119 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
120};
121
122static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
123 .probe_slot = ricoh_mmc_probe_slot,
124 .resume = ricoh_mmc_resume,
125 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
126 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
127 SDHCI_QUIRK_NO_CARD_NO_RESET |
128 SDHCI_QUIRK_MISSING_CAPS
129};
130
131static const struct sdhci_pci_fixes sdhci_ene_712 = {
132 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
133 SDHCI_QUIRK_BROKEN_DMA,
134};
135
136static const struct sdhci_pci_fixes sdhci_ene_714 = {
137 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
138 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
139 SDHCI_QUIRK_BROKEN_DMA,
140};
141
142static const struct sdhci_pci_fixes sdhci_cafe = {
143 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
144 SDHCI_QUIRK_NO_BUSY_IRQ |
145 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
146};
147
148
149
150
151
152static int mrst_hc_probe(struct sdhci_pci_chip *chip)
153{
154
155
156
157
158 chip->num_slots = 1;
159 return 0;
160}
161
162static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
163 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
164};
165
166static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
167 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
168 .probe = mrst_hc_probe,
169};
170
171static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
172 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
173};
174
175static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
176 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
177};
178
179
180#define O2_SD_LOCK_WP 0xD3
181#define O2_SD_MULTI_VCC3V 0xEE
182#define O2_SD_CLKREQ 0xEC
183#define O2_SD_CAPS 0xE0
184#define O2_SD_ADMA1 0xE2
185#define O2_SD_ADMA2 0xE7
186#define O2_SD_INF_MOD 0xF1
187
188static int o2_probe(struct sdhci_pci_chip *chip)
189{
190 int ret;
191 u8 scratch;
192
193 switch (chip->pdev->device) {
194 case PCI_DEVICE_ID_O2_8220:
195 case PCI_DEVICE_ID_O2_8221:
196 case PCI_DEVICE_ID_O2_8320:
197 case PCI_DEVICE_ID_O2_8321:
198
199 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
200 if (ret)
201 return ret;
202 scratch &= 0x7f;
203 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
204
205
206 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
207
208
209 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
210 if (ret)
211 return ret;
212 scratch |= 0x20;
213 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
214
215
216
217
218 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
219 if (ret)
220 return ret;
221 scratch |= 0x01;
222 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
223 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
224
225
226 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
227 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
228
229
230 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
231 if (ret)
232 return ret;
233 scratch |= 0x08;
234 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
235
236
237 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
238 if (ret)
239 return ret;
240 scratch |= 0x80;
241 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
242 }
243
244 return 0;
245}
246
247static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
248{
249 u8 scratch;
250 int ret;
251
252 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
253 if (ret)
254 return ret;
255
256
257
258
259
260 if (on)
261 scratch |= 0x47;
262 else
263 scratch &= ~0x47;
264
265 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
266 if (ret)
267 return ret;
268
269 return 0;
270}
271
272static int jmicron_probe(struct sdhci_pci_chip *chip)
273{
274 int ret;
275 u16 mmcdev = 0;
276
277 if (chip->pdev->revision == 0) {
278 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
279 SDHCI_QUIRK_32BIT_DMA_SIZE |
280 SDHCI_QUIRK_32BIT_ADMA_SIZE |
281 SDHCI_QUIRK_RESET_AFTER_REQUEST |
282 SDHCI_QUIRK_BROKEN_SMALL_PIO;
283 }
284
285
286
287
288
289
290
291
292
293
294
295
296
297 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
298 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
299 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
300 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
301
302 if (mmcdev) {
303 struct pci_dev *sd_dev;
304
305 sd_dev = NULL;
306 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
307 mmcdev, sd_dev)) != NULL) {
308 if ((PCI_SLOT(chip->pdev->devfn) ==
309 PCI_SLOT(sd_dev->devfn)) &&
310 (chip->pdev->bus == sd_dev->bus))
311 break;
312 }
313
314 if (sd_dev) {
315 pci_dev_put(sd_dev);
316 dev_info(&chip->pdev->dev, "Refusing to bind to "
317 "secondary interface.\n");
318 return -ENODEV;
319 }
320 }
321
322
323
324
325
326 ret = jmicron_pmos(chip, 1);
327 if (ret) {
328 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
329 return ret;
330 }
331
332 return 0;
333}
334
335static void jmicron_enable_mmc(struct sdhci_host *host, int on)
336{
337 u8 scratch;
338
339 scratch = readb(host->ioaddr + 0xC0);
340
341 if (on)
342 scratch |= 0x01;
343 else
344 scratch &= ~0x01;
345
346 writeb(scratch, host->ioaddr + 0xC0);
347}
348
349static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
350{
351 if (slot->chip->pdev->revision == 0) {
352 u16 version;
353
354 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
355 version = (version & SDHCI_VENDOR_VER_MASK) >>
356 SDHCI_VENDOR_VER_SHIFT;
357
358
359
360
361
362
363 if (version < 0xAC)
364 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
365 }
366
367
368 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
369 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
370 MMC_VDD_29_30 | MMC_VDD_30_31 |
371 MMC_VDD_165_195;
372 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
373 MMC_VDD_29_30 | MMC_VDD_30_31;
374 }
375
376
377
378
379
380 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
381 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
382 jmicron_enable_mmc(slot->host, 1);
383
384 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
385
386 return 0;
387}
388
389static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
390{
391 if (dead)
392 return;
393
394 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
395 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
396 jmicron_enable_mmc(slot->host, 0);
397}
398
399static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
400{
401 int i;
402
403 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
404 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
405 for (i = 0;i < chip->num_slots;i++)
406 jmicron_enable_mmc(chip->slots[i]->host, 0);
407 }
408
409 return 0;
410}
411
412static int jmicron_resume(struct sdhci_pci_chip *chip)
413{
414 int ret, i;
415
416 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
417 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
418 for (i = 0;i < chip->num_slots;i++)
419 jmicron_enable_mmc(chip->slots[i]->host, 1);
420 }
421
422 ret = jmicron_pmos(chip, 1);
423 if (ret) {
424 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
425 return ret;
426 }
427
428 return 0;
429}
430
431static const struct sdhci_pci_fixes sdhci_o2 = {
432 .probe = o2_probe,
433};
434
435static const struct sdhci_pci_fixes sdhci_jmicron = {
436 .probe = jmicron_probe,
437
438 .probe_slot = jmicron_probe_slot,
439 .remove_slot = jmicron_remove_slot,
440
441 .suspend = jmicron_suspend,
442 .resume = jmicron_resume,
443};
444
445
446#define SYSKT_CTRL 0x200
447#define SYSKT_RDFIFO_STAT 0x204
448#define SYSKT_WRFIFO_STAT 0x208
449#define SYSKT_POWER_DATA 0x20c
450#define SYSKT_POWER_330 0xef
451#define SYSKT_POWER_300 0xf8
452#define SYSKT_POWER_184 0xcc
453#define SYSKT_POWER_CMD 0x20d
454#define SYSKT_POWER_START (1 << 7)
455#define SYSKT_POWER_STATUS 0x20e
456#define SYSKT_POWER_STATUS_OK (1 << 0)
457#define SYSKT_BOARD_REV 0x210
458#define SYSKT_CHIP_REV 0x211
459#define SYSKT_CONF_DATA 0x212
460#define SYSKT_CONF_DATA_1V8 (1 << 2)
461#define SYSKT_CONF_DATA_2V5 (1 << 1)
462#define SYSKT_CONF_DATA_3V3 (1 << 0)
463
464static int syskt_probe(struct sdhci_pci_chip *chip)
465{
466 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
467 chip->pdev->class &= ~0x0000FF;
468 chip->pdev->class |= PCI_SDHCI_IFDMA;
469 }
470 return 0;
471}
472
473static int syskt_probe_slot(struct sdhci_pci_slot *slot)
474{
475 int tm, ps;
476
477 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
478 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
479 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
480 "board rev %d.%d, chip rev %d.%d\n",
481 board_rev >> 4, board_rev & 0xf,
482 chip_rev >> 4, chip_rev & 0xf);
483 if (chip_rev >= 0x20)
484 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
485
486 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
487 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
488 udelay(50);
489 tm = 10;
490 do {
491 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
492 if (ps & SYSKT_POWER_STATUS_OK)
493 break;
494 udelay(100);
495 } while (--tm);
496 if (!tm) {
497 dev_err(&slot->chip->pdev->dev,
498 "power regulator never stabilized");
499 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
500 return -ENODEV;
501 }
502
503 return 0;
504}
505
506static const struct sdhci_pci_fixes sdhci_syskt = {
507 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
508 .probe = syskt_probe,
509 .probe_slot = syskt_probe_slot,
510};
511
512static int via_probe(struct sdhci_pci_chip *chip)
513{
514 if (chip->pdev->revision == 0x10)
515 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
516
517 return 0;
518}
519
520static const struct sdhci_pci_fixes sdhci_via = {
521 .probe = via_probe,
522};
523
524static const struct pci_device_id pci_ids[] __devinitdata = {
525 {
526 .vendor = PCI_VENDOR_ID_RICOH,
527 .device = PCI_DEVICE_ID_RICOH_R5C822,
528 .subvendor = PCI_ANY_ID,
529 .subdevice = PCI_ANY_ID,
530 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
531 },
532
533 {
534 .vendor = PCI_VENDOR_ID_RICOH,
535 .device = 0x843,
536 .subvendor = PCI_ANY_ID,
537 .subdevice = PCI_ANY_ID,
538 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
539 },
540
541 {
542 .vendor = PCI_VENDOR_ID_RICOH,
543 .device = 0xe822,
544 .subvendor = PCI_ANY_ID,
545 .subdevice = PCI_ANY_ID,
546 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
547 },
548
549 {
550 .vendor = PCI_VENDOR_ID_ENE,
551 .device = PCI_DEVICE_ID_ENE_CB712_SD,
552 .subvendor = PCI_ANY_ID,
553 .subdevice = PCI_ANY_ID,
554 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
555 },
556
557 {
558 .vendor = PCI_VENDOR_ID_ENE,
559 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
560 .subvendor = PCI_ANY_ID,
561 .subdevice = PCI_ANY_ID,
562 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
563 },
564
565 {
566 .vendor = PCI_VENDOR_ID_ENE,
567 .device = PCI_DEVICE_ID_ENE_CB714_SD,
568 .subvendor = PCI_ANY_ID,
569 .subdevice = PCI_ANY_ID,
570 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
571 },
572
573 {
574 .vendor = PCI_VENDOR_ID_ENE,
575 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
576 .subvendor = PCI_ANY_ID,
577 .subdevice = PCI_ANY_ID,
578 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
579 },
580
581 {
582 .vendor = PCI_VENDOR_ID_MARVELL,
583 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
584 .subvendor = PCI_ANY_ID,
585 .subdevice = PCI_ANY_ID,
586 .driver_data = (kernel_ulong_t)&sdhci_cafe,
587 },
588
589 {
590 .vendor = PCI_VENDOR_ID_JMICRON,
591 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
592 .subvendor = PCI_ANY_ID,
593 .subdevice = PCI_ANY_ID,
594 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
595 },
596
597 {
598 .vendor = PCI_VENDOR_ID_JMICRON,
599 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
600 .subvendor = PCI_ANY_ID,
601 .subdevice = PCI_ANY_ID,
602 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
603 },
604
605 {
606 .vendor = PCI_VENDOR_ID_JMICRON,
607 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
608 .subvendor = PCI_ANY_ID,
609 .subdevice = PCI_ANY_ID,
610 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
611 },
612
613 {
614 .vendor = PCI_VENDOR_ID_JMICRON,
615 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
616 .subvendor = PCI_ANY_ID,
617 .subdevice = PCI_ANY_ID,
618 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
619 },
620
621 {
622 .vendor = PCI_VENDOR_ID_SYSKONNECT,
623 .device = 0x8000,
624 .subvendor = PCI_ANY_ID,
625 .subdevice = PCI_ANY_ID,
626 .driver_data = (kernel_ulong_t)&sdhci_syskt,
627 },
628
629 {
630 .vendor = PCI_VENDOR_ID_VIA,
631 .device = 0x95d0,
632 .subvendor = PCI_ANY_ID,
633 .subdevice = PCI_ANY_ID,
634 .driver_data = (kernel_ulong_t)&sdhci_via,
635 },
636
637 {
638 .vendor = PCI_VENDOR_ID_INTEL,
639 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
640 .subvendor = PCI_ANY_ID,
641 .subdevice = PCI_ANY_ID,
642 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
643 },
644
645 {
646 .vendor = PCI_VENDOR_ID_INTEL,
647 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
648 .subvendor = PCI_ANY_ID,
649 .subdevice = PCI_ANY_ID,
650 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
651 },
652
653 {
654 .vendor = PCI_VENDOR_ID_INTEL,
655 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
656 .subvendor = PCI_ANY_ID,
657 .subdevice = PCI_ANY_ID,
658 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
659 },
660
661 {
662 .vendor = PCI_VENDOR_ID_INTEL,
663 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
664 .subvendor = PCI_ANY_ID,
665 .subdevice = PCI_ANY_ID,
666 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
667 },
668
669 {
670 .vendor = PCI_VENDOR_ID_INTEL,
671 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
672 .subvendor = PCI_ANY_ID,
673 .subdevice = PCI_ANY_ID,
674 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
675 },
676
677 {
678 .vendor = PCI_VENDOR_ID_INTEL,
679 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
680 .subvendor = PCI_ANY_ID,
681 .subdevice = PCI_ANY_ID,
682 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
683 },
684
685 {
686 .vendor = PCI_VENDOR_ID_INTEL,
687 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
688 .subvendor = PCI_ANY_ID,
689 .subdevice = PCI_ANY_ID,
690 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
691 },
692
693 {
694 .vendor = PCI_VENDOR_ID_INTEL,
695 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
696 .subvendor = PCI_ANY_ID,
697 .subdevice = PCI_ANY_ID,
698 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
699 },
700
701 {
702 .vendor = PCI_VENDOR_ID_O2,
703 .device = PCI_DEVICE_ID_O2_8120,
704 .subvendor = PCI_ANY_ID,
705 .subdevice = PCI_ANY_ID,
706 .driver_data = (kernel_ulong_t)&sdhci_o2,
707 },
708
709 {
710 .vendor = PCI_VENDOR_ID_O2,
711 .device = PCI_DEVICE_ID_O2_8220,
712 .subvendor = PCI_ANY_ID,
713 .subdevice = PCI_ANY_ID,
714 .driver_data = (kernel_ulong_t)&sdhci_o2,
715 },
716
717 {
718 .vendor = PCI_VENDOR_ID_O2,
719 .device = PCI_DEVICE_ID_O2_8221,
720 .subvendor = PCI_ANY_ID,
721 .subdevice = PCI_ANY_ID,
722 .driver_data = (kernel_ulong_t)&sdhci_o2,
723 },
724
725 {
726 .vendor = PCI_VENDOR_ID_O2,
727 .device = PCI_DEVICE_ID_O2_8320,
728 .subvendor = PCI_ANY_ID,
729 .subdevice = PCI_ANY_ID,
730 .driver_data = (kernel_ulong_t)&sdhci_o2,
731 },
732
733 {
734 .vendor = PCI_VENDOR_ID_O2,
735 .device = PCI_DEVICE_ID_O2_8321,
736 .subvendor = PCI_ANY_ID,
737 .subdevice = PCI_ANY_ID,
738 .driver_data = (kernel_ulong_t)&sdhci_o2,
739 },
740
741 {
742 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
743 },
744
745 { },
746};
747
748MODULE_DEVICE_TABLE(pci, pci_ids);
749
750
751
752
753
754
755
756static int sdhci_pci_enable_dma(struct sdhci_host *host)
757{
758 struct sdhci_pci_slot *slot;
759 struct pci_dev *pdev;
760 int ret;
761
762 slot = sdhci_priv(host);
763 pdev = slot->chip->pdev;
764
765 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
766 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
767 (host->flags & SDHCI_USE_SDMA)) {
768 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
769 "doesn't fully claim to support it.\n");
770 }
771
772 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
773 if (ret)
774 return ret;
775
776 pci_set_master(pdev);
777
778 return 0;
779}
780
781static struct sdhci_ops sdhci_pci_ops = {
782 .enable_dma = sdhci_pci_enable_dma,
783};
784
785
786
787
788
789
790
791#ifdef CONFIG_PM
792
793static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
794{
795 struct sdhci_pci_chip *chip;
796 struct sdhci_pci_slot *slot;
797 mmc_pm_flag_t slot_pm_flags;
798 mmc_pm_flag_t pm_flags = 0;
799 int i, ret;
800
801 chip = pci_get_drvdata(pdev);
802 if (!chip)
803 return 0;
804
805 for (i = 0;i < chip->num_slots;i++) {
806 slot = chip->slots[i];
807 if (!slot)
808 continue;
809
810 ret = sdhci_suspend_host(slot->host, state);
811
812 if (ret) {
813 for (i--;i >= 0;i--)
814 sdhci_resume_host(chip->slots[i]->host);
815 return ret;
816 }
817
818 slot_pm_flags = slot->host->mmc->pm_flags;
819 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
820 sdhci_enable_irq_wakeups(slot->host);
821
822 pm_flags |= slot_pm_flags;
823 }
824
825 if (chip->fixes && chip->fixes->suspend) {
826 ret = chip->fixes->suspend(chip, state);
827 if (ret) {
828 for (i = chip->num_slots - 1;i >= 0;i--)
829 sdhci_resume_host(chip->slots[i]->host);
830 return ret;
831 }
832 }
833
834 pci_save_state(pdev);
835 if (pm_flags & MMC_PM_KEEP_POWER) {
836 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
837 pci_pme_active(pdev, true);
838 pci_enable_wake(pdev, PCI_D3hot, 1);
839 }
840 pci_set_power_state(pdev, PCI_D3hot);
841 } else {
842 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
843 pci_disable_device(pdev);
844 pci_set_power_state(pdev, pci_choose_state(pdev, state));
845 }
846
847 return 0;
848}
849
850static int sdhci_pci_resume (struct pci_dev *pdev)
851{
852 struct sdhci_pci_chip *chip;
853 struct sdhci_pci_slot *slot;
854 int i, ret;
855
856 chip = pci_get_drvdata(pdev);
857 if (!chip)
858 return 0;
859
860 pci_set_power_state(pdev, PCI_D0);
861 pci_restore_state(pdev);
862 ret = pci_enable_device(pdev);
863 if (ret)
864 return ret;
865
866 if (chip->fixes && chip->fixes->resume) {
867 ret = chip->fixes->resume(chip);
868 if (ret)
869 return ret;
870 }
871
872 for (i = 0;i < chip->num_slots;i++) {
873 slot = chip->slots[i];
874 if (!slot)
875 continue;
876
877 ret = sdhci_resume_host(slot->host);
878 if (ret)
879 return ret;
880 }
881
882 return 0;
883}
884
885#else
886
887#define sdhci_pci_suspend NULL
888#define sdhci_pci_resume NULL
889
890#endif
891
892
893
894
895
896
897
898static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
899 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
900{
901 struct sdhci_pci_slot *slot;
902 struct sdhci_host *host;
903
904 resource_size_t addr;
905
906 int ret;
907
908 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
909 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
910 return ERR_PTR(-ENODEV);
911 }
912
913 if (pci_resource_len(pdev, bar) != 0x100) {
914 dev_err(&pdev->dev, "Invalid iomem size. You may "
915 "experience problems.\n");
916 }
917
918 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
919 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
920 return ERR_PTR(-ENODEV);
921 }
922
923 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
924 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
925 return ERR_PTR(-ENODEV);
926 }
927
928 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
929 if (IS_ERR(host)) {
930 dev_err(&pdev->dev, "cannot allocate host\n");
931 return ERR_CAST(host);
932 }
933
934 slot = sdhci_priv(host);
935
936 slot->chip = chip;
937 slot->host = host;
938 slot->pci_bar = bar;
939
940 host->hw_name = "PCI";
941 host->ops = &sdhci_pci_ops;
942 host->quirks = chip->quirks;
943
944 host->irq = pdev->irq;
945
946 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
947 if (ret) {
948 dev_err(&pdev->dev, "cannot request region\n");
949 goto free;
950 }
951
952 addr = pci_resource_start(pdev, bar);
953 host->ioaddr = pci_ioremap_bar(pdev, bar);
954 if (!host->ioaddr) {
955 dev_err(&pdev->dev, "failed to remap registers\n");
956 goto release;
957 }
958
959 if (chip->fixes && chip->fixes->probe_slot) {
960 ret = chip->fixes->probe_slot(slot);
961 if (ret)
962 goto unmap;
963 }
964
965 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
966
967 ret = sdhci_add_host(host);
968 if (ret)
969 goto remove;
970
971 return slot;
972
973remove:
974 if (chip->fixes && chip->fixes->remove_slot)
975 chip->fixes->remove_slot(slot, 0);
976
977unmap:
978 iounmap(host->ioaddr);
979
980release:
981 pci_release_region(pdev, bar);
982
983free:
984 sdhci_free_host(host);
985
986 return ERR_PTR(ret);
987}
988
989static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
990{
991 int dead;
992 u32 scratch;
993
994 dead = 0;
995 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
996 if (scratch == (u32)-1)
997 dead = 1;
998
999 sdhci_remove_host(slot->host, dead);
1000
1001 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1002 slot->chip->fixes->remove_slot(slot, dead);
1003
1004 pci_release_region(slot->chip->pdev, slot->pci_bar);
1005
1006 sdhci_free_host(slot->host);
1007}
1008
1009static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1010 const struct pci_device_id *ent)
1011{
1012 struct sdhci_pci_chip *chip;
1013 struct sdhci_pci_slot *slot;
1014
1015 u8 slots, rev, first_bar;
1016 int ret, i;
1017
1018 BUG_ON(pdev == NULL);
1019 BUG_ON(ent == NULL);
1020
1021 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1022
1023 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1024 (int)pdev->vendor, (int)pdev->device, (int)rev);
1025
1026 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1027 if (ret)
1028 return ret;
1029
1030 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1031 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1032 if (slots == 0)
1033 return -ENODEV;
1034
1035 BUG_ON(slots > MAX_SLOTS);
1036
1037 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1038 if (ret)
1039 return ret;
1040
1041 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1042
1043 if (first_bar > 5) {
1044 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1045 return -ENODEV;
1046 }
1047
1048 ret = pci_enable_device(pdev);
1049 if (ret)
1050 return ret;
1051
1052 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1053 if (!chip) {
1054 ret = -ENOMEM;
1055 goto err;
1056 }
1057
1058 chip->pdev = pdev;
1059 chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
1060 if (chip->fixes)
1061 chip->quirks = chip->fixes->quirks;
1062 chip->num_slots = slots;
1063
1064 pci_set_drvdata(pdev, chip);
1065
1066 if (chip->fixes && chip->fixes->probe) {
1067 ret = chip->fixes->probe(chip);
1068 if (ret)
1069 goto free;
1070 }
1071
1072 slots = chip->num_slots;
1073
1074 for (i = 0;i < slots;i++) {
1075 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1076 if (IS_ERR(slot)) {
1077 for (i--;i >= 0;i--)
1078 sdhci_pci_remove_slot(chip->slots[i]);
1079 ret = PTR_ERR(slot);
1080 goto free;
1081 }
1082
1083 chip->slots[i] = slot;
1084 }
1085
1086 return 0;
1087
1088free:
1089 pci_set_drvdata(pdev, NULL);
1090 kfree(chip);
1091
1092err:
1093 pci_disable_device(pdev);
1094 return ret;
1095}
1096
1097static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1098{
1099 int i;
1100 struct sdhci_pci_chip *chip;
1101
1102 chip = pci_get_drvdata(pdev);
1103
1104 if (chip) {
1105 for (i = 0;i < chip->num_slots; i++)
1106 sdhci_pci_remove_slot(chip->slots[i]);
1107
1108 pci_set_drvdata(pdev, NULL);
1109 kfree(chip);
1110 }
1111
1112 pci_disable_device(pdev);
1113}
1114
1115static struct pci_driver sdhci_driver = {
1116 .name = "sdhci-pci",
1117 .id_table = pci_ids,
1118 .probe = sdhci_pci_probe,
1119 .remove = __devexit_p(sdhci_pci_remove),
1120 .suspend = sdhci_pci_suspend,
1121 .resume = sdhci_pci_resume,
1122};
1123
1124
1125
1126
1127
1128
1129
1130static int __init sdhci_drv_init(void)
1131{
1132 return pci_register_driver(&sdhci_driver);
1133}
1134
1135static void __exit sdhci_drv_exit(void)
1136{
1137 pci_unregister_driver(&sdhci_driver);
1138}
1139
1140module_init(sdhci_drv_init);
1141module_exit(sdhci_drv_exit);
1142
1143MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1144MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1145MODULE_LICENSE("GPL");
1146
