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15#include <linux/genhd.h>
16#include <linux/slab.h>
17#include <linux/module.h>
18#include <linux/delay.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/nand_ecc.h>
22#include <linux/mtd/partitions.h>
23#include <linux/mtd/sharpsl.h>
24#include <linux/interrupt.h>
25#include <linux/platform_device.h>
26
27#include <asm/io.h>
28#include <mach/hardware.h>
29#include <asm/mach-types.h>
30
31struct sharpsl_nand {
32 struct mtd_info mtd;
33 struct nand_chip chip;
34
35 void __iomem *io;
36};
37
38#define mtd_to_sharpsl(_mtd) container_of(_mtd, struct sharpsl_nand, mtd)
39
40
41#define ECCLPLB 0x00
42#define ECCLPUB 0x04
43#define ECCCP 0x08
44#define ECCCNTR 0x0C
45#define ECCCLRR 0x10
46#define FLASHIO 0x14
47#define FLASHCTL 0x18
48
49
50#define FLRYBY (1 << 5)
51#define FLCE1 (1 << 4)
52#define FLWP (1 << 3)
53#define FLALE (1 << 2)
54#define FLCLE (1 << 1)
55#define FLCE0 (1 << 0)
56
57
58
59
60
61
62
63
64
65static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
66 unsigned int ctrl)
67{
68 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
69 struct nand_chip *chip = mtd->priv;
70
71 if (ctrl & NAND_CTRL_CHANGE) {
72 unsigned char bits = ctrl & 0x07;
73
74 bits |= (ctrl & 0x01) << 4;
75
76 bits ^= 0x11;
77
78 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
79 }
80
81 if (cmd != NAND_CMD_NONE)
82 writeb(cmd, chip->IO_ADDR_W);
83}
84
85static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
86{
87 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
88 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
89}
90
91static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
92{
93 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
94 writeb(0, sharpsl->io + ECCCLRR);
95}
96
97static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
98{
99 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
100 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
101 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
102 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
103 return readb(sharpsl->io + ECCCNTR) != 0;
104}
105
106#ifdef CONFIG_MTD_PARTITIONS
107static const char *part_probes[] = { "cmdlinepart", NULL };
108#endif
109
110
111
112
113static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
114{
115 struct nand_chip *this;
116#ifdef CONFIG_MTD_PARTITIONS
117 struct mtd_partition *sharpsl_partition_info;
118 int nr_partitions;
119#endif
120 struct resource *r;
121 int err = 0;
122 struct sharpsl_nand *sharpsl;
123 struct sharpsl_nand_platform_data *data = pdev->dev.platform_data;
124
125 if (!data) {
126 dev_err(&pdev->dev, "no platform data!\n");
127 return -EINVAL;
128 }
129
130
131 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
132 if (!sharpsl) {
133 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
134 return -ENOMEM;
135 }
136
137 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
138 if (!r) {
139 dev_err(&pdev->dev, "no io memory resource defined!\n");
140 err = -ENODEV;
141 goto err_get_res;
142 }
143
144
145 sharpsl->io = ioremap(r->start, resource_size(r));
146 if (!sharpsl->io) {
147 printk("ioremap to access Sharp SL NAND chip failed\n");
148 err = -EIO;
149 goto err_ioremap;
150 }
151
152
153 this = (struct nand_chip *)(&sharpsl->chip);
154
155
156 sharpsl->mtd.priv = this;
157 sharpsl->mtd.owner = THIS_MODULE;
158
159 platform_set_drvdata(pdev, sharpsl);
160
161
162
163
164 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
165
166
167 this->IO_ADDR_R = sharpsl->io + FLASHIO;
168 this->IO_ADDR_W = sharpsl->io + FLASHIO;
169
170 this->cmd_ctrl = sharpsl_nand_hwcontrol;
171 this->dev_ready = sharpsl_nand_dev_ready;
172
173 this->chip_delay = 15;
174
175 this->ecc.mode = NAND_ECC_HW;
176 this->ecc.size = 256;
177 this->ecc.bytes = 3;
178 this->badblock_pattern = data->badblock_pattern;
179 this->ecc.layout = data->ecc_layout;
180 this->ecc.hwctl = sharpsl_nand_enable_hwecc;
181 this->ecc.calculate = sharpsl_nand_calculate_ecc;
182 this->ecc.correct = nand_correct_data;
183
184
185 err = nand_scan(&sharpsl->mtd, 1);
186 if (err)
187 goto err_scan;
188
189
190 sharpsl->mtd.name = "sharpsl-nand";
191#ifdef CONFIG_MTD_PARTITIONS
192 nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0);
193 if (nr_partitions <= 0) {
194 nr_partitions = data->nr_partitions;
195 sharpsl_partition_info = data->partitions;
196 }
197
198 if (nr_partitions > 0)
199 err = add_mtd_partitions(&sharpsl->mtd, sharpsl_partition_info, nr_partitions);
200 else
201#endif
202 err = add_mtd_device(&sharpsl->mtd);
203 if (err)
204 goto err_add;
205
206
207 return 0;
208
209err_add:
210 nand_release(&sharpsl->mtd);
211
212err_scan:
213 platform_set_drvdata(pdev, NULL);
214 iounmap(sharpsl->io);
215err_ioremap:
216err_get_res:
217 kfree(sharpsl);
218 return err;
219}
220
221
222
223
224static int __devexit sharpsl_nand_remove(struct platform_device *pdev)
225{
226 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
227
228
229 nand_release(&sharpsl->mtd);
230
231 platform_set_drvdata(pdev, NULL);
232
233 iounmap(sharpsl->io);
234
235
236 kfree(sharpsl);
237
238 return 0;
239}
240
241static struct platform_driver sharpsl_nand_driver = {
242 .driver = {
243 .name = "sharpsl-nand",
244 .owner = THIS_MODULE,
245 },
246 .probe = sharpsl_nand_probe,
247 .remove = __devexit_p(sharpsl_nand_remove),
248};
249
250static int __init sharpsl_nand_init(void)
251{
252 return platform_driver_register(&sharpsl_nand_driver);
253}
254module_init(sharpsl_nand_init);
255
256static void __exit sharpsl_nand_exit(void)
257{
258 platform_driver_unregister(&sharpsl_nand_driver);
259}
260module_exit(sharpsl_nand_exit);
261
262MODULE_LICENSE("GPL");
263MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
264MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");
265