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35#ifndef __T4_MSG_H
36#define __T4_MSG_H
37
38#include <linux/types.h>
39
40enum {
41 CPL_PASS_OPEN_REQ = 0x1,
42 CPL_PASS_ACCEPT_RPL = 0x2,
43 CPL_ACT_OPEN_REQ = 0x3,
44 CPL_SET_TCB_FIELD = 0x5,
45 CPL_GET_TCB = 0x6,
46 CPL_CLOSE_CON_REQ = 0x8,
47 CPL_CLOSE_LISTSRV_REQ = 0x9,
48 CPL_ABORT_REQ = 0xA,
49 CPL_ABORT_RPL = 0xB,
50 CPL_RX_DATA_ACK = 0xD,
51 CPL_TX_PKT = 0xE,
52 CPL_L2T_WRITE_REQ = 0x12,
53 CPL_TID_RELEASE = 0x1A,
54
55 CPL_CLOSE_LISTSRV_RPL = 0x20,
56 CPL_L2T_WRITE_RPL = 0x23,
57 CPL_PASS_OPEN_RPL = 0x24,
58 CPL_ACT_OPEN_RPL = 0x25,
59 CPL_PEER_CLOSE = 0x26,
60 CPL_ABORT_REQ_RSS = 0x2B,
61 CPL_ABORT_RPL_RSS = 0x2D,
62
63 CPL_CLOSE_CON_RPL = 0x32,
64 CPL_ISCSI_HDR = 0x33,
65 CPL_RDMA_CQE = 0x35,
66 CPL_RDMA_CQE_READ_RSP = 0x36,
67 CPL_RDMA_CQE_ERR = 0x37,
68 CPL_RX_DATA = 0x39,
69 CPL_SET_TCB_RPL = 0x3A,
70 CPL_RX_PKT = 0x3B,
71 CPL_RX_DDP_COMPLETE = 0x3F,
72
73 CPL_ACT_ESTABLISH = 0x40,
74 CPL_PASS_ESTABLISH = 0x41,
75 CPL_RX_DATA_DDP = 0x42,
76 CPL_PASS_ACCEPT_REQ = 0x44,
77
78 CPL_RDMA_READ_REQ = 0x60,
79
80 CPL_PASS_OPEN_REQ6 = 0x81,
81 CPL_ACT_OPEN_REQ6 = 0x83,
82
83 CPL_RDMA_TERMINATE = 0xA2,
84 CPL_RDMA_WRITE = 0xA4,
85 CPL_SGE_EGR_UPDATE = 0xA5,
86
87 CPL_TRACE_PKT = 0xB0,
88
89 CPL_FW4_MSG = 0xC0,
90 CPL_FW4_PLD = 0xC1,
91 CPL_FW4_ACK = 0xC3,
92
93 CPL_FW6_MSG = 0xE0,
94 CPL_FW6_PLD = 0xE1,
95 CPL_TX_PKT_LSO = 0xED,
96 CPL_TX_PKT_XT = 0xEE,
97
98 NUM_CPL_CMDS
99};
100
101enum CPL_error {
102 CPL_ERR_NONE = 0,
103 CPL_ERR_TCAM_FULL = 3,
104 CPL_ERR_BAD_LENGTH = 15,
105 CPL_ERR_BAD_ROUTE = 18,
106 CPL_ERR_CONN_RESET = 20,
107 CPL_ERR_CONN_EXIST_SYNRECV = 21,
108 CPL_ERR_CONN_EXIST = 22,
109 CPL_ERR_ARP_MISS = 23,
110 CPL_ERR_BAD_SYN = 24,
111 CPL_ERR_CONN_TIMEDOUT = 30,
112 CPL_ERR_XMIT_TIMEDOUT = 31,
113 CPL_ERR_PERSIST_TIMEDOUT = 32,
114 CPL_ERR_FINWAIT2_TIMEDOUT = 33,
115 CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
116 CPL_ERR_RTX_NEG_ADVICE = 35,
117 CPL_ERR_PERSIST_NEG_ADVICE = 36,
118 CPL_ERR_ABORT_FAILED = 42,
119 CPL_ERR_IWARP_FLM = 50,
120};
121
122enum {
123 ULP_MODE_NONE = 0,
124 ULP_MODE_ISCSI = 2,
125 ULP_MODE_RDMA = 4,
126 ULP_MODE_FCOE = 6,
127};
128
129enum {
130 ULP_CRC_HEADER = 1 << 0,
131 ULP_CRC_DATA = 1 << 1
132};
133
134enum {
135 CPL_ABORT_SEND_RST = 0,
136 CPL_ABORT_NO_RST,
137};
138
139enum {
140 TX_CSUM_TCP = 0,
141 TX_CSUM_UDP = 1,
142 TX_CSUM_CRC16 = 4,
143 TX_CSUM_CRC32 = 5,
144 TX_CSUM_CRC32C = 6,
145 TX_CSUM_FCOE = 7,
146 TX_CSUM_TCPIP = 8,
147 TX_CSUM_UDPIP = 9,
148 TX_CSUM_TCPIP6 = 10,
149 TX_CSUM_UDPIP6 = 11,
150 TX_CSUM_IP = 12,
151};
152
153union opcode_tid {
154 __be32 opcode_tid;
155 u8 opcode;
156};
157
158#define CPL_OPCODE(x) ((x) << 24)
159#define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid))
160#define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
161#define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF)
162
163
164#define GET_TID_TID(x) ((x) & 0x3fff)
165#define GET_TID_QID(x) (((x) >> 14) & 0x3ff)
166#define TID_QID(x) ((x) << 14)
167
168struct rss_header {
169 u8 opcode;
170#if defined(__LITTLE_ENDIAN_BITFIELD)
171 u8 channel:2;
172 u8 filter_hit:1;
173 u8 filter_tid:1;
174 u8 hash_type:2;
175 u8 ipv6:1;
176 u8 send2fw:1;
177#else
178 u8 send2fw:1;
179 u8 ipv6:1;
180 u8 hash_type:2;
181 u8 filter_tid:1;
182 u8 filter_hit:1;
183 u8 channel:2;
184#endif
185 __be16 qid;
186 __be32 hash_val;
187};
188
189struct work_request_hdr {
190 __be32 wr_hi;
191 __be32 wr_mid;
192 __be64 wr_lo;
193};
194
195#define WR_HDR struct work_request_hdr wr
196
197struct cpl_pass_open_req {
198 WR_HDR;
199 union opcode_tid ot;
200 __be16 local_port;
201 __be16 peer_port;
202 __be32 local_ip;
203 __be32 peer_ip;
204 __be64 opt0;
205#define TX_CHAN(x) ((x) << 2)
206#define DELACK(x) ((x) << 5)
207#define ULP_MODE(x) ((x) << 8)
208#define RCV_BUFSIZ(x) ((x) << 12)
209#define DSCP(x) ((x) << 22)
210#define SMAC_SEL(x) ((u64)(x) << 28)
211#define L2T_IDX(x) ((u64)(x) << 36)
212#define NAGLE(x) ((u64)(x) << 49)
213#define WND_SCALE(x) ((u64)(x) << 50)
214#define KEEP_ALIVE(x) ((u64)(x) << 54)
215#define MSS_IDX(x) ((u64)(x) << 60)
216 __be64 opt1;
217#define SYN_RSS_ENABLE (1 << 0)
218#define SYN_RSS_QUEUE(x) ((x) << 2)
219#define CONN_POLICY_ASK (1 << 22)
220};
221
222struct cpl_pass_open_req6 {
223 WR_HDR;
224 union opcode_tid ot;
225 __be16 local_port;
226 __be16 peer_port;
227 __be64 local_ip_hi;
228 __be64 local_ip_lo;
229 __be64 peer_ip_hi;
230 __be64 peer_ip_lo;
231 __be64 opt0;
232 __be64 opt1;
233};
234
235struct cpl_pass_open_rpl {
236 union opcode_tid ot;
237 u8 rsvd[3];
238 u8 status;
239};
240
241struct cpl_pass_accept_rpl {
242 WR_HDR;
243 union opcode_tid ot;
244 __be32 opt2;
245#define RSS_QUEUE(x) ((x) << 0)
246#define RSS_QUEUE_VALID (1 << 10)
247#define RX_COALESCE_VALID(x) ((x) << 11)
248#define RX_COALESCE(x) ((x) << 12)
249#define TX_QUEUE(x) ((x) << 23)
250#define RX_CHANNEL(x) ((x) << 26)
251#define WND_SCALE_EN(x) ((x) << 28)
252#define TSTAMPS_EN(x) ((x) << 29)
253#define SACK_EN(x) ((x) << 30)
254 __be64 opt0;
255};
256
257struct cpl_act_open_req {
258 WR_HDR;
259 union opcode_tid ot;
260 __be16 local_port;
261 __be16 peer_port;
262 __be32 local_ip;
263 __be32 peer_ip;
264 __be64 opt0;
265 __be32 params;
266 __be32 opt2;
267};
268
269struct cpl_act_open_req6 {
270 WR_HDR;
271 union opcode_tid ot;
272 __be16 local_port;
273 __be16 peer_port;
274 __be64 local_ip_hi;
275 __be64 local_ip_lo;
276 __be64 peer_ip_hi;
277 __be64 peer_ip_lo;
278 __be64 opt0;
279 __be32 params;
280 __be32 opt2;
281};
282
283struct cpl_act_open_rpl {
284 union opcode_tid ot;
285 __be32 atid_status;
286#define GET_AOPEN_STATUS(x) ((x) & 0xff)
287#define GET_AOPEN_ATID(x) (((x) >> 8) & 0xffffff)
288};
289
290struct cpl_pass_establish {
291 union opcode_tid ot;
292 __be32 rsvd;
293 __be32 tos_stid;
294#define GET_POPEN_TID(x) ((x) & 0xffffff)
295#define GET_POPEN_TOS(x) (((x) >> 24) & 0xff)
296 __be16 mac_idx;
297 __be16 tcp_opt;
298#define GET_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1)
299#define GET_TCPOPT_SACK(x) (((x) >> 6) & 1)
300#define GET_TCPOPT_TSTAMP(x) (((x) >> 7) & 1)
301#define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf)
302#define GET_TCPOPT_MSS(x) (((x) >> 12) & 0xf)
303 __be32 snd_isn;
304 __be32 rcv_isn;
305};
306
307struct cpl_act_establish {
308 union opcode_tid ot;
309 __be32 rsvd;
310 __be32 tos_atid;
311 __be16 mac_idx;
312 __be16 tcp_opt;
313 __be32 snd_isn;
314 __be32 rcv_isn;
315};
316
317struct cpl_get_tcb {
318 WR_HDR;
319 union opcode_tid ot;
320 __be16 reply_ctrl;
321#define QUEUENO(x) ((x) << 0)
322#define REPLY_CHAN(x) ((x) << 14)
323#define NO_REPLY(x) ((x) << 15)
324 __be16 cookie;
325};
326
327struct cpl_set_tcb_field {
328 WR_HDR;
329 union opcode_tid ot;
330 __be16 reply_ctrl;
331 __be16 word_cookie;
332#define TCB_WORD(x) ((x) << 0)
333#define TCB_COOKIE(x) ((x) << 5)
334 __be64 mask;
335 __be64 val;
336};
337
338struct cpl_set_tcb_rpl {
339 union opcode_tid ot;
340 __be16 rsvd;
341 u8 cookie;
342 u8 status;
343 __be64 oldval;
344};
345
346struct cpl_close_con_req {
347 WR_HDR;
348 union opcode_tid ot;
349 __be32 rsvd;
350};
351
352struct cpl_close_con_rpl {
353 union opcode_tid ot;
354 u8 rsvd[3];
355 u8 status;
356 __be32 snd_nxt;
357 __be32 rcv_nxt;
358};
359
360struct cpl_close_listsvr_req {
361 WR_HDR;
362 union opcode_tid ot;
363 __be16 reply_ctrl;
364#define LISTSVR_IPV6 (1 << 14)
365 __be16 rsvd;
366};
367
368struct cpl_close_listsvr_rpl {
369 union opcode_tid ot;
370 u8 rsvd[3];
371 u8 status;
372};
373
374struct cpl_abort_req_rss {
375 union opcode_tid ot;
376 u8 rsvd[3];
377 u8 status;
378};
379
380struct cpl_abort_req {
381 WR_HDR;
382 union opcode_tid ot;
383 __be32 rsvd0;
384 u8 rsvd1;
385 u8 cmd;
386 u8 rsvd2[6];
387};
388
389struct cpl_abort_rpl_rss {
390 union opcode_tid ot;
391 u8 rsvd[3];
392 u8 status;
393};
394
395struct cpl_abort_rpl {
396 WR_HDR;
397 union opcode_tid ot;
398 __be32 rsvd0;
399 u8 rsvd1;
400 u8 cmd;
401 u8 rsvd2[6];
402};
403
404struct cpl_peer_close {
405 union opcode_tid ot;
406 __be32 rcv_nxt;
407};
408
409struct cpl_tid_release {
410 WR_HDR;
411 union opcode_tid ot;
412 __be32 rsvd;
413};
414
415struct cpl_tx_pkt_core {
416 __be32 ctrl0;
417#define TXPKT_VF(x) ((x) << 0)
418#define TXPKT_PF(x) ((x) << 8)
419#define TXPKT_VF_VLD (1 << 11)
420#define TXPKT_OVLAN_IDX(x) ((x) << 12)
421#define TXPKT_INTF(x) ((x) << 16)
422#define TXPKT_INS_OVLAN (1 << 21)
423#define TXPKT_OPCODE(x) ((x) << 24)
424 __be16 pack;
425 __be16 len;
426 __be64 ctrl1;
427#define TXPKT_CSUM_END(x) ((x) << 12)
428#define TXPKT_CSUM_START(x) ((x) << 20)
429#define TXPKT_IPHDR_LEN(x) ((u64)(x) << 20)
430#define TXPKT_CSUM_LOC(x) ((u64)(x) << 30)
431#define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34)
432#define TXPKT_CSUM_TYPE(x) ((u64)(x) << 40)
433#define TXPKT_VLAN(x) ((u64)(x) << 44)
434#define TXPKT_VLAN_VLD (1ULL << 60)
435#define TXPKT_IPCSUM_DIS (1ULL << 62)
436#define TXPKT_L4CSUM_DIS (1ULL << 63)
437};
438
439struct cpl_tx_pkt {
440 WR_HDR;
441 struct cpl_tx_pkt_core c;
442};
443
444#define cpl_tx_pkt_xt cpl_tx_pkt
445
446struct cpl_tx_pkt_lso_core {
447 __be32 lso_ctrl;
448#define LSO_TCPHDR_LEN(x) ((x) << 0)
449#define LSO_IPHDR_LEN(x) ((x) << 4)
450#define LSO_ETHHDR_LEN(x) ((x) << 16)
451#define LSO_IPV6(x) ((x) << 20)
452#define LSO_LAST_SLICE (1 << 22)
453#define LSO_FIRST_SLICE (1 << 23)
454#define LSO_OPCODE(x) ((x) << 24)
455 __be16 ipid_ofst;
456 __be16 mss;
457 __be32 seqno_offset;
458 __be32 len;
459
460};
461
462struct cpl_tx_pkt_lso {
463 WR_HDR;
464 struct cpl_tx_pkt_lso_core c;
465
466};
467
468struct cpl_iscsi_hdr {
469 union opcode_tid ot;
470 __be16 pdu_len_ddp;
471#define ISCSI_PDU_LEN(x) ((x) & 0x7FFF)
472#define ISCSI_DDP (1 << 15)
473 __be16 len;
474 __be32 seq;
475 __be16 urg;
476 u8 rsvd;
477 u8 status;
478};
479
480struct cpl_rx_data {
481 union opcode_tid ot;
482 __be16 rsvd;
483 __be16 len;
484 __be32 seq;
485 __be16 urg;
486#if defined(__LITTLE_ENDIAN_BITFIELD)
487 u8 dack_mode:2;
488 u8 psh:1;
489 u8 heartbeat:1;
490 u8 ddp_off:1;
491 u8 :3;
492#else
493 u8 :3;
494 u8 ddp_off:1;
495 u8 heartbeat:1;
496 u8 psh:1;
497 u8 dack_mode:2;
498#endif
499 u8 status;
500};
501
502struct cpl_rx_data_ack {
503 WR_HDR;
504 union opcode_tid ot;
505 __be32 credit_dack;
506#define RX_CREDITS(x) ((x) << 0)
507#define RX_FORCE_ACK(x) ((x) << 28)
508};
509
510struct cpl_rx_pkt {
511 struct rss_header rsshdr;
512 u8 opcode;
513#if defined(__LITTLE_ENDIAN_BITFIELD)
514 u8 iff:4;
515 u8 csum_calc:1;
516 u8 ipmi_pkt:1;
517 u8 vlan_ex:1;
518 u8 ip_frag:1;
519#else
520 u8 ip_frag:1;
521 u8 vlan_ex:1;
522 u8 ipmi_pkt:1;
523 u8 csum_calc:1;
524 u8 iff:4;
525#endif
526 __be16 csum;
527 __be16 vlan;
528 __be16 len;
529 __be32 l2info;
530#define RXF_UDP (1 << 22)
531#define RXF_TCP (1 << 23)
532#define RXF_IP (1 << 24)
533#define RXF_IP6 (1 << 25)
534 __be16 hdr_len;
535 __be16 err_vec;
536};
537
538struct cpl_trace_pkt {
539 u8 opcode;
540 u8 intf;
541#if defined(__LITTLE_ENDIAN_BITFIELD)
542 u8 runt:4;
543 u8 filter_hit:4;
544 u8 :6;
545 u8 err:1;
546 u8 trunc:1;
547#else
548 u8 filter_hit:4;
549 u8 runt:4;
550 u8 trunc:1;
551 u8 err:1;
552 u8 :6;
553#endif
554 __be16 rsvd;
555 __be16 len;
556 __be64 tstamp;
557};
558
559struct cpl_l2t_write_req {
560 WR_HDR;
561 union opcode_tid ot;
562 __be16 params;
563#define L2T_W_INFO(x) ((x) << 2)
564#define L2T_W_PORT(x) ((x) << 8)
565#define L2T_W_NOREPLY(x) ((x) << 15)
566 __be16 l2t_idx;
567 __be16 vlan;
568 u8 dst_mac[6];
569};
570
571struct cpl_l2t_write_rpl {
572 union opcode_tid ot;
573 u8 status;
574 u8 rsvd[3];
575};
576
577struct cpl_rdma_terminate {
578 union opcode_tid ot;
579 __be16 rsvd;
580 __be16 len;
581};
582
583struct cpl_sge_egr_update {
584 __be32 opcode_qid;
585#define EGR_QID(x) ((x) & 0x1FFFF)
586 __be16 cidx;
587 __be16 pidx;
588};
589
590struct cpl_fw4_pld {
591 u8 opcode;
592 u8 rsvd0[3];
593 u8 type;
594 u8 rsvd1;
595 __be16 len;
596 __be64 data;
597 __be64 rsvd2;
598};
599
600struct cpl_fw6_pld {
601 u8 opcode;
602 u8 rsvd[5];
603 __be16 len;
604 __be64 data[4];
605};
606
607struct cpl_fw4_msg {
608 u8 opcode;
609 u8 type;
610 __be16 rsvd0;
611 __be32 rsvd1;
612 __be64 data[2];
613};
614
615struct cpl_fw4_ack {
616 union opcode_tid ot;
617 u8 credits;
618 u8 rsvd0[2];
619 u8 seq_vld;
620 __be32 snd_nxt;
621 __be32 snd_una;
622 __be64 rsvd1;
623};
624
625struct cpl_fw6_msg {
626 u8 opcode;
627 u8 type;
628 __be16 rsvd0;
629 __be32 rsvd1;
630 __be64 data[4];
631};
632
633
634enum {
635 FW6_TYPE_CMD_RPL = 0,
636};
637
638enum {
639 ULP_TX_MEM_READ = 2,
640 ULP_TX_MEM_WRITE = 3,
641 ULP_TX_PKT = 4
642};
643
644enum {
645 ULP_TX_SC_NOOP = 0x80,
646 ULP_TX_SC_IMM = 0x81,
647 ULP_TX_SC_DSGL = 0x82,
648 ULP_TX_SC_ISGL = 0x83
649};
650
651struct ulptx_sge_pair {
652 __be32 len[2];
653 __be64 addr[2];
654};
655
656struct ulptx_sgl {
657 __be32 cmd_nsge;
658#define ULPTX_CMD(x) ((x) << 24)
659#define ULPTX_NSGE(x) ((x) << 0)
660 __be32 len0;
661 __be64 addr0;
662 struct ulptx_sge_pair sge[0];
663};
664
665struct ulp_mem_io {
666 WR_HDR;
667 __be32 cmd;
668#define ULP_MEMIO_ORDER(x) ((x) << 23)
669 __be32 len16;
670 __be32 dlen;
671#define ULP_MEMIO_DATA_LEN(x) ((x) << 0)
672 __be32 lock_addr;
673#define ULP_MEMIO_ADDR(x) ((x) << 0)
674#define ULP_MEMIO_LOCK(x) ((x) << 31)
675};
676
677#endif
678
